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1. 发明授权

US09076761B2 Silicon carbide semiconductor device and method for manufacturing silicon carbide semiconductor device 有权
标题翻译：碳化硅半导体器件及其制造方法
公开(公告)号：US09076761B2
公开(公告)日：2015-07-07
申请号：US14116259
申请日：2012-05-31
申请人： Tomokatsu Watanabe , Naruhisa Miura , Masayuki Furuhashi , Shiro Hino , Toshikazu Tanioka
发明人： Tomokatsu Watanabe , Naruhisa Miura , Masayuki Furuhashi , Shiro Hino , Toshikazu Tanioka
IPC分类号： H01L29/417 , H01L29/10 , H01L29/78 , H01L29/66 , H01L29/08 , H01L29/16
CPC分类号： H01L29/41741 , H01L29/086 , H01L29/105 , H01L29/1608 , H01L29/41725 , H01L29/41766 , H01L29/66068 , H01L29/7802 , H01L29/7827
摘要： A silicon carbide semiconductor device that is able to increase the gate reliability, and to provide a method for manufacturing the silicon carbide semiconductor device, and that includes: a source electrode selectively formed on a source region; a gate insulating film formed so as to extend over the source region; and a gate electrode formed on the gate insulating film. The source region includes a first source region located below the source electrode, and a second source region surrounding the first source region. The doping concentration in a superficial layer of the second source region is lower than the doping concentration in a superficial layer of the first source region. The doping concentration in the second source region is higher in a deep portion than in a superficial portion thereof.
摘要翻译：一种能够提高栅极可靠性并提供一种制造碳化硅半导体器件的方法的碳化硅半导体器件，其包括：源极选择性地形成在源极区上; 形成为在源极区域上延伸的栅极绝缘膜; 以及形成在栅极绝缘膜上的栅电极。源极区包括位于源电极下方的第一源极区域和围绕第一源极区域的第二源极区域。第二源极区的表面层中的掺杂浓度低于第一源区的表面层中的掺杂浓度。第二源极区域中的掺杂浓度在深部比在其表面部分高。

2. 发明申请

US20110000434A1 METHOD OF MANUFACTURING SILICON CARBIDE SEMICONDUCTOR DEVICE 审中-公开
标题翻译：制造碳化硅半导体器件的方法
公开(公告)号：US20110000434A1
公开(公告)日：2011-01-06
申请号：US12878435
申请日：2010-09-09
申请人： Takao SAWADA , Tomokatsu WATANABE
发明人： Takao SAWADA , Tomokatsu WATANABE
IPC分类号： C23C16/26
CPC分类号： H01L29/7802 , H01L21/045 , H01L21/046 , H01L21/0465 , H01L21/67109 , H01L29/1608 , H01L29/66068
摘要： A carbon film deposition apparatus includes an evaporator for evaporating an oxygen-containing hydrocarbon. The carbon film deposition apparatus also includes a gas inlet pipe for introducing the oxygen-containing hydrocarbon gas evaporated in the evaporator. The carbon film deposition apparatus further includes a deposition furnace for depositing a carbon protection film over all surfaces of a wafer by pyrolyzing the oxygen-containing hydrocarbon gas introduced through the gas inlet pipe.
摘要翻译：碳膜沉积设备包括用于蒸发含氧烃的蒸发器。碳膜沉积设备还包括用于将在蒸发器中蒸发的含氧烃气体引入的气体入口管。碳膜沉积设备还包括沉积炉，用于通过热解通过气体入口管引入的含氧烃气体，在晶片的所有表面上沉积碳保护膜。

3. 发明申请

US20140299891A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20140299891A1
公开(公告)日：2014-10-09
申请号：US14355737
申请日：2012-09-24
申请人： Shiro Hino , Naruhisa Miura , Akihiko Furukawa , Tomokatsu Watanabe , Kenichi Ohtsuka , Hiroshi Watanabe , Yuji Ebiike
发明人： Shiro Hino , Naruhisa Miura , Akihiko Furukawa , Tomokatsu Watanabe , Kenichi Ohtsuka , Hiroshi Watanabe , Yuji Ebiike
IPC分类号： H01L29/06 , H01L29/10 , H01L29/16
CPC分类号： H01L29/0619 , H01L29/0688 , H01L29/0692 , H01L29/0696 , H01L29/1095 , H01L29/1608 , H01L29/66068 , H01L29/7396 , H01L29/7802 , H01L29/808
摘要： A semiconductor device that can improve reliability while suppressing increase of a conduction loss or a switching loss. In the semiconductor device, when a two-dimensional shape on a main surface of the semiconductor substrate is an unit cell, the shape being a repeating unit of a plurality of well regions periodically disposed in a surface layer of a drift layer, one unit cell and another unit cell adjacent in an x-axis direction are disposed misaligned in a y-axis direction, and one unit cell and another unit cell adjacent in the y-axis direction are disposed misaligned in the x-axis direction.
摘要翻译：一种半导体器件，其可以在抑制导通损耗的增加或开关损耗的同时提高可靠性。在半导体装置中，当在半导体基板的主表面上的二维形状是单位电池时，形状是周期性地设置在漂移层的表面层中的多个阱区域的重复单元，一个单元电池并且在x轴方向上相邻的另一个单元单元在y轴方向上不对准地设置，并且在y轴方向上相邻的一个单位单元和另一个单位单元在x轴方向上不对准地设置。

4. 发明申请

US20090042375A1 METHOD OF MANUFACTURING SILICON CARBIDE SEMICONDUCTOR DEVICE 有权
标题翻译：制造碳化硅半导体器件的方法
公开(公告)号：US20090042375A1
公开(公告)日：2009-02-12
申请号：US12165841
申请日：2008-07-01
申请人： Takao Sawada , Tomokatsu Watanabe
发明人： Takao Sawada , Tomokatsu Watanabe
IPC分类号： H01L21/265
CPC分类号： H01L29/7802 , H01L21/045 , H01L21/046 , H01L21/0465 , H01L21/67109 , H01L29/1608 , H01L29/66068
摘要： A method of manufacturing a silicon carbide semiconductor device includes a step of ion-implanting an impurity in a surface of a silicon carbide wafer (1 and 2); a step of forming a carbon protection film (6) of a predetermined thickness over the entire surface of the silicon carbide wafer (1 and 2) having been ion-implanted with the impurity, by a chemical vapor deposition method that deposits a film by pyrolyzing a hydrocarbon gas; and a step of annealing the silicon carbide wafer (1 and 2) having been formed with the carbon protection film (6). Thereby, the carbon protection film (6) can be formed that contains extremely few contaminants, and prevents step bunching from creating on the surface of the silicon carbide wafer (1 and 2) and crystal defects created therein due to unbalanced thermal stress form increasing.
摘要翻译：制造碳化硅半导体器件的方法包括在碳化硅晶片（1和2）的表面离子注入杂质的步骤; 在通过离子注入杂质的碳化硅晶片（1和2）的整个表面上形成预定厚度的碳保护膜（6）的步骤，通过化学气相沉积法，通过热解沉积膜烃气; 以及退火已经形成有碳保护膜（6）的碳化硅晶片（1和2）的步骤。因此，可以形成含有极少污染物的碳保护膜（6），并且防止在碳化硅晶片（1和2）的表面上形成步骤聚集和由于不平衡的热应力增加而产生的晶体缺陷。

5. 发明授权

US09190468B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US09190468B2
公开(公告)日：2015-11-17
申请号：US14355737
申请日：2012-09-24
申请人： Shiro Hino , Naruhisa Miura , Akihiko Furukawa , Tomokatsu Watanabe , Kenichi Ohtsuka , Hiroshi Watanabe , Yuji Ebiike
发明人： Shiro Hino , Naruhisa Miura , Akihiko Furukawa , Tomokatsu Watanabe , Kenichi Ohtsuka , Hiroshi Watanabe , Yuji Ebiike
IPC分类号： H01L27/118 , H01L21/44 , H01L29/06 , H01L29/739 , H01L29/66 , H01L29/78 , H01L29/16 , H01L29/10 , H01L29/808
CPC分类号： H01L29/0619 , H01L29/0688 , H01L29/0692 , H01L29/0696 , H01L29/1095 , H01L29/1608 , H01L29/66068 , H01L29/7396 , H01L29/7802 , H01L29/808
摘要： A semiconductor device that can improve reliability while suppressing increase of a conduction loss or a switching loss. In the semiconductor device, when a two-dimensional shape on a main surface of the semiconductor substrate is an unit cell, the shape being a repeating unit of a plurality of well regions periodically disposed in a surface layer of a drift layer, one unit cell and another unit cell adjacent in an x-axis direction are disposed misaligned in a y-axis direction, and one unit cell and another unit cell adjacent in the y-axis direction are disposed misaligned in the x-axis direction.
摘要翻译：一种半导体器件，其可以在抑制导通损耗的增加或开关损耗的同时提高可靠性。在半导体装置中，当在半导体基板的主表面上的二维形状是单位电池时，形状是周期性地设置在漂移层的表面层中的多个阱区域的重复单元，一个单元电池并且在x轴方向上相邻的另一个单元单元在y轴方向上不对准地设置，并且在y轴方向上相邻的一个单位单元和另一个单位单元在x轴方向上不对准地设置。

6. 发明申请

US20140077232A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件及制造半导体器件的方法
公开(公告)号：US20140077232A1
公开(公告)日：2014-03-20
申请号：US14116067
申请日：2012-03-07
申请人： Shiro Hino , Naruhisa Miura , Akihiko Furukawa , Yukiyasu Nakao , Tomokatsu Watanabe , Masayoshi Tarutani , Yuji Ebiike , Masayuki Imaizumi , Sunao Aya
发明人： Shiro Hino , Naruhisa Miura , Akihiko Furukawa , Yukiyasu Nakao , Tomokatsu Watanabe , Masayoshi Tarutani , Yuji Ebiike , Masayuki Imaizumi , Sunao Aya
IPC分类号： H01L29/16 , H01L29/78
CPC分类号： H01L29/1608 , H01L21/0485 , H01L29/0615 , H01L29/0638 , H01L29/41766 , H01L29/45 , H01L29/66068 , H01L29/7802 , H01L29/7811 , H01L29/7816 , H01L29/7845 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device capable of suppressing time variation of a threshold voltage and a method of manufacturing the same. A semiconductor device according to the present invention comprises a drift layer formed on a semiconductor substrate, first well regions formed in a surface layer of the drift layer, being apart from one another, a gate insulating film formed, extending on the drift layer and each of the first well regions, a gate electrode selectively formed on the gate insulating film, a source contact hole penetrating through the gate insulating film and reaching the inside of each of the first well regions, and a residual compressive stress layer formed on at least a side surface of the source contact hole, in which a compressive stress remains.
摘要翻译：能够抑制阈值电压的时间变化的半导体器件及其制造方法。根据本发明的半导体器件包括形成在半导体衬底上的漂移层，形成在漂移层的表面层中的第一阱区彼此分开，形成在栅极绝缘膜上的栅极绝缘膜，在漂移层上延伸，每个选择性地形成在栅极绝缘膜上的栅极电极，穿过栅极绝缘膜并到达每个第一阱区域的内部的源极接触孔以及至少形成在第一阱区上的残留压应力层，源接触孔的侧表面，其中保持压缩应力。

7. 发明授权

US07820534B2 Method of manufacturing silicon carbide semiconductor device 有权
标题翻译：制造碳化硅半导体器件的方法
公开(公告)号：US07820534B2
公开(公告)日：2010-10-26
申请号：US12165841
申请日：2008-07-01
申请人： Takao Sawada , Tomokatsu Watanabe
发明人： Takao Sawada , Tomokatsu Watanabe
IPC分类号： H01L21/265
CPC分类号： H01L29/7802 , H01L21/045 , H01L21/046 , H01L21/0465 , H01L21/67109 , H01L29/1608 , H01L29/66068
摘要： A method of manufacturing a silicon carbide semiconductor device includes ion-implanting an impurity in a surface of a silicon carbide wafer, and forming a carbon protection film of a predetermined thickness over all surfaces of the silicon carbide wafer, which has been ion-implanted with the impurity, by a chemical vapor deposition method that deposits a film by pyrolyzing a hydrocarbon gas. The method also includes annealing the silicon carbide wafer after the forming the carbon protection film.
摘要翻译：制造碳化硅半导体器件的方法包括在碳化硅晶片的表面中离子注入杂质，并在已经离子注入的碳化硅晶片的所有表面上形成预定厚度的碳保护膜通过化学气相沉积法，通过热解烃气体沉积膜来形成杂质。该方法还包括在形成碳保护膜之后退火碳化硅晶片。

8. 发明授权

US09093361B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US09093361B2
公开(公告)日：2015-07-28
申请号：US14116067
申请日：2012-03-07
申请人： Shiro Hino , Naruhisa Miura , Akihiko Furukawa , Yukiyasu Nakao , Tomokatsu Watanabe , Masayoshi Tarutani , Yuji Ebiike , Masayuki Imaizumi , Sunao Aya
发明人： Shiro Hino , Naruhisa Miura , Akihiko Furukawa , Yukiyasu Nakao , Tomokatsu Watanabe , Masayoshi Tarutani , Yuji Ebiike , Masayuki Imaizumi , Sunao Aya
IPC分类号： H01L29/76 , H01L29/16 , H01L29/45 , H01L29/66 , H01L29/78 , H01L21/04 , H01L29/417 , H01L29/06
CPC分类号： H01L29/1608 , H01L21/0485 , H01L29/0615 , H01L29/0638 , H01L29/41766 , H01L29/45 , H01L29/66068 , H01L29/7802 , H01L29/7811 , H01L29/7816 , H01L29/7845 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device capable of suppressing time variation of a threshold voltage and a method of manufacturing the same. A semiconductor device according to the present invention comprises a drift layer formed on a semiconductor substrate, first well regions formed in a surface layer of the drift layer, being apart from one another, a gate insulating film formed, extending on the drift layer and each of the first well regions, a gate electrode selectively formed on the gate insulating film, a source contact hole penetrating through the gate insulating film and reaching the inside of each of the first well regions, and a residual compressive stress layer formed on at least a side surface of the source contact hole, in which a compressive stress remains.
摘要翻译：能够抑制阈值电压的时间变化的半导体器件及其制造方法。根据本发明的半导体器件包括形成在半导体衬底上的漂移层，形成在漂移层的表面层中的第一阱区彼此分开，形成在栅极绝缘膜上的栅极绝缘膜，在漂移层上延伸，每个选择性地形成在栅极绝缘膜上的栅极电极，穿过栅极绝缘膜并到达每个第一阱区域的内部的源极接触孔以及至少形成在第一阱区上的残留压应力层，源接触孔的侧表面，其中保持压缩应力。

9. 发明申请

US20140061675A1 SILICON CARBIDE SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SILICON CARBIDE SEMICONDUCTOR DEVICE 有权
标题翻译：硅碳化硅半导体器件及制造硅碳化硅半导体器件的方法
公开(公告)号：US20140061675A1
公开(公告)日：2014-03-06
申请号：US14116259
申请日：2012-05-31
申请人： Tomokatsu Watanabe , Naruhisa Miura , Masayuki Furuhashi , Shiro Hino , Toshikazu Tanioka
发明人： Tomokatsu Watanabe , Naruhisa Miura , Masayuki Furuhashi , Shiro Hino , Toshikazu Tanioka
IPC分类号： H01L29/16 , H01L29/66 , H01L29/78
CPC分类号： H01L29/41741 , H01L29/086 , H01L29/105 , H01L29/1608 , H01L29/41725 , H01L29/41766 , H01L29/66068 , H01L29/7802 , H01L29/7827
摘要： A silicon carbide semiconductor device that is able to increase the gate reliability, and to provide a method for manufacturing the silicon carbide semiconductor device, and that includes: a source electrode selectively formed on a source region; a gate insulating film formed so as to extend over the source region; and a gate electrode formed on the gate insulating film. The source region includes a first source region located below the source electrode, and a second source region surrounding the first source region. The doping concentration in a superficial layer of the second source region is lower than the doping concentration in a superficial layer of the first source region. The doping concentration in the second source region is higher in a deep portion than in a superficial portion thereof.
摘要翻译：一种能够提高栅极可靠性并提供一种制造碳化硅半导体器件的方法的碳化硅半导体器件，其包括：源极选择性地形成在源极区上; 形成为在源极区域上延伸的栅极绝缘膜; 以及形成在栅极绝缘膜上的栅电极。源极区包括位于源电极下方的第一源极区域和围绕第一源极区域的第二源极区域。第二源极区的表面层中的掺杂浓度低于第一源区的表面层中的掺杂浓度。第二源极区域中的掺杂浓度在深部比在其表面部分高。

10. 发明授权

US08252672B2 Silicon carbide semiconductor device comprising silicon carbide layer and method of manufacturing the same 有权
标题翻译：包含碳化硅层的碳化硅半导体器件及其制造方法
公开(公告)号：US08252672B2
公开(公告)日：2012-08-28
申请号：US12267040
申请日：2008-11-07
申请人： Tomokatsu Watanabe , Sunao Aya , Naruhisa Miura , Keiko Sakai , Shohei Yoshida , Toshikazu Tanioka , Yukiyasu Nakao , Yoichiro Tarui , Masayuki Imaizumi
发明人： Tomokatsu Watanabe , Sunao Aya , Naruhisa Miura , Keiko Sakai , Shohei Yoshida , Toshikazu Tanioka , Yukiyasu Nakao , Yoichiro Tarui , Masayuki Imaizumi
IPC分类号： H01L21/265
CPC分类号： H01L29/7802 , H01L21/046 , H01L21/0485 , H01L29/1608 , H01L29/66068 , H01L29/7828
摘要： A method of manufacturing a silicon carbide semiconductor device having a silicon carbide layer, the method including a step of implanting at least one of Al ions, B ions and Ga ions having an implantation concentration in a range not lower than 1E19 cm−3 and not higher than 1E21 cm−3 from a main surface of the silicon carbide layer toward the inside of the silicon carbide layer while maintaining the temperature of the silicon carbide layer at 175° C. or higher, to form a p-type impurity layer; and forming a contact electrode whose back surface establishes ohmic contact with a front surface of the p-type impurity layer on the front surface of the p-type impurity layer.
摘要翻译：一种制造具有碳化硅层的碳化硅半导体器件的方法，该方法包括以下步骤：注入注入浓度在1E19cm-3以上的Al离子，B离子和Ga离子中的至少一种，而不是高于1E21cm-3，从碳化硅层的主表面朝向碳化硅层的内部，同时将碳化硅层的温度保持在175℃以上，形成p型杂质层; 以及形成其背面与p型杂质层前表面上的p型杂质层的前表面欧姆接触的接触电极。

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