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    • 1. 发明授权
    • Thickened sidewall dielectric for memory cell
    • 用于存储单元的增厚的侧壁电介质
    • US07705389B2
    • 2010-04-27
    • US11847183
    • 2007-08-29
    • Ron WeimerKyu MinTom GraettingerNirmal Ramaswamy
    • Ron WeimerKyu MinTom GraettingerNirmal Ramaswamy
    • H01L29/788
    • H01L27/11568H01L27/115
    • Methods and devices are disclosed, such as those involving memory cell devices with improved charge retention characteristics. In one or more embodiments, a memory cell is provided having an active area defined by sidewalls of neighboring trenches. A layer of dielectric material is blanket deposited over the memory cell, and etched to form spacers on sidewalls of the active area. Dielectric material is formed over the active area, a charge trapping structure is formed over the dielectric material over the active area, and a control gate is formed over the charge trapping structure. In some embodiments, the charge trapping structure includes nanodots. In some embodiments, the width of the spacers is between about 130% and about 170% of the thickness of the dielectric material separating the charge trapping material and an upper surface of the active area.
    • 公开了诸如涉及具有改进的电荷保持特性的存储单元装置的方法和装置。 在一个或多个实施例中,提供具有由相邻沟槽的侧壁限定的有源区的存储单元。 一层电介质材料被覆盖在该存储单元上,并被蚀刻以在有源区的侧壁上形成间隔物。 在有源区上形成电介质材料,在有源区上方的电介质材料上形成电荷捕捉结构,在电荷俘获结构上方形成一个控制栅极。 在一些实施例中,电荷捕获结构包括纳米点。 在一些实施例中,间隔物的宽度在分离电荷俘获材料的电介质材料的厚度和活性区域的上表面之间的约130%至约170%之间。
    • 2. 发明申请
    • THICKENED SIDEWALL DIELECTRIC FOR MEMORY CELL
    • 用于记忆体的厚度小的电介质
    • US20120032252A1
    • 2012-02-09
    • US13276600
    • 2011-10-19
    • Ron WeimerKyu MinTom GraettingerNirmal Ramaswamy
    • Ron WeimerKyu MinTom GraettingerNirmal Ramaswamy
    • H01L29/792
    • H01L27/11568H01L27/115
    • Methods and devices are disclosed, such as those involving memory cell devices with improved charge retention characteristics. In one or more embodiments, a memory cell is provided having an active area defined by sidewalls of neighboring trenches. A layer of dielectric material is blanket deposited over the memory cell, and etched to form spacers on sidewalls of the active area. Dielectric material is formed over the active area, a charge trapping structure is formed over the dielectric material over the active area, and a control gate is formed over the charge trapping structure. In some embodiments, the charge trapping structure includes nanodots. In some embodiments, the width of the spacers is between about 130% and about 170% of the thickness of the dielectric material separating the charge trapping material and an upper surface of the active area.
    • 公开了诸如涉及具有改进的电荷保持特性的存储单元装置的方法和装置。 在一个或多个实施例中,提供具有由相邻沟槽的侧壁限定的有源区的存储单元。 一层电介质材料被覆盖在该存储单元上,并被蚀刻以在有源区的侧壁上形成间隔物。 在有源区上形成电介质材料,在有源区上方的电介质材料上形成电荷捕捉结构,在电荷俘获结构上方形成一个控制栅极。 在一些实施例中,电荷捕获结构包括纳米点。 在一些实施例中,间隔物的宽度在分离电荷俘获材料的电介质材料的厚度和活性区域的上表面之间的约130%至约170%之间。
    • 3. 发明授权
    • Thickened sidewall dielectric for memory cell
    • 用于存储单元的增厚的侧壁电介质
    • US08058140B2
    • 2011-11-15
    • US12757869
    • 2010-04-09
    • Ron WeimerKyu MinTom GraettingerNirmal Ramaswamy
    • Ron WeimerKyu MinTom GraettingerNirmal Ramaswamy
    • H01L21/76
    • H01L27/11568H01L27/115
    • Methods and devices are disclosed, such as those involving memory cell devices with improved charge retention characteristics. In one or more embodiments, a memory cell is provided having an active area defined by sidewalls of neighboring trenches. A layer of dielectric material is blanket deposited over the memory cell, and etched to form spacers on sidewalls of the active area. Dielectric material is formed over the active area, a charge trapping structure is formed over the dielectric material over the active area, and a control gate is formed over the charge trapping structure. In some embodiments, the charge trapping structure includes nanodots. In some embodiments, the width of the spacers is between about 130% and about 170% of the thickness of the dielectric material separating the charge trapping material and an upper surface of the active area.
    • 公开了诸如涉及具有改进的电荷保持特性的存储单元装置的方法和装置。 在一个或多个实施例中,提供具有由相邻沟槽的侧壁限定的有源区的存储单元。 一层电介质材料被覆盖在该存储单元上,并被蚀刻以在有源区的侧壁上形成间隔物。 在有源区上形成电介质材料,在有源区上方的电介质材料上形成电荷捕捉结构,在电荷俘获结构上方形成一个控制栅极。 在一些实施例中,电荷捕获结构包括纳米点。 在一些实施例中,间隔物的宽度在分离电荷俘获材料的电介质材料的厚度和活性区域的上表面之间的约130%至约170%之间。
    • 4. 发明申请
    • THICKENED SIDEWALL DIELECTRIC FOR MEMORY CELL
    • 用于记忆体的厚度小的电介质
    • US20100197131A1
    • 2010-08-05
    • US12757869
    • 2010-04-09
    • Ron WeimerKyu MinTom GraettingerNirmal Ramaswamy
    • Ron WeimerKyu MinTom GraettingerNirmal Ramaswamy
    • H01L21/302
    • H01L27/11568H01L27/115
    • Methods and devices are disclosed, such as those involving memory cell devices with improved charge retention characteristics. In one or more embodiments, a memory cell is provided having an active area defined by sidewalls of neighboring trenches. A layer of dielectric material is blanket deposited over the memory cell, and etched to form spacers on sidewalls of the active area. Dielectric material is formed over the active area, a charge trapping structure is formed over the dielectric material over the active area, and a control gate is formed over the charge trapping structure. In some embodiments, the charge trapping structure includes nanodots. In some embodiments, the width of the spacers is between about 130% and about 170% of the thickness of the dielectric material separating the charge trapping material and an upper surface of the active area.
    • 公开了诸如涉及具有改进的电荷保持特性的存储单元装置的方法和装置。 在一个或多个实施例中,提供具有由相邻沟槽的侧壁限定的有源区的存储单元。 一层电介质材料被覆盖在该存储单元上,并被蚀刻以在有源区的侧壁上形成间隔物。 在有源区上形成电介质材料,在有源区上方的电介质材料上形成电荷捕捉结构,在电荷俘获结构上方形成一个控制栅极。 在一些实施例中,电荷捕获结构包括纳米点。 在一些实施例中,间隔物的宽度在分离电荷俘获材料的电介质材料的厚度和活性区域的上表面之间的约130%至约170%之间。
    • 5. 发明授权
    • Thickened sidewall dielectric for memory cell
    • 用于存储单元的增厚的侧壁电介质
    • US08643082B2
    • 2014-02-04
    • US13276600
    • 2011-10-19
    • Ron WeimerKyu MinTom GraettingerNirmal Ramaswamy
    • Ron WeimerKyu MinTom GraettingerNirmal Ramaswamy
    • H01L29/792
    • H01L27/11568H01L27/115
    • Methods and devices are disclosed, such as those involving memory cell devices with improved charge retention characteristics. In one or more embodiments, a memory cell is provided having an active area defined by sidewalls of neighboring trenches. A layer of dielectric material is blanket deposited over the memory cell, and etched to form spacers on sidewalls of the active area. Dielectric material is formed over the active area, a charge trapping structure is formed over the dielectric material over the active area, and a control gate is formed over the charge trapping structure. In some embodiments, the charge trapping structure includes nanodots. In some embodiments, the width of the spacers is between about 130% and about 170% of the thickness of the dielectric material separating the charge trapping material and an upper surface of the active area.
    • 公开了诸如涉及具有改进的电荷保持特性的存储单元装置的方法和装置。 在一个或多个实施例中,提供具有由相邻沟槽的侧壁限定的有源区的存储单元。 一层电介质材料被覆盖在该存储单元上,并被蚀刻以在有源区的侧壁上形成间隔物。 在有源区上形成电介质材料,在有源区上方的电介质材料上形成电荷捕捉结构,在电荷俘获结构上形成一个控制栅极。 在一些实施例中,电荷捕获结构包括纳米点。 在一些实施例中,间隔物的宽度在分离电荷俘获材料的电介质材料的厚度和活性区域的上表面之间的约130%至约170%之间。
    • 6. 发明申请
    • THICKENED SIDEWALL DIELECTRIC FOR MEMORY CELL
    • 用于记忆体的厚度小的电介质
    • US20090057744A1
    • 2009-03-05
    • US11847183
    • 2007-08-29
    • Ron WeimerKyu MinTom GraettingerNirmal Ramaswamy
    • Ron WeimerKyu MinTom GraettingerNirmal Ramaswamy
    • H01L29/788H01L21/336
    • H01L27/11568H01L27/115
    • Methods and devices are disclosed, such as those involving memory cell devices with improved charge retention characteristics. In one or more embodiments, a memory cell is provided having an active area defined by sidewalls of neighboring trenches. A layer of dielectric material is blanket deposited over the memory cell, and etched to form spacers on sidewalls of the active area. Dielectric material is formed over the active area, a charge trapping structure is formed over the dielectric material over the active area, and a control gate is formed over the charge trapping structure. In some embodiments, the charge trapping structure includes nanodots. In some embodiments, the width of the spacers is between about 130% and about 170% of the thickness of the dielectric material separating the charge trapping material and an upper surface of the active area.
    • 公开了诸如涉及具有改进的电荷保持特性的存储单元装置的方法和装置。 在一个或多个实施例中,提供具有由相邻沟槽的侧壁限定的有源区的存储单元。 一层电介质材料被覆盖在该存储单元上,并被蚀刻以在有源区的侧壁上形成间隔物。 在有源区上形成电介质材料,在有源区上方的电介质材料上形成电荷捕捉结构,在电荷俘获结构上方形成一个控制栅极。 在一些实施例中,电荷捕获结构包括纳米点。 在一些实施例中,间隔物的宽度在分离电荷俘获材料的电介质材料的厚度和活性区域的上表面之间的约130%至约170%之间。