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1. 发明授权

US06734539B2 Stacked module package 有权
标题翻译：堆叠模块包
公开(公告)号：US06734539B2
公开(公告)日：2004-05-11
申请号：US09964009
申请日：2001-09-26
申请人： Yinon Degani , Thomas Dixon Dudderar , Liguo Sun , Meng Zhao
发明人： Yinon Degani , Thomas Dixon Dudderar , Liguo Sun , Meng Zhao
IPC分类号： H01L2302
CPC分类号： H05K1/144 , H01L23/552 , H01L23/66 , H01L24/48 , H01L24/73 , H01L25/0652 , H01L25/105 , H01L25/18 , H01L2223/6688 , H01L2224/05599 , H01L2224/16145 , H01L2224/16225 , H01L2224/32225 , H01L2224/45099 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73265 , H01L2224/85399 , H01L2225/1023 , H01L2225/1058 , H01L2924/00014 , H01L2924/10253 , H01L2924/14 , H01L2924/15151 , H01L2924/15153 , H01L2924/15311 , H01L2924/15331 , H01L2924/19105 , H01L2924/3025 , H01L2924/00012 , H01L2924/00 , H01L2224/45015 , H01L2924/207
摘要： The specification describes an MCM package which contains both a digital MCM and an RF MCM in a stacked configuration. The package contains means for isolating RF signals from digital signals. In one case the digital MCM substrate is attached to the system substrate and the RF MCM substrate is attached to the digital MCM substrate. Solder bumps are used for attachment in an arrangement resembling a BGA. For high density packages, at least the digital MCM comprises stacked IC chips. In the embodiment with the RF MCM substrate on the top of the stack, Passive Through Interconnections (PTIs) are made through the digital MCM substrate, and electrically isolated therefrom. The passive through interconnections are made through the solder bumps between boards and interconnected using a passive (with respect to the digital MCM board) through hole. Both the RF ground and the RF input can be isolated using PTIs. For additional isolation, the solder bumps comprising the PTIs are shielded with a Faraday cage. The Faraday cage comprises an array of solder bumps surrounding the solder bump RF conductors.
摘要翻译：该规范描述了包含堆叠配置中的数字MCM和RF MCM的MCM包。该封装包含用于隔离RF信号与数字信号的装置。在一种情况下，数字MCM基板附着到系统基板，并且RF MCM基板附接到数字MCM基板。焊接凸块用于在类似于BGA的布置中的附接。对于高密度封装，至少数字MCM包括堆叠的IC芯片。在堆叠顶部具有RF MCM衬底的实施例中，通过数字MCM衬底制作被动通孔互连（PTI），并与之电隔离。被动通过互连通过板之间的焊料凸块制成，并使用无源（相对于数字MCM板）通孔进行互连。 RF接地和RF输入都可以使用PTI进行隔离。为了进一步隔离，包含PTI的焊料凸块用法拉第笼保护。法拉第笼包括围绕焊料凸块RF导体的焊料凸块阵列。

2. 发明授权

US06369444B1 Packaging silicon on silicon multichip modules 失效
标题翻译：包装硅多芯片模块
公开(公告)号：US06369444B1
公开(公告)日：2002-04-09
申请号：US09081448
申请日：1998-05-19
申请人： Yinon Degani , Thomas Dixon Dudderar , King Lien Tai
发明人： Yinon Degani , Thomas Dixon Dudderar , King Lien Tai
IPC分类号： H01L2334
CPC分类号： H01L25/0652 , H01L2224/16225 , H01L2924/15151 , H01L2924/15321
摘要： The specification describes interconnection assemblies for silicon-on-silicon multichip modules. The silicon-on-silicon MCMs are mounted on epoxy/glass laminates which have a coefficient of thermal expansion (CTE) that essentially matches the CTE of silicon. In the preferred embodiment the assembly is a PC card with card edge connectors, i.e. without fixed solder interlevel interconnections, so that the CTE of the epoxy laminate comprising the card can be modified without regard to potential mismatch with a mother board.
摘要翻译：该规范描述了硅上硅多芯片模块的互连组件。硅上硅MCM安装在具有基本上与硅的CTE匹配的热膨胀系数（CTE）的环氧树脂/玻璃层压板上。在优选实施例中，组件是具有卡边缘连接器的PC卡，即没有固定的焊料层间互连，使得可以修改包含卡的环氧树脂层压体的CTE，而不考虑与母板的潜在不匹配。

3. 发明授权

US06297551B1 Integrated circuit packages with improved EMI characteristics 有权
标题翻译：集成电路封装具有改进的EMI特性
公开(公告)号：US06297551B1
公开(公告)日：2001-10-02
申请号：US09401690
申请日：1999-09-22
申请人： Thomas Dixon Dudderar , Dean Paul Kossives , Yee Leng Low
发明人： Thomas Dixon Dudderar , Dean Paul Kossives , Yee Leng Low
IPC分类号： H01L2334
CPC分类号： H01L23/055 , H01L23/49833 , H01L23/552 , H01L24/48 , H01L2224/05599 , H01L2224/16 , H01L2224/16225 , H01L2224/48091 , H01L2224/85399 , H01L2924/00014 , H01L2924/14 , H01L2924/15153 , H01L2924/1517 , H01L2924/15311 , H01L2924/1532 , H01L2924/3025 , H05K1/0218 , H05K1/141 , H05K3/3442 , H01L2224/45015 , H01L2924/207 , H01L2924/00 , H01L2224/45099
摘要： The specification describes a recessed chip MCM package with integrated electromagnetic shielding. The surfaces of the cavity which houses the IC devices are coated with metallization. The normally exposed top and side surfaces of the MCM package are also metallized. A solder wall is provided on the interconnect PCB which seals the gap between the MCM tile and the PCB interconnect substrate. The solder wall can be formed using standard solder bump technology, and the seal between the MCM and the PCB may be made during the same reflow operation that is used to flip-chip bond the MCM tile to the PCB.
摘要翻译：该规范描述了具有集成电磁屏蔽的嵌入式芯片MCM封装。容纳IC器件的腔的表面涂有金属化。通常暴露的MCM封装的顶部和侧面也被金属化。在互连PCB上提供焊接壁，其密封MCM瓦片和PCB互连基板之间的间隙。可以使用标准焊料凸块技术形成焊接壁，并且可以在用于将MCM瓦片贴合到PCB的相同回流操作期间进行MCM和PCB之间的密封。

4. 发明授权

US06282100B1 Low cost ball grid array package 有权
标题翻译：低成本球栅阵列封装
公开(公告)号：US06282100B1
公开(公告)日：2001-08-28
申请号：US09346100
申请日：1999-07-01
申请人： Yinon Degani , Thomas Dixon Dudderar , Robert Charles Frye
发明人： Yinon Degani , Thomas Dixon Dudderar , Robert Charles Frye
IPC分类号： H05K118
CPC分类号： H01L23/49833 , H01L24/45 , H01L24/48 , H01L25/0657 , H01L2224/16145 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2225/0651 , H01L2225/06517 , H01L2225/06572 , H01L2225/06586 , H01L2924/01079 , H01L2924/10253 , H01L2924/14 , H01L2924/00014 , H01L2924/00
摘要： The specification describes a high density I/O IC package in which the IC chip is bonded to a silicon intermediate interconnection substrate (IIS), and the IIS is wire bonded to a printed wiring board. This marriage of wire bond technology with high density I/O IC chips results in a low cost, high reliability, state of the art IC package.
摘要翻译：该说明书描述了IC芯片与硅中间互连基板（IIS）接合的高密度I / O IC封装，并且IIS被引线接合到印刷电路板。这种线接技术与高密度I / O IC芯片的结合导致低成本，高可靠性，最先进的IC封装。

5. 发明授权

US4102661A Caustic ray use of the drawdown zone of an optical fiber preform to control the drawing of the fiber 失效
标题翻译：苛性射线使用光纤预制棒的牵伸区来控制纤维的拉伸
公开(公告)号：US4102661A
公开(公告)日：1978-07-25
申请号：US774139
申请日：1977-03-03
申请人： Thomas Dixon Dudderar , Peter Gerald Simpkins
发明人： Thomas Dixon Dudderar , Peter Gerald Simpkins
IPC分类号： C03B37/027 , C03B37/025 , G01B11/24 , G01M11/00 , G01M11/02 , G02B6/00 , G02B6/26 , C03B37/02
CPC分类号： G01M11/37 , C03B37/0253 , G01B11/24 , G02B6/262 , C03B2205/45
摘要： A technique for monitoring the drawdown zone of an optical fiber preform is disclosed. The technique involves detecting the caustic rays emanating from the drawdown zone. Analysis of these rays allows one to determine the geometric properties of both the drawdown zone and the resultant optical fiber. In addition, detailed information concerning the index of refraction distribution in the fiber may be obtained. The process is amenable to realtime applications during the drawing of an optical fiber.
摘要翻译：公开了一种用于监测光纤预制棒的牵伸区的技术。该技术涉及检测从下降区发出的苛性射线。这些光线的分析允许人们确定下拉区域和所得光纤两者的几何性质。此外，可以获得关于纤维中的折射率分布的详细信息。该过程适用于在光纤拉制期间的实时应用。

6. 发明授权

US06396711B1 Interconnecting micromechanical devices 有权
标题翻译：互连微机械设备
公开(公告)号：US06396711B1
公开(公告)日：2002-05-28
申请号：US09588336
申请日：2000-06-06
申请人： Yinon Degani , Thomas Dixon Dudderar , King Lien Tai
发明人： Yinon Degani , Thomas Dixon Dudderar , King Lien Tai
IPC分类号： H05K702
CPC分类号： B81B7/007 , H01L2224/16225 , H01L2224/48227 , H01L2924/10253 , H01L2924/19107 , H01L2924/00
摘要： The specification describes interconnection strategies for micro-electronic machined mechanical systems (MEMS). Typical MEMS device array comprise a large number of individual mechanical devices each electrically driven by multi-chip modules (MCMs). High density interconnection is achieved by mounting the MCMs mounted on both sides of a system interconnection substrate. Overall interconnection length is reduced by locating the MCMs in a common circuit driving a given mechanical element on opposite sides of the system interconnection substrate and interconnecting them using vias through the substrate. Rapid replacement/repair is facilitated by mounted all active elements in sockets using contact pin arrays for electrical connections. In service reliability is obtained by providing spare sockets for redundant MCMs.
摘要翻译：该规范描述了微电子加工机械系统（MEMS）的互连策略。典型的MEMS器件阵列包括大量由多芯片模块（MCM）电驱动的各个机械装置。通过安装安装在系统互连基板两侧的MCM来实现高密度互连。通过将MCM定位在驱动系统互连基板的相对侧上的给定机械元件的公共电路中并且使用通孔穿过基板将它们互连来减小总互连长度。通过将所有有源元件安装在插座中，使用接触针阵列进行电气连接，便于快速更换/维修。通过为冗余MCM提供备用插座来获得服务可靠性。

7. 发明授权

US06205745B1 High speed flip-chip dispensing 有权
标题翻译：高速倒装芯片分配
公开(公告)号：US06205745B1
公开(公告)日：2001-03-27
申请号：US09134843
申请日：1998-08-14
申请人： Thomas Dixon Dudderar , Charles Gutentag
发明人： Thomas Dixon Dudderar , Charles Gutentag
IPC分类号： B65B1100
CPC分类号： H01L21/67132 , H01L21/6838 , H01L2224/75 , H01L2224/7565 , Y10T29/53191
摘要： The specification describes a method for dispensing IC chips from a chip carrier tape for a flip-chip assembly operation. In a conventional assembly operation, the solder bumped side of the chip is the top side of the chip as loaded on the tape, and is normally the side of the chip that engages the head of the pick tool. For flip-chip assembly it is necessary to invert the chip for solder bonding to an interconnect substrate. In the technique of the invention, the chip carrier tape is inverted and inserted into the dispensing machine upside down. The IC chips are then ejected through the back of the tape instead of being lifted from the from of the tape. In this way the pick tool head engages the back side of the solder bumped chip and the chip is in the proper orientation for flip-chip placement and bonding on the interconnect substrate. Carrier tapes designed for through-tape dispensing are also disclosed.
摘要翻译：该说明书描述了用于从用于倒装芯片组装操作的芯片载带分配IC芯片的方法。在传统的组装操作中，芯片的焊料凸起侧是装载在带上的芯片的顶侧，并且通常是芯片的接合拾取工具的头部的侧面。对于倒装芯片组装，需要将用于焊接焊接的芯片反转到互连衬底。在本发明的技术中，芯片载带被倒置并倒置插入分配机器中。然后将IC芯片从胶带背面排出，而不是从胶带中提起。以这种方式，拾取工具头接合焊料凸起的芯片的背面，并且芯片处于适当的取向以便在互连衬底上进行倒装芯片放置和结合。还公开了用于通过胶带分配的载带。

8. 发明授权

US6160715A Translator for recessed flip-chip package 有权
标题翻译：翻译器用于嵌入式倒装芯片封装
公开(公告)号：US6160715A
公开(公告)日：2000-12-12
申请号：US149804
申请日：1998-09-08
申请人： Yinon Degani , Thomas Dixon Dudderar , Robert Charles Frye , King Lien Tai
发明人： Yinon Degani , Thomas Dixon Dudderar , Robert Charles Frye , King Lien Tai
IPC分类号： H01L23/12 , H01L23/13 , H01L23/14 , H01L23/31 , H01L23/498 , H01L23/52 , H05K7/10
CPC分类号： H01L23/49827 , H01L23/13 , H01L23/147 , H01L23/3128 , H01L2224/16 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/15153 , H01L2924/15173 , H05K2201/10477
摘要： The specification describes a recessed chip IC package in which the IC chip is bonded to a translator, and power and ground planes for IC power and ground interconnections are formed on separate interconnect levels of the translator. The multilevel interconnection capability of the translator allows crossovers, and allows power and ground pins from the IC chip to be both isolated from signal I/Os, and consolidated into fewer interconnections going to the next board level. The translator also has a large area outboard of the IC chip area to allow fan out from high pin count chips to large pitch interconnection sites for interconnection to the next board level.
摘要翻译：本说明书描述了一种嵌入式芯片IC封装，其中IC芯片与转换器接合，并且用于IC电源和接地互连的电源和接地层形成在转换器的单独互连电平上。转换器的多电平互联能力允许交叉，并允许IC芯片的电源和接地引脚与信号I / O隔离，并且整合到进入下一个电路板级别的较少互连。翻译器还具有IC芯片面积大的外部面积，可将风扇从高引脚数芯片到大间距互连位置互连到下一个板级。

9. 发明授权

US5767447A Electronic device package enclosed by pliant medium laterally confined by a plastic rim member 失效
标题翻译：电子器件封装由横向由塑料边缘构件限制的柔性介质包围
公开(公告)号：US5767447A
公开(公告)日：1998-06-16
申请号：US567659
申请日：1995-12-05
申请人： Thomas Dixon Dudderar , Byung Joon Han , Venkataram Reddy Raju , George John Shevchuk
发明人： Thomas Dixon Dudderar , Byung Joon Han , Venkataram Reddy Raju , George John Shevchuk
IPC分类号： H01L23/28 , H01L23/04 , H01L23/057 , H01L23/24 , H01L23/29 , H01L23/31 , H01L23/498 , H01L23/02
CPC分类号： H01L23/49816 , H01L23/04 , H01L23/057 , H01L23/24 , H01L24/32 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/83385 , H01L24/45 , H01L24/48 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/10253 , H01L2924/12036 , H01L2924/14 , H01L2924/15311 , H01L2924/15787 , H01L2924/16195 , H01L2924/181 , H01L2924/19041 , H01L2924/3025 , H01L2924/351
摘要： The bottom and side surfaces of an electronic device, such as an integrated circuit chip or a multichip assembly, are surrounded by a soft gel medium. The gel medium is laterally confined by a rigid plastic rim that is epoxy-bonded in place along its perimeter. A plate, made of plastic or metal, can be attached to the top surface of the rim, in order to provide a cover for the package.
摘要翻译：诸如集成电路芯片或多芯片组件的电子设备的底部和侧表面被软的凝胶介质包围。凝胶介质通过刚性塑料边缘横向限制，该刚性塑料边缘沿其周边环氧粘合就位。由塑料或金属制成的板可以附接到轮辋的顶面，以便为包装提供一个盖子。

10. 发明授权

US06251705B1 Low profile integrated circuit packages 有权
标题翻译：薄型集成电路封装
公开(公告)号：US06251705B1
公开(公告)日：2001-06-26
申请号：US09425706
申请日：1999-10-22
申请人： Yinon Degani , Thomas Dixon Dudderar , King Lien Tai
发明人： Yinon Degani , Thomas Dixon Dudderar , King Lien Tai
IPC分类号： H01L2148
CPC分类号： H01L24/81 , H01L2224/05124 , H01L2224/05147 , H01L2224/05572 , H01L2224/05573 , H01L2224/05671 , H01L2224/16145 , H01L2224/81801 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01075 , H01L2924/014 , H01L2924/10253 , H01L2924/10329 , H01L2924/12042 , H01L2924/14 , H01L2924/15787 , H01L2924/19041 , H01L2924/19043 , H01L2924/00 , H01L2924/00014
摘要： The specification describes methods for manufacturing thin tiles for IC packages using thinning techniques. The method includes the step of thinning the IC devices in chip form. This is achieved at the final stage of assembly where the chips are flip-chip bonded to the substrate and the backside of the chips is exposed for thinning. Using this approach, final chip thickness of the order of 2-8 mils can be produced and overall package thickness is dramatically reduced.
摘要翻译：本说明书描述了使用稀疏技术制造IC封装薄片的方法。该方法包括以芯片形式稀疏IC器件的步骤。这在组装的最后阶段实现，其中芯片被倒装连接到基板，并且芯片的背面暴露以使其变薄。使用这种方法，可以产生2-8密耳数量级的最终芯片厚度，并且总体封装厚度显着降低。

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