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    • 1. 发明授权
    • Arithmetical method for digital differential analyzer
    • 数字差分分析仪的算术方法
    • US4414640A
    • 1983-11-08
    • US294061
    • 1981-08-18
    • Shigeru YabuuchiTakeyuki Endoh
    • Shigeru YabuuchiTakeyuki Endoh
    • G06F7/64G06F7/57G06F17/10
    • G06F7/483G06F17/10
    • A method of operation of a digital differential analyzer for performing the operation: ##EQU1## where Y is an integrand, .DELTA.Y is an increment of an input variable, R is a residue of the integrated value of the integrand, .DELTA.X is an increment of an independent variable, .DELTA.Z is an output increment of the integrated value of the integrand, K is a constant and n is an input number (a positive integer), in the ith iteration, uses a first mantissa M.sub.1, a second mantissa M.sub.2, a first exponent E.sub.1 and a second exponent E.sub.2 for expressing the abovementioned equation as follows, ##EQU2## then adjusts the radix points of the first and second mantissae in the bit number corresponding to the difference between the first and second exponents to adjust the mantissa portion to the greater exponent of the two, and thereafter calculates the mantissa portion to perform the abovementioned arithmetical operation and to obtain .DELTA.Z and R; the improvement wherein the mantissa portion of .DELTA.Z is expressed in terms of m (.gtoreq.2) bits by adding the most-significant bit corresponding to the first bit above the radix point to bits below the radix point and the radix point is then adjusted in accordance with the result of addition in order to obtain .DELTA.Z and R in accordance with the quantity of the result of addition for each iteration.
    • 一种用于执行该操作的数字差分分析仪的操作方法:其中Y是被积函数,ΔTA是输入变量的增量,R是被积函数的积分值的残差,DELTA X是增量 的独立变量,DELTA Z是被积函数的积分值的输出增量,K是常数,n是输入数(正整数),在第i次迭代中,使用第一尾数M1,第二尾数M2 ,用于表示上述等式的第一指数E1和第二指数E2如下:然后调整与第一和第二指数之间的差对应的比特数中的第一和第二马尾的基数,以调整尾数 部分到两者的较大指数,然后计算尾数部分以执行上述算术运算并获得DELTA Z和R; 通过将与基数点之上的第一位相对应的最高有效位相加到基数低于基数点的位来将DELTA Z的尾数部分表示为m(> / = 2)比特的改进,然后小数点 根据添加结果进行调整,以便根据每次迭代的加法结果的数量获得DELTA Z和R。
    • 3. 发明授权
    • Method of generating time delay
    • 产生延时的方法
    • US4497035A
    • 1985-01-29
    • US337292
    • 1982-01-05
    • Shigeru YabuuchiTakeyuki EndohKazuyuki KodamaJushi Ide
    • Shigeru YabuuchiTakeyuki EndohKazuyuki KodamaJushi Ide
    • G06F7/64G06F17/13G06F17/17H03H17/00H03H17/02H03H17/08G06F15/32G06J1/02
    • G06F17/13G06F7/64
    • In order to deliver an input signal of each operation cycle after a desired time delay, there are disposed data memory means for storing the input signal, counter means for appointing write addresses of the data memory means, and address memory means for appointing read addresses of the data memory means. The address memory means is divided into partial memory areas equal in number to time delay elements, whereupon while sampling the input signal at a predetermined sampling period and changing the count value of the counter means one by one for each of the desired time delay elements at each sampling point, the variations of the input signal in a sampling interval between the particular sampling point and the adjacent sampling point are successively written into the memory means. Further, while changing the contents of the partial memory areas corresponding to the desired time delay element to the number of the time delay elements in each sampling interval, the variations in a sampling interval preceding a predetermined sampling number to the particular sampling interval are successively read out from the memory means. The input signal of each operation cycle in the preceding sampling interval is presumed by an interpolation operation based on the variation and the sampling period, and the result is used as an output signal of the desired time delay element.
    • 为了在期望的时间延迟之后传送每个操作周期的输入信号,存在用于存储输入信号的数据存储装置,用于指定数据存储装置的写地址的计数器装置,以及用于指定数据存储装置的读地址的地址存储装置 数据存储装置。 地址存储器装置被分成数量等于时间延迟元件的部分存储器区域,然后在预定的采样周期对输入信号进行采样,并且针对每个期望的时间延迟元件逐个改变计数器装置的计数值 每个采样点,特定采样点和相邻采样点之间的采样间隔中的输入信号的变化被连续地写入存储装置。 此外,在将每个采样间隔中的期望时间延迟元件的部分存储器区域的内容改变为时间延迟元件的数量的同时,依次读取预定采样数之前的采样间隔与特定采样间隔的变化 从记忆的方式出来。 在前一采样间隔中的每个操作周期的输入信号由基于变化和采样周期的内插操作推测,并且该结果被用作期望的时间延迟元件的输出信号。