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1. 发明申请

US20130236767A1 CONNECTED POROUS SHEET AND METHOD FOR PRODUCING THE SAME, SEPARATOR FOR NON-AQUEOUS SECONDARY BATTERY, AND NON-AQUEOUS SECONDARY BATTERY, AND METHOD FOR PRODUCING THE SAME 有权
标题翻译：连接的多孔板及其制造方法，非水性二次电池用隔离器和非水性二次电池及其制造方法
公开(公告)号：US20130236767A1
公开(公告)日：2013-09-12
申请号：US13882652
申请日：2011-10-21
申请人： Satoshi Nishikawa , Hiroki Sano , Takashi Yoshitomi
发明人： Satoshi Nishikawa , Hiroki Sano , Takashi Yoshitomi
IPC分类号： H01M2/16 , H01M2/14
CPC分类号： H01M2/162 , H01M2/145 , H01M2/1653 , H01M2/1673 , H01M2/1686 , H01M10/052 , H01M10/0566 , Y02E60/122 , Y02P70/54 , Y10T156/10 , Y10T156/1062
摘要： An example of the present invention is provided with porous sheets 11, 21 each formed by layering a porous base material including a polyolefin and a heat-resistant porous layer including a heat-resistant resin. The porous sheets 11, 21, respectively, are connected at connecting regions 15a and 15b, 25a and 25b, respectively, which have been formed by thermal fusion of the heat-resistant porous layers facing each other by folding the sheets. Furthermore, the porous sheets 11, 21 are additionally connected at a connecting region 27 that has been formed by thermal fusion.
摘要翻译：本发明的实施例提供有多孔片11,21，它们通过层压包括聚烯烃的多孔基材和包含耐热树脂的耐热多孔层形成。多孔片11,21分别通过折叠片材而分别通过耐热多孔层彼此面对而形成的连接区域15a和15b，25a和25b连接。此外，多孔片11,21在通过热熔形成的连接区域27附加地连接。

2. 发明授权

US06998663B2 Semiconductor device having capacitor and method of manufacturing the same 失效
公开(公告)号：US06998663B2
公开(公告)日：2006-02-14
申请号：US10770489
申请日：2004-02-04
申请人： Takashi Yoshitomi , Masahiko Matsumoto
发明人： Takashi Yoshitomi , Masahiko Matsumoto
IPC分类号： H01L27/108 , H01L29/76 , H01L29/94 , H01L31/119
CPC分类号： H01L28/40
摘要： A semiconductor device, comprising a first wiring formed in a first insulating film, a second insulating film formed on the first insulating film, a first electrode film selectively formed on the second insulating film, a third insulating film formed on the first electrode film, and having an end portion and a central portion, wherein the end portion has a thickness thinner than the central portion, a second electrode film formed on the central portion of the third insulating film such that the second electrode film faces the first electrode film.

3. 发明授权

US06642560B2 MOSFET with a thin gate insulating film 失效
标题翻译：具有薄栅绝缘膜的MOSFET
公开(公告)号：US06642560B2
公开(公告)日：2003-11-04
申请号：US10160036
申请日：2002-06-04
申请人： Hisayo Momose , Hiroshi Iwai , Masanobu Saito , Tatsuya Ohguro , Mizuki Ono , Takashi Yoshitomi , Shinichi Nakamura
发明人： Hisayo Momose , Hiroshi Iwai , Masanobu Saito , Tatsuya Ohguro , Mizuki Ono , Takashi Yoshitomi , Shinichi Nakamura
IPC分类号： H01L2976
CPC分类号： H01L29/66575 , H01L21/2255 , H01L21/2256 , H01L21/28211 , H01L27/0629 , H01L27/088 , H01L29/42364 , H01L29/42372 , H01L29/78
摘要： A semiconductor device comprises: a p-type semiconductor substrate (1); an insulating film (3); a gate electrode (2) formed on the substrata via the insulating film; and an n-type source/drain region (5) formed on both sides of a channel forming region (4) located under the gate electrode (2) formed on the substrate (1). In particular, the thickness (Tox) of the insulating film (3) is determined to be less than 2.5 nm at conversion rate of silicon oxide film (silicon oxide equivalent thickness); a gate length (Lg) of the gate electrode (2) is determined to be equal to or lass than 0.3 &mgr;m; and further a voltage applied to the gate electrode (2) and the drain region (6) is determined to be 1.3 V or less. Therefore, in the MOSFET having the tunneling gate oxide film (3), the reliability of the transistor under the hot carrier stress can be improved, and the gate leakage current can be reduced markedly, so that the transistor characteristics can be improved markedly.
摘要翻译：半导体器件包括：p型半导体衬底（1）; 绝缘膜（3）; 经由所述绝缘膜形成在所述基体上的栅电极（2）以及形成在形成在基板（1）上的栅电极（2）下方的沟道形成区域（4）的两侧的n型源极/漏极区域（5）。特别地，绝缘膜（3）的厚度（Tox）在氧化硅膜的转换率（氧化硅当量厚度））被确定为小于2.5nm。栅电极（2）的栅极长度（Lg）被确定为等于或小于0.3μm; 并且进一步施加到栅极（2）和漏极区（6）的电压被确定为1.3V或更小。因此，在具有隧穿栅极氧化膜（3）的MOSFET中，可以提高热载流子应力下的晶体管的可靠性，并且可以显着降低栅极漏电流，从而可以显着提高晶体管特性。

4. 发明授权

US06229164B1 MOSFET with a thin gate insulating film 失效
标题翻译：具有薄栅绝缘膜的MOSFET
公开(公告)号：US06229164B1
公开(公告)日：2001-05-08
申请号：US09440938
申请日：1999-11-16
申请人： Hisayo Momose , Hiroshi Iwai , Masanobu Saito , Tatsuya Ohguro , Mizuki Ono , Takashi Yoshitomi , Shinichi Nakamura
发明人： Hisayo Momose , Hiroshi Iwai , Masanobu Saito , Tatsuya Ohguro , Mizuki Ono , Takashi Yoshitomi , Shinichi Nakamura
IPC分类号： H01L2976
CPC分类号： H01L29/66575 , H01L21/2255 , H01L21/2256 , H01L21/28211 , H01L27/0629 , H01L27/088 , H01L29/42364 , H01L29/42372 , H01L29/78
摘要： A semiconductor device comprises: a p-type semiconductor substrate (1); an insulating film (3); a gate electrode (2) formed on the substrate via the insulating film; and an n-type source/drain region (5) formed on both sides of a channel forming region (4) located under the gate electrode (2) formed on the substrate (1). In particular, the thickness (TOX) of the insulating film (3) is determined to be less than 2.5 nm at conversion rate of silicon oxide film (silicon oxide equivalent thickness); a gate length (Lg) of the electrode (2) is determined to be equal to or less than 0.3 &mgr;m; and further a voltage applied to the gate electrode (2) and the drain region (6) is determined to be 1.5 V or less. Therefore, in the MOSFET having the tunneling gate oxide film (3), the reliability of the transistor under the hot carrier stress can be improved, and the gate leakage current can be reduced markedly, so that the transistor characteristics can be improved markedly.
摘要翻译：半导体器件包括：p型半导体衬底（1）; 绝缘膜（3）; 经由所述绝缘膜形成在所述基板上的栅电极（2）以及形成在形成在基板（1）上的栅电极（2）下方的沟道形成区域（4）的两侧的n型源极/漏极区域（5）。特别地，绝缘膜（3）的厚度（TOX）在氧化硅膜的转换率（氧化硅当量厚度））被确定为小于2.5nm。电极（2）的栅极长度（Lg）被确定为等于或小于0.3μm; 并且进一步施加到栅极（2）和漏极区（6）的电压被确定为1.5V或更小。因此，在具有隧穿栅极氧化膜（3）的MOSFET中，可以提高热载流子应力下的晶体管的可靠性，并且可以显着降低栅极漏电流，从而可以显着提高晶体管特性。

5. 发明授权

US5955761A Semiconductor device and manufacturing method thereof 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US5955761A
公开(公告)日：1999-09-21
申请号：US69980
申请日：1998-04-30
申请人： Takashi Yoshitomi , Hiroshi Iwai , Masanobu Saito , Hisayo Momose , Tatsuya Ohguro , Mizuki Ono
发明人： Takashi Yoshitomi , Hiroshi Iwai , Masanobu Saito , Hisayo Momose , Tatsuya Ohguro , Mizuki Ono
IPC分类号： H01L21/265 , H01L21/336 , H01L21/8238 , H01L27/092 , H01L29/08 , H01L29/45 , H01L29/78 , H01L27/088
CPC分类号： H01L29/66628 , H01L21/2652 , H01L21/823864 , H01L27/0928 , H01L29/0847 , H01L29/456 , H01L29/78 , H01L29/7833 , Y10S257/90
摘要： A semiconductor device capable of restraining a short channel effect and obtaining a current drivability that is as high as possible includes a semiconductor substrate, a gate insulating film formed on the surface of this substrate, a gate electrode formed on this gate insulating film and side wall insulating films formed on this gate electrode and along side walls of the gate insulating film. The semiconductor device further includes side wall conductor films formed adjacent to the side wall insulating films and a source/drain region formed in a surface region of the substrate under the side wall conductivity film and in a surface region, adjacent to the side wall conductivity film, of the semiconductor substrate. An impurity concentration in a depthwise direction of the substrate with the surface of the side wall conductor film serving as a starting point exhibits one maximum value in a predetermined depth but decreases in a portion deeper than the predetermined depth.
摘要翻译：能够抑制短通道效应并获得尽可能高的电流驱动性的半导体器件包括半导体衬底，形成在该衬底的表面上的栅极绝缘膜，形成在该栅极绝缘膜上的栅电极和侧壁在该栅电极上形成的绝缘膜和栅极绝缘膜的侧壁。半导体器件还包括与侧壁绝缘膜相邻形成的侧壁导体膜和形成在侧壁导电膜下的基板的表面区域中的源极/漏极区域以及与侧壁导电膜相邻的表面区域的半导体衬底。在侧壁导体膜的表面作为起始点的基板的深度方向上的杂质浓度在预定深度呈现一个最大值，但在比预定深度更深的部分中减小。

6. 发明授权

US09391309B2 Connected porous sheet and method for producing the same, separator for non-aqueous secondary battery, and non-aqueous secondary battery, and method for producing the same 有权
标题翻译：连接多孔片及其制造方法，非水二次电池用隔膜和非水二次电池及其制造方法
公开(公告)号：US09391309B2
公开(公告)日：2016-07-12
申请号：US13882652
申请日：2011-10-21
申请人： Satoshi Nishikawa , Hiroki Sano , Takashi Yoshitomi
发明人： Satoshi Nishikawa , Hiroki Sano , Takashi Yoshitomi
IPC分类号： H01M2/16 , H01M10/052 , H01M10/0566 , H01M2/14
CPC分类号： H01M2/162 , H01M2/145 , H01M2/1653 , H01M2/1673 , H01M2/1686 , H01M10/052 , H01M10/0566 , Y02E60/122 , Y02P70/54 , Y10T156/10 , Y10T156/1062
摘要： An example of the present invention is provided with porous sheets 11, 21 each formed by layering a porous base material including a polyolefin and a heat-resistant porous layer including a heat-resistant resin. The porous sheets 11, 21, respectively, are connected at connecting regions 15a and 15b, 25a and 25b, respectively, which have been formed by thermal fusion of the heat-resistant porous layers facing each other by folding the sheets. Furthermore, the porous sheets 11, 21 are additionally connected at a connecting region 27 that has been formed by thermal fusion.
摘要翻译：本发明的实施例提供有多孔片11,21，它们通过层压包括聚烯烃的多孔基材和包含耐热树脂的耐热多孔层形成。多孔片11,21分别通过折叠片材而分别通过耐热多孔层彼此面对而形成的连接区域15a和15b，25a和25b连接。此外，多孔片11,21在通过热熔形成的连接区域27附加地连接。

7. 发明申请

US20130273408A1 SEPARATOR FOR NON-AQUEOUS ELECTROLYTE BATTERY, AND NON-AQUEOUS ELECTROLYTE BATTERY 审中-公开
标题翻译：非水电解电池分离器和非水电解电池
公开(公告)号：US20130273408A1
公开(公告)日：2013-10-17
申请号：US13994468
申请日：2011-12-12
申请人： Takashi Yoshitomi , Satoshi Nishikawa , Takahiro Daidou
发明人： Takashi Yoshitomi , Satoshi Nishikawa , Takahiro Daidou
IPC分类号： H01M2/16
CPC分类号： H01M2/1686 , H01M2/1653 , H01M2/166 , H01M2/348 , H01M10/052
摘要： The present invention provides a separator for a non-aqueous electrolyte battery that includes a porous base material including a polyolefin and a heat-resistant porous layer provided on at least one surface of the porous base material and including a heat-resistant resin, in which when a thermomechanical analysis measurement has been performed by applying a constant load, the separator for a non-aqueous electrolyte battery satisfies the following conditions (i) and (ii): (i) at least one shrinkage peak appears in a temperature range of from 130 to 155° C. in a displacement waveform representing shrinkage displacement with respect to temperature; and (ii) an extension rate in a range from a shrinkage peak appearance temperature T1 to (T1+20)° C. is less than 0.5%/° C.
摘要翻译：本发明提供一种非水电解质电池用隔膜，其包括多孔性基材，其包含聚烯烃和耐热多孔层，所述耐热多孔层设置在所述多孔基材的至少一个表面上并且包含耐热树脂，其中当通过施加恒定的负荷进行热机械分析测量时，非水电解质电池的隔膜满足以下条件（i）和（ii）：（i）至少一个收缩峰出现在 130〜155℃，表示相对于温度的收缩位移的位移波形; 和（ii）从收缩峰出现温度T1到（T1 + 20）℃的范围内的延伸率小于0.5％/℃。

8. 发明申请

US20130224560A1 SEPARATOR FOR NONAQUEOUS ELECTROLYTE BATTERY, AND NON-AQUEOUS ELECTROLYTE SECONDARY BATTERY 有权
标题翻译：非电解电解电池分离器和非水电解质二次电池
公开(公告)号：US20130224560A1
公开(公告)日：2013-08-29
申请号：US13881314
申请日：2011-10-21
申请人： Takashi Yoshitomi
发明人： Takashi Yoshitomi
IPC分类号： H01M2/16
CPC分类号： H01M2/162 , H01M2/1613 , H01M2/1646 , H01M2/1653 , H01M2/1666 , H01M2/1686 , H01M2/348 , H01M10/0525
摘要： Disclosed is a separator for a non-aqueous electrolyte battery, the separator including a polyolefin microporous substrate in which a content of polyolefin having a molecular weight of 100,000 or less is from 10% by mass to 25% by mass relative to a total amount of polyolefin, and a heat resistant porous layer that is formed on one or both sides of the polyolefin microporous substrate and that includes a heat resistant polymer, wherein a maximum value of S, which is represented by the following formula (1), is 0.8 or more, and a temperature exhibiting the maximum value of S is from 130° C. to 155° C.: S=d(log R)/dT Formula (1) wherein R represents a resistance (ohm·cm2) of a cell, and T represents a temperature (° C.), in a measurement using a battery that includes the cell that is provided with a separator for a non-aqueous electrolyte battery, at a temperature rising rate of 1.6° C./min.
摘要翻译：公开了一种非水电解质电池用隔膜，所述隔膜包括聚烯烃微孔基材，其中分子量为100,000以下的聚烯烃的含量相对于聚合物微孔基材的总量为10质量％〜25质量％聚烯烃和形成在聚烯烃微孔基材的一侧或两侧上并且包括耐热聚合物的耐热多孔层，其中由下式（1）表示的S的最大值为0.8或表示S的最大值的温度为130℃〜155℃：S = d（logR）/ dTFormula（1）其中，R表示电池的电阻（欧姆·cm 2），在使用包括具有非水电解质电池用隔膜的电池的电池的测定中，T表示温度（℃），升温速度为1.6℃/分钟。

9. 发明申请

US20080048250A1 MOSFET WITH A THIN GATE INSULATING FILM 审中-公开
标题翻译：具有薄栅绝缘膜的MOSFET
公开(公告)号：US20080048250A1
公开(公告)日：2008-02-28
申请号：US11846369
申请日：2007-08-28
申请人： Hisayo MOMOSE , Hiroshi Iwai , Masanobu Saito , Tatsuya Ohguro , Mizuki Ono , Takashi Yoshitomi , Shinichi Nakamura
发明人： Hisayo MOMOSE , Hiroshi Iwai , Masanobu Saito , Tatsuya Ohguro , Mizuki Ono , Takashi Yoshitomi , Shinichi Nakamura
IPC分类号： H01L27/06
CPC分类号： H01L29/66575 , H01L21/2255 , H01L21/2256 , H01L21/28211 , H01L27/0629 , H01L27/088 , H01L29/42364 , H01L29/42372 , H01L29/78
摘要： A semiconductor device comprises: a p-type semiconductor substrate (1); an insulating film (3); a gate electrode (2) formed on the substrate via the insulating film; and an n-type source/drain region (5) formed on both sides of a channel forming region (4) located under the gate electrode (2) formed on the substrate (1). In particular, the thickness (TOX) of the insulating film (3) is determined to be less than 2.5 nm at conversion rate of silicon oxide film (silicon oxide equivalent thickness); a gate length (Lg) of the gate electrode (2) is determined to be equal to or less than 0.3 μm; and further a voltage applied to the gate electrode (2) and the drain region (6) is determined to be 1.5 V or less. Therefore, in the MOSFET having the tunneling gate oxide film (3), the reliability of the transistor under the hot carrier stress can be improved, and the gate leakage current can be reduced markedly, so that the transistor characteristics can be improved markedly.
摘要翻译：半导体器件包括：p型半导体衬底（1）; 绝缘膜（3）; 经由所述绝缘膜形成在所述基板上的栅电极（2）以及形成在形成在基板（1）上的栅电极（2）下方的沟道形成区域（4）的两侧的n型源极/漏极区域（5）。特别地，在氧化硅膜的转换率（氧化硅当量厚度）下，确定绝缘膜（3）的厚度（T×OX ）小于2.5nm。栅极（2）的栅极长度（L SUB）确定为等于或小于0.3μm; 并且进一步施加到栅极（2）和漏极区（6）的电压被确定为1.5V或更小。因此，在具有隧穿栅极氧化膜（3）的MOSFET中，可以提高热载流子应力下的晶体管的可靠性，并且可以显着降低栅极漏电流，从而可以显着提高晶体管特性。

10. 发明申请

US20070148480A1 Laminate 审中-公开
标题翻译：层压板
公开(公告)号：US20070148480A1
公开(公告)日：2007-06-28
申请号：US10584330
申请日：2004-12-22
申请人： Toyoaki Ishiwata , Toru Sawaki , Takashi Yoshitomi , Tsutomu Nakamura
发明人： Toyoaki Ishiwata , Toru Sawaki , Takashi Yoshitomi , Tsutomu Nakamura
IPC分类号： B32B27/34 , B29C63/00
CPC分类号： H01L21/6835 , B32B7/12 , B32B15/08 , B32B27/08 , B32B27/281 , B32B27/34 , B32B2255/06 , B32B2255/26 , B32B2307/206 , B32B2307/306 , B32B2307/734 , B32B2457/14 , C09J5/00 , C09J7/22 , C09J7/25 , C09J7/35 , C09J2203/326 , C09J2205/302 , C09J2477/00 , C09J2477/006 , C09J2479/08 , C09J2479/086 , H01L21/4803 , H01L21/6836 , H01L23/145 , H01L2221/68327 , H01L2221/6834 , H01L2924/0002 , H01L2924/09701 , H01L2924/12044 , Y10T428/31721 , H01L2924/00
摘要： A laminate which is advantageously used as an insulating layer for electronic package application and as an adhesive film for fixing a semiconductor wafer for semiconductor device application, laminates comprising the same and a process for manufacturing the above laminate. The laminate (I) comprises a base layer (A) and an adhesive layer (B) formed on one side or both sides of the layer A, the layer A is a film made of (A-1) a specific wholly aromatic polyimide (PIA-1) or (A-2) a specific wholly aromatic polyamide (PAA-2); and the layer B comprises (B-1) a specific wholly aromatic polyimide (PIB-1), (B-2) a specific wholly aromatic polyamide (PAB-2), or (B-3) a specific resin composition (RCB-3) comprising a wholly aromatic polyimide (PIB-3) and a specific wholly aromatic polyamide (PAB-3), laminates comprising the same and a process for manufacturing the above laminate.
摘要翻译：有利地用作电子封装应用的绝缘层和用于固定用于半导体器件应用的半导体晶片的粘合膜的层压体，包括该半导体器件的层压体以及用于制造上述层叠体的方法。层压体（I）包括在层A的一侧或两侧形成的基底层（A）和粘合剂层（B），层A是由（A-1）特定的全芳族聚酰亚胺（A-2）特定的全芳族聚酰胺（PAA-A-2）;或（A-2）并且层B包含（B-1）特定的全芳族聚酰亚胺（PI B-1），（B-2）特定的全芳族聚酰胺（PA B-2 / >）或（B-3）包含全芳香族聚酰亚胺（PI B-3）的特定树脂组合物（RC B-3）和特定的全芳族聚酰胺（PA B-3），含有它们的层压体和制造上述层压体的方法。

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