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1. 发明申请

US20140151872A1 SEMICONDUCTOR MODULE 审中-公开
标题翻译：半导体模块
公开(公告)号：US20140151872A1
公开(公告)日：2014-06-05
申请号：US14095592
申请日：2013-12-03
申请人： Takaoki Ogawa , Makoto Imai , Shizuyasu Matsubayashi
发明人： Takaoki Ogawa , Makoto Imai , Shizuyasu Matsubayashi
IPC分类号： H01L23/40
CPC分类号： H01L23/4006 , H01L25/074 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor module includes semiconductor device, at least one cooler, at least one fastening member. The semiconductor device has a flat shape. The at least one cooler is arranged adjacent to the semiconductor device. The at least one fastening member has a pressure-contact part that is configured to apply a pressure to the at least one cooler. Furthermore, the at least one fastening member fastens a layered body including the semiconductor device and the at least one cooler in a layer direction of the layered body. A dent configured to accommodate the pressure-contact part is provided in the at least one cooler.
摘要翻译：半导体模块包括半导体器件，至少一个冷却器，至少一个紧固构件。半导体器件具有扁平形状。至少一个冷却器被布置成与半导体器件相邻。所述至少一个紧固构件具有被配置为向所述至少一个冷却器施加压力的压力接触部分。此外，至少一个紧固构件在层叠体的层方向上紧固包括半导体装置和至少一个冷却器的层叠体。构造成容纳压力接触部分的凹陷设置在至少一个冷却器中。

2. 发明授权

US07622760B2 MOS type variable capacitance device 有权
标题翻译： MOS型可变电容器件
公开(公告)号：US07622760B2
公开(公告)日：2009-11-24
申请号：US11047559
申请日：2005-02-02
申请人： Takaoki Ogawa , Kazuhiro Tomita , Koju Aoki
发明人： Takaoki Ogawa , Kazuhiro Tomita , Koju Aoki
IPC分类号： H01L27/12
CPC分类号： H01L29/0684 , H01L27/0808 , H01L29/42312 , H01L29/93 , H01L29/94
摘要： An n-well is formed in a p-type semiconductor substrate. A gate insulative film is formed to the p-type semiconductor substrate and the n-well, and a gate electrode is formed on the gate insulative film. A source layer selectively diffused with n-type impurities at high concentration is formed adjacent to the gate insulative film on the surface of the p-type semiconductor substrate, the n-well and a region extending on both of them. Further, a contact layer selectively diffused with p-type impurities at high concentration is formed being spaced from the source layer. A capacitance characteristic of good linearity over a wide range relative to the inter-terminal voltage VT can be obtained by applying an inter-terminal voltage VT between the source layer and the gate electrode. A MOS type variable capacitance device capable of obtaining a characteristic of good linearity for a wide range relative to the inter-terminal voltage VT and capable of coping with the improvement of the performance of a VCO circuit, etc., as well as simple in the structure, and capable of being manufactured easily with no requirement for addition of masks and steps can be provided.
摘要翻译：在p型半导体衬底中形成n阱。对p型半导体衬底和n阱形成栅极绝缘膜，并且在栅极绝缘膜上形成栅电极。与p型半导体衬底的表面上的栅极绝缘膜相邻地形成与n型杂质高浓度选择性扩散的源极层，n阱以及在其上延伸的区域。此外，形成与源极层间隔开的与高浓度的p型杂质选择性扩散的接触层。通过在源极层和栅电极之间施加端子间电压VT，可以获得相对于端子间电压VT在宽范围内具有良好线性度的电容特性。一种MOS型可变电容器件，其能够获得相对于端子间电压VT的宽范围的良好线性特性，并且能够应对VCO电路的性能的提高等，以及简单的结构，并且能够容易地制造，而不需要添加掩模和步骤。

3. 发明申请

US20050127411A1 Mos type variable capacitance device 有权
标题翻译： Mos型可变电容器件
公开(公告)号：US20050127411A1
公开(公告)日：2005-06-16
申请号：US11047559
申请日：2005-02-02
申请人： Takaoki Ogawa , Kazuhiro Tomita , Koju Aoki
发明人： Takaoki Ogawa , Kazuhiro Tomita , Koju Aoki
IPC分类号： H01L27/08 , H01L29/93 , H01L29/94 , H01L29/76
CPC分类号： H01L29/0684 , H01L27/0808 , H01L29/42312 , H01L29/93 , H01L29/94
摘要： An n-well is formed in a p-type semiconductor substrate. A gate insulative film is formed to the p-type semiconductor substrate and the n-well, and a gate electrode is formed on the gate insulative film. A source layer selectively diffused with n-type impurities at high concentration is formed adjacent to the gate insulative film on the surface of the p-type semiconductor substrate, the n-well and a region extending on both of them. Further, a contact layer selectively diffused with p-type impurities at high concentration is formed being spaced from the source layer. A capacitance characteristic of good linearity over a wide range relative to the inter-terminal voltage VT can be obtained by applying an inter-terminal voltage VT between the source layer and the gate electrode. A MOS type variable capacitance device capable of obtaining a characteristic of good linearity for a wide range relative to the inter-terminal voltage VT and capable of coping with the improvement of the performance of a VCO circuit, etc., as well as simple in the structure, and capable of being manufactured easily with no requirement for addition of masks and steps can be provided.
摘要翻译：在p型半导体衬底中形成n阱。对p型半导体衬底和n阱形成栅极绝缘膜，并且在栅极绝缘膜上形成栅电极。与p型半导体衬底的表面上的栅极绝缘膜相邻地形成与n型杂质高浓度选择性扩散的源极层，n阱以及在其上延伸的区域。此外，形成与源极层间隔开的与高浓度的p型杂质选择性扩散的接触层。通过在源极层和栅电极之间施加端子间电压VT，可以获得相对于端子间电压VT在宽范围内具有良好线性度的电容特性。一种MOS型可变电容器件，其能够获得相对于端子间电压VT的宽范围的良好线性特性，并且能够应对VCO电路的性能的提高等，以及简单的结构，并且能够容易地制造，而不需要添加掩模和步骤。

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