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1. 发明授权

US4219927A Method of producing a multistylus head device 失效
标题翻译：生产多头头装置的方法
公开(公告)号：US4219927A
公开(公告)日：1980-09-02
申请号：US938784
申请日：1978-09-01
申请人： Naoki Fukutomi , Yoshiyuki Tsuru , Kunio Kawaguchi , Susumu Naoyuki
发明人： Naoki Fukutomi , Yoshiyuki Tsuru , Kunio Kawaguchi , Susumu Naoyuki
IPC分类号： G03G15/05 , B41J2/395 , G01D15/06 , H05K3/10
CPC分类号： G01D15/06 , B41J2/395 , Y10T29/49162 , Y10T29/49165
摘要： A multistylus head device which comprises a vast plurality of insulated wires embedded in an insulating substrate having through-holes. The present multistylus device is characterized in that the insulated wires have their respective free terminals exposed on one edge of said insulating substrate and disposed in parallel at predetermined equal intervals in close proximity to each other to form electrodes and have their other terminals exposed respectively on the inner walls of said through-holes; and said other exposed terminals of the insulated wires are connected respectively to metal layers electrolessly deposited on the inner walls of the through-holes. The present multistylus head device is compact in size and excellent in reliability of terminal connection and is capable of recording a transmitted information with high density of printing. The exposed disposition of the wires at their respective free terminals in a parallel state at predetermined equal intervals are skillfully realized according to the method of the present invention. Thus, the present device can be produced at low cost, with reliability of the function of the produced device and is suitable for mass-production.
摘要翻译：一种多回头装置，其包括嵌入具有通孔的绝缘基板中的大量绝缘电线。本发明的多级装置的特征在于，绝缘线具有各自的自由端子露出在所述绝缘基板的一个边缘上并以彼此相邻的预定相等的间隔平行设置，以形成电极并使其另一个端子分别暴露在所述通孔的内壁; 并且绝缘线的所述其他暴露端子分别连接到无电沉积在通孔的内壁上的金属层。本发明的多头头装置的尺寸紧凑，端子连接的可靠性优异，能够以高密度的印刷记录发送的信息。根据本发明的方法，巧妙地实现了以预定相等的间隔在其各自的自由端子处以平行状态暴露的配线。因此，本装置可以以低成本制造，具有所制造的装置的功能的可靠性并且适合于批量生产。

2. 发明授权

US08673428B2 Engraved plate and substrate with conductor layer pattern using the same 失效
标题翻译：雕刻板和基板与导体层图案使用相同
公开(公告)号：US08673428B2
公开(公告)日：2014-03-18
申请号：US12439685
申请日：2007-12-27
申请人： Susumu Naoyuki , Hisashige Kanbara , Minoru Tosaka , Kyosuke Suzuki , Toshirou Okamura , Yoshihito Kikuhara , Masami Negishi , Tadayasu Fujieda , Kouichi Tsuyama
发明人： Susumu Naoyuki , Hisashige Kanbara , Minoru Tosaka , Kyosuke Suzuki , Toshirou Okamura , Yoshihito Kikuhara , Masami Negishi , Tadayasu Fujieda , Kouichi Tsuyama
IPC分类号： B32B3/00 , B32B3/28 , B32B3/30 , B32B19/00 , B32B9/00
CPC分类号： B41N1/06 , B41C1/00 , B41N1/12 , C25D1/00 , C25D1/006 , H05K3/205 , H05K9/0096 , H05K2201/09827 , Y10T428/2457 , Y10T428/24612 , Y10T428/2462 , Y10T428/30
摘要： An engraved plate which includes a substrate and an insulating layer on a surface of the substrate wherein a concave portion which increases in width toward an opening and to which the substrate is exposed is formed at the insulating layer, and an engraved plate, a substrate with conductor layer pattern manufactured by a transferring method using the engraved plate, and a conductor layer pattern are provided.
摘要翻译：一种雕刻板，其在基板的表面上包括基板和绝缘层，其中在绝缘层处形成有朝向开口增加并且基板暴露的宽度的凹部，以及雕刻板，具有通过使用雕刻板的转印方法制造的导体层图案和导体层图案。

3. 发明授权

US06268648B1 Board for mounting semiconductor element, method for manufacturing the same, and semiconductor device 失效
标题翻译：用于安装半导体元件的板，其制造方法和半导体器件
公开(公告)号：US06268648B1
公开(公告)日：2001-07-31
申请号：US09423062
申请日：1999-10-29
申请人： Naoki Fukutomi , Yoshiaki Wakashima , Susumu Naoyuki , Akinari Kida
发明人： Naoki Fukutomi , Yoshiaki Wakashima , Susumu Naoyuki , Akinari Kida
IPC分类号： H01L2972
CPC分类号： H01L24/85 , H01L21/4803 , H01L23/13 , H01L23/24 , H01L23/3121 , H01L23/3128 , H01L23/36 , H01L23/49816 , H01L24/45 , H01L24/48 , H01L24/73 , H01L29/0657 , H01L2224/0401 , H01L2224/05624 , H01L2224/05647 , H01L2224/131 , H01L2224/32225 , H01L2224/32245 , H01L2224/45015 , H01L2224/45147 , H01L2224/48091 , H01L2224/48227 , H01L2224/4824 , H01L2224/48799 , H01L2224/48824 , H01L2224/48847 , H01L2224/73265 , H01L2224/85 , H01L2924/00011 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01057 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/12042 , H01L2924/15153 , H01L2924/15157 , H01L2924/15165 , H01L2924/1517 , H01L2924/15311 , H01L2924/1532 , H01L2924/181 , H01L2924/18165 , H01L2924/3025 , H05K3/0014 , H01L2224/78 , H01L2924/00012 , H01L2924/00 , H01L2224/45099 , H01L2924/01004
摘要： A semiconductor device comprising a substrate with a cavity portion for mounting a semiconductor chip is provided to achieve a high reliability and to decrease a size and a fabricating cost. The cavity portion capable of mounting the semiconductor chip (1) at the center portion of the substrate is formed by press forming with a projected portion (13a) of a die (13) while adhering a press shapeable wiring body comprising a copper wiring (12) which becomes wiring material, a barrier layer (11) such as nickel alloy or the like, and a copper foil (10) which is a carrier layer, to a plastic substrate (14,15), so as to have wiring (2) buried into a surface of the substrate and to form a ramp between an inner connection terminal portion connecting to the semiconductor chip (1) and an external connection terminal portion connecting to an external connection terminals (5), the internal and external connection terminal portions being two edge portions of the wiring (2).
摘要翻译：提供包括具有用于安装半导体芯片的空腔部分的基板的半导体器件以实现高可靠性并且减小尺寸和制造成本。能够将半导体芯片（1）安装在基板的中心部分的空腔部分通过压模成型而与模具（13）的突出部分（13a）粘合，同时将包括铜布线（12）），诸如镍合金等的阻挡层（11）和作为载体层的铜箔（10）连接到塑料基板（14,15），从而具有布线（2）），并且在连接到半导体芯片（1）的内部连接端子部分和连接到外部连接端子（5）的外部连接端子部分之间形成斜坡，内部和外部连接端子部分是布线（2）的两个边缘部分。

4. 发明申请

US20100021695A1 ENGRAVED PLATE AND SUBSTRATE WITH CONDUCTOR LAYER PATTERN USING THE SAME 失效
标题翻译：雕刻板和基板与导体层模式使用相同
公开(公告)号：US20100021695A1
公开(公告)日：2010-01-28
申请号：US12439685
申请日：2007-12-27
申请人： Susumu Naoyuki , Hisashige Kanbara , Minoru Tosaka , Kyosuke Suzuki , Toshirou Okamura , Yoshihito Kikuhara , Masami Negishi , Tadayasu Fujieda , Kouichi Tsuyama
发明人： Susumu Naoyuki , Hisashige Kanbara , Minoru Tosaka , Kyosuke Suzuki , Toshirou Okamura , Yoshihito Kikuhara , Masami Negishi , Tadayasu Fujieda , Kouichi Tsuyama
IPC分类号： B32B3/02 , G03F7/20 , C23C14/34 , C23C14/04 , C25D5/02
CPC分类号： B41N1/06 , B41C1/00 , B41N1/12 , C25D1/00 , C25D1/006 , H05K3/205 , H05K9/0096 , H05K2201/09827 , Y10T428/2457 , Y10T428/24612 , Y10T428/2462 , Y10T428/30
摘要： An engraved plate which includes a substrate and an insulating layer on a surface of the substrate wherein a concave portion which increases in width toward an opening and to which the substrate is exposed is formed at the insulating layer, and an engraved plate, a substrate with conductor layer pattern manufactured by a transferring method using the engraved plate, and a conductor layer pattern are provided.
摘要翻译：一种雕刻板，其在基板的表面上包括基板和绝缘层，其中在绝缘层处形成有朝向开口增加并且基板暴露的宽度的凹部，以及雕刻板，具有通过使用雕刻板的转印方法制造的导体层图案和导体层图案。

5. 发明授权

US06492203B1 Semiconductor device and method of fabrication thereof 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US06492203B1
公开(公告)日：2002-12-10
申请号：US09680369
申请日：2000-10-05
申请人： Yoshiaki Wakashima , Naoki Fukutomi , Kazuhisa Suzuki , Toshio Yamazaki , Tsutomu Kitakatsu , Susumu Naoyuki , Akinari Kida
发明人： Yoshiaki Wakashima , Naoki Fukutomi , Kazuhisa Suzuki , Toshio Yamazaki , Tsutomu Kitakatsu , Susumu Naoyuki , Akinari Kida
IPC分类号： H01L2144
CPC分类号： H01L24/85 , H01L21/4803 , H01L23/13 , H01L23/24 , H01L23/3114 , H01L23/3128 , H01L23/36 , H01L23/49816 , H01L24/45 , H01L24/48 , H01L29/0657 , H01L2224/05624 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/4824 , H01L2224/48624 , H01L2224/85 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01019 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/15153 , H01L2924/15157 , H01L2924/15165 , H01L2924/1517 , H01L2924/15311 , H01L2924/1532 , H01L2924/157 , H01L2924/181 , H01L2224/78 , H01L2924/00
摘要： A semiconductor device fabrication process comprising an encapsulation step of carrying out encapsulation by vacuum pressure differential printing by the use of a liquid resin encapsulant containing a solvent in an amount of from 5% by weight to 50% by weight, and preferably from 25% by weight to 50% by weight. The encapsulation step comprises: printing the liquid resin encapsulant by vacuum pressure differential printing in such a way that; the encapsulant covers at least an internal connecting terminal provided on a substrate, a semiconductor chip, and a wire interconnecting the internal connecting terminal and the semiconductor chip; and that the thickness of the encapsulant lying above the wire at the highest position of the wire comes to be at least 0.8 times the thickness of the encapsulant lying beneath the wire at the same position; and curing or drying the encapsulant.
摘要翻译：一种半导体器件制造方法，包括通过真空压差印刷进行封装的封装步骤，所述封装步骤通过使用含有溶剂的液体树脂密封剂，其量为5重量％至50重量％，优选25重量％重量至50％重量。封装步骤包括：通过真空压差印刷印刷液态树脂密封剂，密封剂至少覆盖设置在基板上的内部连接端子，半导体芯片和互连内部连接端子和半导体芯片的布线; 并且位于电线最高位置处的线上方的密封剂的厚度至少为位于相同位置下方的密封剂厚度的至少0.8倍; 并固化或干燥密封剂。

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