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1. 发明申请

US20100200833A1 SEMICONDUCTOR DEVICE INCLUDING UNIFORM CONTACT PLUGS AND A METHOD OF MANUFACTURING THE SAME 有权
标题翻译：包含均匀接触片的半导体器件及其制造方法
公开(公告)号：US20100200833A1
公开(公告)日：2010-08-12
申请号：US12697620
申请日：2010-02-01
申请人： Kyu-Rie SIM , Jung-Hoon PARK , Yoon-Jong SONG , Jae-Min SHIN , Shin-Hee HAN
发明人： Kyu-Rie SIM , Jung-Hoon PARK , Yoon-Jong SONG , Jae-Min SHIN , Shin-Hee HAN
IPC分类号： H01L47/00
CPC分类号： H01L27/24 , H01L27/222
摘要： A semiconductor device, a semiconductor module, an electronic apparatus and methods of fabricating and manufacturing the same are provided. The semiconductor device includes a lower interconnection formed on a substrate, a plurality of control patterns formed on the lower interconnection, a plurality of lower contact plug patterns formed on the control patterns, a plurality of storage patterns formed on the lower contact plug patterns, a plurality of upper electrodes formed on the storage patterns, and a plurality of upper interconnections formed on the upper electrodes. The lower contact plug patterns each include at least two contact holes having different sizes, a plurality of sidewall patterns formed on inner sidewalls of the two contact holes and wherein the sidewall patterns have different thicknesses from one another. The semiconductor device further includes a plurality of electrode patterns conformably formed on the inside of the sidewall patterns and having size errors less than 10%, and a plurality of filling patterns formed inside the electrode patterns and completely filling the inside of the contact holes.
摘要翻译：提供半导体器件，半导体模块，电子设备及其制造和制造方法。半导体器件包括形成在衬底上的下互连，形成在下互连上的多个控制图案，形成在控制图案上的多个下接触插塞图案，形成在下接触插塞图案上的多个存储图案，形成在存储图案上的多个上电极和形成在上电极上的多个上互连。下接触插头图案各自包括具有不同尺寸的至少两个接触孔，多个侧壁图案形成在两个接触孔的内侧壁上，并且其中侧壁图案具有彼此不同的厚度。半导体器件还包括多个沿着侧壁图案的内侧形成并且具有小于10％的尺寸误差的电极图案，以及形成在电极图案内并且完全填充接触孔内部的多个填充图案。

2. 发明授权

US09087769B2 Magnetic memory device 有权
标题翻译：磁存储器件
公开(公告)号：US09087769B2
公开(公告)日：2015-07-21
申请号：US14338285
申请日：2014-07-22
申请人： Yong-kwan Kim , Dae-eun Jeong , Shin-hee Han
发明人： Yong-kwan Kim , Dae-eun Jeong , Shin-hee Han
IPC分类号： H01L27/22 , H01L43/08 , H01L43/02
CPC分类号： H01L27/228 , G11C11/161 , G11C11/1657 , G11C11/1659 , H01L43/02 , H01L43/08
摘要： A magnetic memory device is provided. The magnetic memory device may include a plurality of word lines extending along a direction crossing a plurality of active regions and at least one source line connected to a plurality of first active regions arranged on a level that is lower than the upper surface of a substrate. A plurality of contact pads may be connected to a plurality of second active regions and a plurality of buried contact plugs may be connected to the plurality of second active regions via the plurality of contact pads. Said buried contact pads may further be arranged in a hexagonal array structure. A plurality of variable resistance structures may be connected to the plurality of second active regions and arranged in a hexagonal array structure.
摘要翻译：提供磁存储器件。磁存储器件可以包括沿着与多个有源区域交叉的方向延伸的多个字线和连接到布置在低于衬底的上表面的电平上的多个第一有源区域的至少一个源极线。多个接触焊盘可以连接到多个第二有源区，并且多个埋入式接触插塞可以经由多个接触焊盘连接到多个第二有源区。所述掩埋接触垫还可以布置成六边形阵列结构。多个可变电阻结构可以连接到多个第二有源区并且被布置成六边形阵列结构。

3. 发明申请

US20150061054A1 MAGNETIC MEMORY DEVICE 有权
标题翻译：磁记忆装置
公开(公告)号：US20150061054A1
公开(公告)日：2015-03-05
申请号：US14338285
申请日：2014-07-22
申请人： Yong-kwan KIM , Dae-eun JEONG , Shin-hee HAN
发明人： Yong-kwan KIM , Dae-eun JEONG , Shin-hee HAN
IPC分类号： H01L27/22 , H01L43/02
CPC分类号： H01L27/228 , G11C11/161 , G11C11/1657 , G11C11/1659 , H01L43/02 , H01L43/08
摘要： A magnetic memory device is provided. The magnetic memory device may include a plurality of word lines extending along a direction crossing a plurality of active regions and at least one source line connected to a plurality of first active regions arranged on a level that is lower than the upper surface of a substrate. A plurality of contact pads may be connected to a plurality of second active regions and a plurality of buried contact plugs may be connected to the plurality of second active regions via the plurality of contact pads. Said buried contact pads may further be arranged in a hexagonal array structure. A plurality of variable resistance structures may be connected to the plurality of second active regions and arranged in a hexagonal array structure.
摘要翻译：提供磁存储器件。磁存储器件可以包括沿着与多个有源区域交叉的方向延伸的多个字线和连接到布置在低于衬底的上表面的电平上的多个第一有源区域的至少一个源极线。多个接触焊盘可以连接到多个第二有源区，并且多个埋入式接触插塞可以经由多个接触焊盘连接到多个第二有源区。所述掩埋接触垫还可以布置成六边形阵列结构。多个可变电阻结构可以连接到多个第二有源区并且被布置成六边形阵列结构。

4. 发明申请

US20170069832A1 MAGNETORESISTIVE MEMORY DEVICES AND METHODS OF MANUFACTURING THE SAME 审中-公开
标题翻译：磁记忆体装置及其制造方法
公开(公告)号：US20170069832A1
公开(公告)日：2017-03-09
申请号：US15186420
申请日：2016-06-17
申请人： Yong-Jae KIM , Woo-Jin KIM , Ki-Seok SUH , Shin-Hee HAN , Gwan-Hyeob KOH
发明人： Yong-Jae KIM , Woo-Jin KIM , Ki-Seok SUH , Shin-Hee HAN , Gwan-Hyeob KOH
IPC分类号： H01L43/08 , H01L43/10 , H01L43/02 , H01L27/22
CPC分类号： H01L43/08 , H01L27/228 , H01L43/12
摘要： A magnetoresistive memory device includes a lower electrode on a substrate, a magnetic tunnel junction (MTJ) structure on the lower electrode, and a mask structure. The MTJ structure includes a lower magnetic pattern, a tunnel barrier pattern, and an upper magnetic pattern which are stacked. The mask structure includes an upper electrode and a sidewall capping pattern enclosing a sidewall of the upper electrode.
摘要翻译：磁阻存储器件包括衬底上的下电极，下电极上的磁隧道结（MTJ）结构和掩模结构。 MTJ结构包括堆叠的较低磁性图案，隧道势垒图案和上部磁性图案。掩模结构包括上电极和封闭上电极的侧壁的侧壁封盖图案。

5. 发明授权

US08203135B2 Semiconductor device including uniform contact plugs and a method of manufacturing the same 有权
标题翻译：包括均匀接触塞的半导体器件及其制造方法
公开(公告)号：US08203135B2
公开(公告)日：2012-06-19
申请号：US12697620
申请日：2010-02-01
申请人： Kyu-Rie Sim , Jung-Hoon Park , Yoon-Jong Song , Jae-Min Shin , Shin-Hee Han
发明人： Kyu-Rie Sim , Jung-Hoon Park , Yoon-Jong Song , Jae-Min Shin , Shin-Hee Han
IPC分类号： H01L29/41
CPC分类号： H01L27/24 , H01L27/222
摘要： A semiconductor device, a semiconductor module, an electronic apparatus and methods of fabricating and manufacturing the same are provided. The semiconductor device includes a lower interconnection formed on a substrate, a plurality of control patterns formed on the lower interconnection, a plurality of lower contact plug patterns formed on the control patterns, a plurality of storage patterns formed on the lower contact plug patterns, a plurality of upper electrodes formed on the storage patterns, and a plurality of upper interconnections formed on the upper electrodes. The lower contact plug patterns each include at least two contact holes having different sizes, a plurality of sidewall patterns formed on inner sidewalls of the two contact holes and wherein the sidewall patterns have different thicknesses from one another. The semiconductor device further includes a plurality of electrode patterns conformably formed on the inside of the sidewall patterns and having size errors less than 10%, and a plurality of filling patterns formed inside the electrode patterns and completely filling the inside of the contact holes.
摘要翻译：提供半导体器件，半导体模块，电子设备及其制造和制造方法。半导体器件包括形成在衬底上的下互连，形成在下互连上的多个控制图案，形成在控制图案上的多个下接触插塞图案，形成在下接触插塞图案上的多个存储图案，形成在存储图案上的多个上电极和形成在上电极上的多个上互连。下接触插头图案各自包括具有不同尺寸的至少两个接触孔，多个侧壁图案形成在两个接触孔的内侧壁上，并且其中侧壁图案具有彼此不同的厚度。半导体器件还包括多个沿着侧壁图案的内侧形成并且具有小于10％的尺寸误差的电极图案，以及形成在电极图案内并且完全填充接触孔内部的多个填充图案。

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