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    • 1. 发明授权
    • Semiconductor integrated circuit
    • 半导体集成电路
    • US5525933A
    • 1996-06-11
    • US392119
    • 1995-02-22
    • Shigeru MatsukiKazuhiro Sugita
    • Shigeru MatsukiKazuhiro Sugita
    • H03K19/003H03K5/08H03K17/16H03K19/0944
    • H03K19/00315
    • A semiconductor integrated circuit comprises a signal input terminal, a power supply voltage terminal to which a power voltage is applied, a reference voltage terminal to which a ground voltage is applied, a first PMOS transistor having a drain, a gate connected to the signal input terminal, and a source connected to the power supply voltage terminal, a second PMOS transistor having a gate and a drain being mutually connected to each other, and a source connected to the drain of the first transistor, a third PMOS transistor having a gate connected to the drain of the second transistor, a source connected to the power supply potential terminal, and a drain connected to the drain of the first transistor, an NMOS transistor having a gate connected to the power supply voltage terminal, a drain connected to the drain of the second PMOS transistor, and a source connected to the reference voltage terminal, an internal circuit connected to the drain of the NMOS transistor, a first overvoltage absorption element, connected between the reference voltage terminal and the signal input terminal, for absorbing an overvoltage applied to the signal input terminal, and a second overvoltage absorption element, connected between the signal input terminal and the power supply voltage terminal, for absorbing an overvoltage applied to the signal input terminal.
    • 半导体集成电路包括信号输入端子,施加电源电压的电源电压端子,施加接地电压的基准电压端子,具有漏极的第一PMOS晶体管,连接到信号输入端的栅极 端子和连接到电源电压端子的源极,具有彼此相互连接的栅极和漏极的第二PMOS晶体管,以及连接到第一晶体管的漏极的源极,具有栅极连接的第三PMOS晶体管 到第二晶体管的漏极,连接到电源电位端的源极和连接到第一晶体管的漏极的漏极,具有连接到电源电压端子的栅极的NMOS晶体管,连接到漏极的漏极 的第二PMOS晶体管和连接到参考电压端子的源极,连接到NMOS晶体管的漏极的内部电路,第一过电压 吸收元件,连接在参考电压端子和信号输入端子之间,用于吸收施加到信号输入端子的过电压,以及连接在信号输入端子和电源电压端子之间的用于吸收过电压的第二过电压吸收元件 应用于信号输入端子。