专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US08516322B1 Automatic test pattern generation system for programmable logic devices 有权
标题翻译：用于可编程逻辑器件的自动测试图生成系统
公开(公告)号：US08516322B1
公开(公告)日：2013-08-20
申请号：US12568136
申请日：2009-09-28
申请人： Jayabrata Ghosh Dastidar , Alok Shreekant Doshi , Binh Vo , Kalyana Ravindra Kantipudi , Sergey Timokhin
发明人： Jayabrata Ghosh Dastidar , Alok Shreekant Doshi , Binh Vo , Kalyana Ravindra Kantipudi , Sergey Timokhin
IPC分类号： G01R31/3183 , G01R31/40
CPC分类号： G01R31/3183
摘要： A programmable integrated circuit may contain multiple logic blocks. Computing equipment may be used to run automated tools that process a design for the programmable integrated circuit to perform corresponding circuit tests. A translation tool may translate a transistor-level description of circuitry on the programmable integrated circuit into a gate-level description. A block-level test configuration data generation tool may generate block-level test configuration data files. The test configuration data files may be used as constraints for an automatic test pattern generation tool that produces block-level test vectors. A full-chip propagation tool may use the block-level test vectors, block-level test configuration data files, and full-chip constraints to produce corresponding full-chip test configuration data and full-chip test vectors for testing the integrated circuit. A translation tool may convert the configuration data and test vectors into a tester file.
摘要翻译：可编程集成电路可以包含多个逻辑块。计算设备可用于运行自动化工具，处理可编程集成电路的设计以执行相应的电路测试。翻译工具可以将可编程集成电路上的电路的晶体管级描述转换成门级描述。块级测试配置数据生成工具可以生成块级测试配置数据文件。测试配置数据文件可以用作产生块级测试向量的自动测试模式生成工具的约束。全芯片传播工具可以使用块级测试向量，块级测试配置数据文件和全芯片约束来产生相应的全芯片测试配置数据和用于测试集成电路的全芯片测试向量。翻译工具可将配置数据和测试向量转换为测试文件。

IPRDB

热门服务

关于我们

友情链接

联系方式