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1. 发明授权

US09330963B2 Conformal low temperature hermetic dielectric diffusion barriers 有权
标题翻译：保形低温密封电介质扩散阻挡层
公开(公告)号：US09330963B2
公开(公告)日：2016-05-03
申请号：US13976835
申请日：2011-12-20
申请人： Sean King , Hui Jae Yoo , Sreenivas Kosaraju , Timothy Glassman
发明人： Sean King , Hui Jae Yoo , Sreenivas Kosaraju , Timothy Glassman
IPC分类号： H01L29/40 , H01L23/52 , H01L21/768 , H01L21/02 , H01L23/522 , H01L23/532
CPC分类号： H01L21/76831 , H01L21/02178 , H01L21/022 , H01L21/0228 , H01L21/76802 , H01L21/7682 , H01L21/76829 , H01L21/76877 , H01L23/522 , H01L23/5222 , H01L23/5226 , H01L23/53228 , H01L23/53295 , H01L23/564 , H01L2924/0002 , H01L2924/00
摘要： Conformal hermetic dielectric films suitable as dielectric diffusion barriers over 3D topography. In embodiments, the dielectric diffusion barrier includes a dielectric layer, such as a metal oxide, which can be deposited by atomic layer deposition (ALD) techniques with a conformality and density greater than can be achieved in a conventional silicon dioxide-based film deposited by a PECVD process for a thinner contiguous hermetic diffusion barrier. In further embodiments, the diffusion barrier is a multi-layered film including a high-k dielectric layer and a low-k or intermediate-k dielectric layer (e.g., a bi-layer) to reduce the dielectric constant of the diffusion barrier. In other embodiments a silicate of a high-k dielectric layer (e.g., a metal silicate) is formed to lower the k-value of the diffusion barrier by adjusting the silicon content of the silicate while maintaining high film conformality and density.
摘要翻译：适合于3D地形的电介质扩散屏障的保形密封电介质膜。在实施例中，电介质扩散阻挡层包括介电层，例如金属氧化物，其可以通过原子层沉积（ALD）技术沉积，其共形度和密度大于常规的基于二氧化硅的膜沉积的二氧化硅基膜用于较薄连续密封扩散屏障的PECVD工艺。在另外的实施例中，扩散阻挡层是包括高k电介质层和低k或中间介电层（例如双层）的多层膜，以降低扩散阻挡层的介电常数。在其它实施方案中，形成高k电介质层（例如金属硅酸盐）的硅酸盐，以通过调节硅酸盐的硅含量来降低扩散阻挡层的k值，同时保持高的膜保形性和密度。

2. 发明授权

US08785261B2 Microelectronic transistor having an epitaxial graphene channel layer 失效
标题翻译：具有外延石墨烯通道层的微电子晶体管
公开(公告)号：US08785261B2
公开(公告)日：2014-07-22
申请号：US12888979
申请日：2010-09-23
申请人： Sean King
发明人： Sean King
IPC分类号： H01L21/00 , H01L21/84
CPC分类号： H01L29/1606 , H01L21/02057 , H01L21/02381 , H01L21/02447 , H01L21/02527 , H01L21/02581 , H01L21/0262 , H01L29/66742 , H01L29/7781 , H01L29/78603 , H01L29/78684
摘要： The present disclosure relates to the field of microelectronic transistor fabrication and, more particularly, to forming a graphene layer as a channel layer for a microelectronic transistor.
摘要翻译：本公开涉及微电子晶体管制造领域，更具体地说，涉及形成石墨烯层作为微电子晶体管的沟道层。

3. 发明授权

US08088665B2 Method of forming self-aligned low resistance contact layer 有权
标题翻译：形成自对准低电阻接触层的方法
公开(公告)号：US08088665B2
公开(公告)日：2012-01-03
申请号：US12228386
申请日：2008-08-11
申请人： Willy Rachmady , Jason W. Klaus , Ravi Pillarisetty , Niloy Mukherjee , Jack Kavalieros , Sean King
发明人： Willy Rachmady , Jason W. Klaus , Ravi Pillarisetty , Niloy Mukherjee , Jack Kavalieros , Sean King
IPC分类号： H01L21/336
CPC分类号： H01L29/41775 , H01L21/02532 , H01L21/02592 , H01L21/0262 , H01L21/02636 , H01L21/28518 , H01L21/28525 , H01L21/28556 , H01L29/41783
摘要： Embodiments of the present invention describe a method of fabricating low resistance contact layers on a semiconductor device. The semiconductor device comprises a substrate having source and drain regions. The substrate is alternatingly exposed to a first precursor and a second precursor to selectively deposit an amorphous semiconductor layer onto each of the source and drain regions. A metal layer is then deposited over the amorphous semiconductor layer on each of the source and drain regions. An annealing process is then performed on the substrate to allow the metal layer to react with amorphous semiconductor layer to form a low resistance contact layer on each of the source and drain regions. The low resistance contact layer on each of the source and drain regions can be formed as either a silicide layer or germanide layer depending on the type of precursors used.
摘要翻译：本发明的实施例描述了在半导体器件上制造低电阻接触层的方法。半导体器件包括具有源区和漏区的衬底。将基板交替地暴露于第一前体和第二前体，以将非晶半导体层选择性地沉积到源极和漏极区域中的每一个上。然后在每个源极和漏极区域上的非晶半导体层上沉积金属层。然后在衬底上进行退火处理，以允许金属层与非晶半导体层反应，以在源极和漏极区域中的每一个上形成低电阻接触层。根据所使用的前体的类型，源极和漏极区域中的每一个上的低电阻接触层可以形成为硅化物层或锗化物层。

4. 发明申请

US20110003471A1 Fabrication of interconnects in a low-k interlayer dielectrics 有权
标题翻译：在低k层间电介质中制作互连
公开(公告)号：US20110003471A1
公开(公告)日：2011-01-06
申请号：US12807613
申请日：2010-09-09
申请人： Sean King , Ruth Brain
发明人： Sean King , Ruth Brain
IPC分类号： H01L21/4763
CPC分类号： H01L21/76849 , H01L21/76807 , H01L21/76829 , H01L21/76867 , H01L23/485 , H01L23/53238 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： A method for forming deep lithographic interconnects between a first metal and a second metal is provided. The method comprises depositing a first insulator layer on a semiconductor substrate; etching the first insulator layer at a selected location to provide at least a first via to the semiconductor substrate; depositing the first metal on the semiconductor substrate to form at least a first metal contact plug in the first via in contact with the semiconductor substrate; treating the semiconductor substrate with an in-situ plasma of a nitrogen containing gas wherein the plasma forms a nitride layer of the first metal at least capping a top surface of the first metal plug in the first via; and forming a second metal contact to the metal nitride layer capping at least the top surface of the first metal plug.
摘要翻译：提供了在第一金属和第二金属之间形成深度平版印刷互连的方法。该方法包括在半导体衬底上沉积第一绝缘体层; 在选定位置蚀刻第一绝缘体层，以向半导体衬底提供至少第一通孔; 在所述半导体衬底上沉积所述第一金属以在所述第一通孔中形成与所述半导体衬底接触的至少第一金属接触插塞; 用含氮气体的原位等离子体处理半导体衬底，其中等离子体形成第一金属的氮化物层，至少在第一通孔中封住第一金属插塞的顶表面; 以及形成至少覆盖所述第一金属插塞顶表面的所述金属氮化物层的第二金属接触。

5. 发明授权

US07812455B2 Interconnect in low-k interlayer dielectrics 有权
标题翻译：互连在低k层间电介质
公开(公告)号：US07812455B2
公开(公告)日：2010-10-12
申请号：US12139848
申请日：2008-06-16
申请人： Sean King , Ruth Brain
发明人： Sean King , Ruth Brain
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L21/76849 , H01L21/76807 , H01L21/76829 , H01L21/76867 , H01L23/485 , H01L23/53238 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： A method for forming deep lithographic interconnects between a first metal and a second metal is provided. The method comprises depositing a first insulator layer on a semiconductor substrate; etching the first insulator layer at a selected location to provide at least a first via to the semiconductor substrate; depositing the first metal on the semiconductor substrate to form at least a first metal contact plug in the first via in contact with the semiconductor substrate; treating the semiconductor substrate with an in-situ plasma of a nitrogen containing gas wherein the plasma forms a nitride layer of the first metal at least capping a top surface of the first metal plug in the first via; and forming a second metal contact to the metal nitride layer capping at least the top surface of the first metal plug.
摘要翻译：提供了在第一金属和第二金属之间形成深度平版印刷互连的方法。该方法包括在半导体衬底上沉积第一绝缘体层; 在选定位置蚀刻第一绝缘体层，以向半导体衬底提供至少第一通孔; 在所述半导体衬底上沉积所述第一金属以在所述第一通孔中形成与所述半导体衬底接触的至少第一金属接触插塞; 用含氮气体的原位等离子体处理半导体衬底，其中等离子体形成第一金属的氮化物层，至少在第一通孔中封住第一金属插塞的顶表面; 以及形成至少覆盖所述第一金属插塞顶表面的所述金属氮化物层的第二金属接触。

6. 发明授权

US07759262B2 Selective formation of dielectric etch stop layers 失效
标题翻译：电介质蚀刻停止层的选择性形成
公开(公告)号：US07759262B2
公开(公告)日：2010-07-20
申请号：US12165515
申请日：2008-06-30
申请人： Sean King , Jason Klaus
发明人： Sean King , Jason Klaus
IPC分类号： H01L21/28 , H01L29/423
CPC分类号： H01L21/28052 , H01L21/76834 , H01L21/76889 , H01L29/4933 , H01L29/7833
摘要： Methods to selectively form a dielectric etch stop layer over a patterned metal feature. Embodiments include a transistor incorporating such an etch stop layer over a gate electrode. In accordance with certain embodiments of the present invention, a metal is selectively formed on the surface of the gate electrode which is then converted to a silicide or germanicide. In other embodiments, the metal selectively formed on the gate electrode surface enables a catalytic growth of a silicon or germanium mesa over the gate electrode. At least a portion of the silicide, germanicide, silicon mesa or germanium mesa is then oxidized, nitridized, or carbonized to form a dielectric etch stop layer over the gate electrode only.
摘要翻译：选择性地在图案化的金属特征上形成介电蚀刻停止层的方法。实施例包括在栅电极上并入有这种蚀刻停止层的晶体管。根据本发明的某些实施方案，在栅电极的表面上选择性地形成金属，然后将其转化为硅化物或锗酸盐。在其他实施例中，选择性地形成在栅电极表面上的金属使得能够在栅电极上催化生长硅或锗台面。硅化物，锗化硅，硅台面或锗台面的至少一部分然后被氧化，氮化或碳化，以在栅电极上形成电介质蚀刻停止层。

7. 发明申请

US20070059913A1 Capping layer to reduce amine poisoning of photoresist layers 审中-公开
标题翻译：封盖层以减少光致抗蚀剂层的胺中毒
公开(公告)号：US20070059913A1
公开(公告)日：2007-03-15
申请号：US11229131
申请日：2005-09-15
申请人： Sean King , George Antonelli , Tony Mule
发明人： Sean King , George Antonelli , Tony Mule
IPC分类号： H01L21/44
CPC分类号： H01L21/76832 , H01L21/76802
摘要： An apparatus for reducing amine poisoning of photoresist layers comprises a substrate, an etch stop layer containing amines formed over the substrate, and a dense capping layer formed directly on the etch stop layer, wherein the dense capping layer substantially prevents the amines from diffusing out of the etch stop layer and into a subsequently formed photoresist layer. The dense capping layer may comprise silicon carbide, silicon carboxide, or a combination of silicon carbide and silicon carboxide. The dense capping layer may have a density greater than or equal to 2 g/cm3 and a thickness that ranges from 10 Å to 200 Å.
摘要翻译：用于还原光致抗蚀剂层的胺中毒的装置包括基底，含有形成在基底上的胺的蚀刻停止层，以及直接形成在蚀刻停止层上的致密覆盖层，其中致密覆盖层基本上防止胺扩散出蚀刻停止层并进入随后形成的光致抗蚀剂层。致密覆盖层可以包括碳化硅，硅化合物或碳化硅和硅化合物的组合。致密的封盖层可以具有大于或等于2g / cm 3的密度，并且厚度范围为从10到200。

8. 发明申请

US20060094251A1 Multi-layer film stack for extinction of substrate reflections during patterning 有权
公开(公告)号：US20060094251A1
公开(公告)日：2006-05-04
申请号：US11300023
申请日：2005-12-13
申请人： Sanjay Natarajan , Sean King , Khaled Elamrawi
发明人： Sanjay Natarajan , Sean King , Khaled Elamrawi
IPC分类号： H01L21/31
CPC分类号： H01L21/31144 , H01L21/0276 , H01L21/76802 , H01L21/76832 , H01L23/53295 , H01L2924/0002 , Y10S438/902 , Y10S438/945 , Y10S438/95 , Y10S438/952 , Y10S438/958 , H01L2924/00
摘要： A method including introducing a dielectric layer over a substrate between an interconnection line and the substrate, the dielectric layer comprising a plurality of alternating material layers; and patterning an interconnection to the substrate. An apparatus comprising a substrate comprising a plurality of devices formed thereon; and an interlayer dielectric layer comprising a base layer and a cap layer, the cap layer comprising a plurality of alternating material layers overlying the substrate.

9. 发明申请

US20060086954A1 Multi-layer film stack for extinction of substrate reflections during patterning 审中-公开
公开(公告)号：US20060086954A1
公开(公告)日：2006-04-27
申请号：US11297390
申请日：2005-12-07
申请人： Sanjay Natarajan , Sean King , Khaled Elamrawi
发明人： Sanjay Natarajan , Sean King , Khaled Elamrawi
IPC分类号： H01L29/76
CPC分类号： H01L21/31144 , H01L21/0276 , H01L21/76802 , H01L21/76832 , H01L23/53295 , H01L2924/0002 , Y10S438/902 , Y10S438/945 , Y10S438/95 , Y10S438/952 , Y10S438/958 , H01L2924/00
摘要： A method including introducing a dielectric layer over a substrate between an interconnection line and the substrate, the dielectric layer comprising a plurality of alternating material layers; and patterning an interconnection to the substrate. An apparatus comprising a substrate comprising a plurality of devices formed thereon; and an interlayer dielectric layer comprising a base layer and a cap layer, the cap layer comprising a plurality of alternating material layers overlying the substrate.

10. 发明授权

US09074684B2 Transmission gear shift indication techniques 有权
标题翻译：变速箱换挡指示技术
公开(公告)号：US09074684B2
公开(公告)日：2015-07-07
申请号：US14034598
申请日：2013-09-24
申请人： Songping Yu , Mohamed Othman , Ryan B McNamara , Sean King
发明人： Songping Yu , Mohamed Othman , Ryan B McNamara , Sean King
IPC分类号： F16H61/68 , F16H59/44 , F16H61/00 , F16H61/02
CPC分类号： F16H61/68 , B60R16/0236 , F16H59/44 , F16H61/0213 , F16H63/42 , F16H2061/0015 , F16H2061/0216 , F16H2061/022 , F16H2063/426 , Y02T10/84
摘要： Transmission gear shift control techniques can include calculating, at a controller of a vehicle powered by an internal combustion engine, the controller including one or more processors, brake specific fuel consumption (BSFC) for each of: (i) a current gear of a transmission of the vehicle, (ii) a lower gear than the current gear of the transmission, and (iii) a higher gear than the current gear of the transmission, wherein the transmission is one of a manual transmission and an automatic transmission operating in a manual mode. The techniques can include determining, at the controller, which of the current gear, the lower gear, and the higher gear has a smallest BSFC to obtain a desired gear of the transmission. The techniques can also include outputting, from the controller, an indication to shift the transmission to the desired gear.
摘要翻译：变速器变速控制技术可以包括在由内燃机驱动的车辆的控制器下计算控制器，该控制器包括一个或多个处理器，用于以下各项的制动特定燃料消耗（BSFC）：（i）变速器的当前齿轮，（ii）比传动装置的当前齿轮低的档位，以及（iii）比变速器的当前档位高的档位，其中变速器是手动变速器和在手动操作中的自动变速器之一模式。这些技术可以包括在控制器处确定当前齿轮，下齿轮和较高齿轮中的哪一个具有最小BSFC以获得变速器的期望齿轮。这些技术还可以包括从控制器输出将变速器换档到期望档位的指示。

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