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1. 发明申请

US20180137925A1 NONVOLATILE MEMORY DEVICE AND METHOD OF READING THE SAME 审中-公开
公开(公告)号：US20180137925A1
公开(公告)日：2018-05-17
申请号：US15447357
申请日：2017-03-02
申请人： Sang-wan NAM , Dae-seok BYEON , Chi-weon YOON
发明人： Sang-wan NAM , Dae-seok BYEON , Chi-weon YOON
IPC分类号： G11C16/34 , G11C16/04 , G11C16/28 , G11C16/10 , G11C16/16
CPC分类号： G11C16/3431 , G11C16/0483 , G11C16/08 , G11C16/10 , G11C16/16 , G11C16/28 , G11C16/30 , G11C16/32 , G11C16/3459
摘要： Provided are a nonvolatile memory device and a method of performing a sensing operation on the nonvolatile memory device. The nonvolatile memory device includes a control logic coupled to a memory cell array including strings. The control logic is configured to control a first weak-on voltage applied to an unselected string selection line and a second weak-on voltage applied to an unselected ground selection line during a setup interval of the sensing operation for sensing data from a selected string. The unselected string selection line and ground selection line are connected to a string selection transistor and a ground selection transistor, respectively, of a same unselected string. The selected string and the unselected string are connected to a same bit line. The first weak-on voltage and second weak-on voltage are respectively less than a threshold voltage of the string selection transistor and the ground selection transistor in the unselected string.

2. 发明授权

US09851912B2 Memory device, memory system and method of operating memory device 有权
公开(公告)号：US09851912B2
公开(公告)日：2017-12-26
申请号：US15443647
申请日：2017-02-27
申请人： Sang-Wan Nam , Doo-Hyun Kim , Dae-Seok Byeon , Chi-Weon Yoon
发明人： Sang-Wan Nam , Doo-Hyun Kim , Dae-Seok Byeon , Chi-Weon Yoon
IPC分类号： G11C11/34 , G11C16/04 , G06F3/06
CPC分类号： G06F3/0619 , G06F3/061 , G06F3/0644 , G06F3/0655 , G06F3/0688 , G11C16/0483 , G11C16/06 , G11C16/10 , G11C16/12 , G11C16/14 , G11C16/16 , G11C16/26 , G11C16/34 , G11C16/3459 , H01L27/11582
摘要： A memory device is provided as follows. A memory cell region includes a plurality of blocks, each block including a plurality of NAND strings. A control logic divides the plurality of blocks into a plurality of block regions based on a smaller distance of a first distance with respect to a first edge of the memory cell region and a second distance with respect to a second edge of the memory cell region and controls an operation performed on the memory cell region using a plurality of bias sets of operation parameters for the operation. Each bias set is associated with one of the block regions.

3. 发明授权

US09627076B2 Nonvolatile memory device and erasing method thereof 有权
公开(公告)号：US09627076B2
公开(公告)日：2017-04-18
申请号：US14574079
申请日：2014-12-17
申请人： Sang-Wan Nam
发明人： Sang-Wan Nam
IPC分类号： G11C16/14 , G11C16/16 , G11C16/04
CPC分类号： G11C16/16 , G11C16/0483 , G11C16/14
摘要： According to example embodiments, a nonvolatile memory device includes a lower filling insulating layer covering a peripheral logic structure on a substrate, a horizontal semiconductor layer on the lower filling insulating layer, and a three-dimensional memory cell array including a plurality of memory blocks on the horizontal semiconductor layer. The horizontal semiconductor layer includes a plurality of doped regions spaced apart from each other in a first direction and a plurality of well regions between the doped regions. Each of the memory blocks includes sub-blocks on corresponding ones of the well regions. The non-volatile memory device is configured to perform an erase operation in units of the sub-blocks. The non-volatile memory device is configured to independently apply an erase voltage to a selected one of the well regions during the erase operation.

4. 发明申请

US20160254054A1 NONVOLATILE MEMORY DEVICES AND DRIVING METHODS THEREOF 审中-公开
公开(公告)号：US20160254054A1
公开(公告)日：2016-09-01
申请号：US15152692
申请日：2016-05-12
申请人： Kyung-Hwa KANG , Sang-Wan NAM , Donghyuk CHAE , ChiWeon YOON
发明人： Kyung-Hwa KANG , Sang-Wan NAM , Donghyuk CHAE , ChiWeon YOON
IPC分类号： G11C16/04 , H01L27/115 , H01L23/528 , G11C16/24 , G11C16/08
CPC分类号： G11C16/0483 , G11C16/0466 , G11C16/08 , G11C16/24 , H01L23/528 , H01L27/11565 , H01L27/1157 , H01L27/11582
摘要： Nonvolatile memory devices including memory cell arrays with a plurality of cell strings connected between a substrate and a plurality of bit lines and selected by selection lines, and a gating circuit configured to drive the selection lines in at least two directions.

5. 发明申请

US20160035423A1 NONVOLATILE MEMORY DEVICE AND WORLDLINE DRIVING METHOD THEREOF 有权
标题翻译：非易失性存储器件及其驱动方法
公开(公告)号：US20160035423A1
公开(公告)日：2016-02-04
申请号：US14741224
申请日：2015-06-16
申请人： Sang-Wan NAM , Sun-Min YUN , Bongsoon LIM , Yoon-Hee CHOI
发明人： Sang-Wan NAM , Sun-Min YUN , Bongsoon LIM , Yoon-Hee CHOI
IPC分类号： G11C16/08 , G11C16/10 , G11C16/28 , G11C16/04
CPC分类号： G11C16/08 , G11C8/08 , G11C16/0483 , G11C16/10 , G11C16/28 , G11C16/3459
摘要： According to example embodiments of inventive concepts, a nonvolatile memory device includes a memory cell array, an address decoder, an input/output circuit, a voltage generation circuit, and control logic. The memory cell array includes a plurality of memory blocks on a substrate. Each of the memory blocks includes a plurality of strings connected between bit lines and a common source line. The address decoder is configured to measure impedance information of word lines of a selected memory block. The voltage generation circuit is configured to generate word line voltages to be applied to word lines, and at least one of the word line voltages includes an offset voltage and a target voltage. The control logic is configured to adjust a level of the offset voltage and the offset time depending on the measured impedance information of the word lines.
摘要翻译：根据发明构思的示例实施例，非易失性存储器件包括存储单元阵列，地址解码器，输入/输出电路，电压产生电路和控制逻辑。存储单元阵列包括在衬底上的多个存储块。每个存储块包括连接在位线和公共源极线之间的多个串。地址解码器被配置为测量所选择的存储器块的字线的阻抗信息。电压产生电路被配置为产生要施加到字线的字线电压，并且字线电压中的至少一个包括偏移电压和目标电压。控制逻辑被配置为根据测得的字线的阻抗信息来调整偏移电压和偏移时间的电平。

6. 发明授权

US09147492B2 Control method of nonvolatile memory device 有权
标题翻译：非易失性存储器件的控制方法
公开(公告)号：US09147492B2
公开(公告)日：2015-09-29
申请号：US14546477
申请日：2014-11-18
申请人： Sunil Shim , Jin-Man Han , Sang-Wan Nam , Won-Taeck Jung
发明人： Sunil Shim , Jin-Man Han , Sang-Wan Nam , Won-Taeck Jung
IPC分类号： G11C16/00 , G11C16/34 , G11C16/10 , G11C16/16 , H01L27/115 , H01L29/792 , G11C16/14
CPC分类号： G11C16/3418 , G11C16/10 , G11C16/14 , G11C16/16 , G11C16/349 , H01L27/11578 , H01L27/11582 , H01L29/7926
摘要： According to example embodiments, a control method of a nonvolatile memory device, which includes a plurality of memory blocks on a substrate, each memory block including a plurality of sub blocks stacked in a direction perpendicular to the substrate and being configured to be erased independently and each sub block including a plurality of memory cells stacked in the direction perpendicular to the substrate. The control method includes comparing a count value of a first memory block with a reference value, the count value determined according to the number of program, read, or erase operations executed at the first memory block after data is programmed in the first memory block; and if the count value is greater than or equal to the reference value, performing a reprogram operation in which data programmed in first the memory block is read and the read data is programmed in a second memory block.
摘要翻译：根据示例性实施例，一种非易失性存储器件的控制方法，其包括在衬底上的多个存储块，每个存储块包括沿垂直于衬底的方向堆叠的多个子块，并且被配置为独立擦除，每个子块包括在垂直于衬底的方向上堆叠的多个存储单元。控制方法包括将第一存储块的计数值与参考值进行比较，所述计数值根据在第一存储器块中的数据被编程之后在第一存储器块执行的程序，读取或擦除操作的数量确定; 并且如果所述计数值大于或等于所述参考值，则执行重新编程操作，其中在第一存储器块中编程的数据被读取并且所读取的数据被编程在第二存储器块中。

7. 发明申请

US20150262686A1 ERASE SYSTEM AND METHOD OF NONVOLATILE MEMORY DEVICE 审中-公开
标题翻译：非易失性存储器件的擦除系统和方法
公开(公告)号：US20150262686A1
公开(公告)日：2015-09-17
申请号：US14723525
申请日：2015-05-28
申请人： Sang-Wan NAM
发明人： Sang-Wan NAM
IPC分类号： G11C16/14 , G11C16/34 , G11C16/26
CPC分类号： G11C16/14 , G11C16/16 , G11C16/26 , G11C16/3445 , H01L27/11524 , H01L27/11556 , H01L27/1157 , H01L27/11582
摘要： An erase system and method of a nonvolatile memory device includes supplying an erase voltage to a plurality of memory cells of a nonvolatile memory, performing a read operation with a read voltage to word lines of the plurality of memory cells, and performing an erase verification operation with an erase verification voltage to at least one of the word lines of the plurality of memory cells, the erase verification voltage lower than the read voltage.
摘要翻译：非易失性存储器件的擦除系统和方法包括向非易失性存储器的多个存储单元提供擦除电压，对多个存储器单元的字线执行读取电压读取操作，并执行擦除验证操作具有擦除验证电压至所述多个存储单元中的至少一个字线，所述擦除验证电压低于读取电压。

8. 发明授权

US09025383B2 Nonvolatile memory device and method of programming the same 有权
标题翻译：非易失存储器件及其编程方法
公开(公告)号：US09025383B2
公开(公告)日：2015-05-05
申请号：US13650545
申请日：2012-10-12
申请人： Sang-Wan Nam , Junghoon Park
发明人： Sang-Wan Nam , Junghoon Park
IPC分类号： G11C16/04 , G11C16/10
CPC分类号： G11C16/10 , G11C16/0483
摘要： A method is provided for programming a nonvolatile memory device, which includes multiple memory cells connected in series in a direction substantially perpendicular to a substrate. The method includes programming a first memory cell of the multiple memory cells, and programming a second memory cell of the multiple memory cells after the first memory cell is programmed, the second memory cell being closer to the substrate than the first memory cell. A diameter of a channel hole of the first memory cell is larger than a diameter of a channel hole of the second memory cell.
摘要翻译：提供一种用于对非易失性存储器件进行编程的方法，该非易失性存储器件包括在基本上垂直于衬底的方向上串联连接的多个存储器单元。该方法包括编程多个存储器单元的第一存储单元，以及在编程第一存储单元之后对多个存储器单元的第二存储单元进行编程，第二存储单元比第一存储单元更靠近衬底。第一存储单元的通道孔的直径大于第二存储单元的通道孔的直径。

9. 发明申请

US20150078087A1 CONTROL METHOD OF NONVOLATILE MEMORY DEVICE 审中-公开
标题翻译：非易失性存储器件的控制方法
公开(公告)号：US20150078087A1
公开(公告)日：2015-03-19
申请号：US14546477
申请日：2014-11-18
申请人： Sunil SHIM , Jin-Man HAN , Sang-Wan NAM , Won-Taeck JUNG
发明人： Sunil SHIM , Jin-Man HAN , Sang-Wan NAM , Won-Taeck JUNG
IPC分类号： G11C16/34 , G11C16/14
CPC分类号： G11C16/3418 , G11C16/10 , G11C16/14 , G11C16/16 , G11C16/349 , H01L27/11578 , H01L27/11582 , H01L29/7926
摘要： According to example embodiments, a control method of a nonvolatile memory device, which includes a plurality of memory blocks on a substrate, each memory block including a plurality of sub blocks stacked in a direction perpendicular to the substrate and being configured to be erased independently and each sub block including a plurality of memory cells stacked in the direction perpendicular to the substrate. The control method includes comparing a count value of a first memory block with a reference value, the count value determined according to the number of program, read, or erase operations executed at the first memory block after data is programmed in the first memory block; and if the count value is greater than or equal to the reference value, performing a reprogram operation in which data programmed in first the memory block is read and the read data is programmed in a second memory block.
摘要翻译：根据示例性实施例，一种非易失性存储器件的控制方法，其包括在衬底上的多个存储块，每个存储块包括沿垂直于衬底的方向堆叠的多个子块，并且被配置为独立擦除，每个子块包括在垂直于衬底的方向上堆叠的多个存储单元。控制方法包括将第一存储块的计数值与参考值进行比较，所述计数值根据在第一存储器块中的数据被编程之后在第一存储器块执行的程序，读取或擦除操作的数量确定; 并且如果所述计数值大于或等于所述参考值，则执行重新编程操作，其中在第一存储器块中编程的数据被读取并且所读取的数据被编程在第二存储器块中。

10. 发明授权

US08953376B2 Nonvolatile memory device and read method thereof 有权
标题翻译：非易失性存储器件及其读取方法
公开(公告)号：US08953376B2
公开(公告)日：2015-02-10
申请号：US13401151
申请日：2012-02-21
申请人： Sang-Wan Nam , Chiweon Yoon , Jung-Soo Kim
发明人： Sang-Wan Nam , Chiweon Yoon , Jung-Soo Kim
IPC分类号： G11C16/04 , G11C16/06 , G11C16/26 , H01L27/115
CPC分类号： G11C16/26 , G11C16/0483 , H01L27/11519 , H01L27/11524 , H01L27/11556 , H01L27/11565 , H01L27/1157 , H01L27/11582
摘要： According to example embodiments, a read method of a nonvolatile memory device includes Disclosed is a read method of a nonvolatile memory device which includes selecting one of a plurality of vertical strings in a nonvolatile memory device, judging a channel length between a common source line and a selected one of the plurality of vertical strings, selecting a sensing manner corresponding to the judged channel length, and performing a sensing operation according to the selected sensing manner. The plurality of vertical strings may extend in a direction perpendicular to a substrate of the nonvolatile memory device.
摘要翻译：根据示例实施例，非易失性存储器件的读取方法包括：非易失性存储器件的读取方法，其包括选择非易失性存储器件中的多个垂直条之一，判断公共源极线和选择多个垂直串中的一个，选择与所判断的信道长度相对应的感测方式，以及根据所选择的感测方式执行感测操作。多个垂直线可以在垂直于非易失性存储器件的衬底的方向上延伸。

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