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1. 发明授权

US5553305A System for synchronizing execution by a processing element of threads within a process using a state indicator 失效
标题翻译：用于通过使用状态指示符的进程内的线程的处理元件同步执行的系统
公开(公告)号：US5553305A
公开(公告)日：1996-09-03
申请号：US914686
申请日：1992-07-15
申请人： Steven L. Gregor , Robert A. Iannucci
发明人： Steven L. Gregor , Robert A. Iannucci
IPC分类号： G06F9/46 , G06F9/48 , G06F9/52 , G06F15/16 , G06F15/177
CPC分类号： G06F9/4843 , G06F9/52 , G06F2209/503
摘要： A method and system for synchronizing execution by a processing element of threads within a process. Before execution of a thread commences, a determination is made as to whether all of the required resources for execution of the thread are available in a cache local to the processing element. If the resources are not available, then the resources are fetched from main storage and stored in one or more local caches before execution begins. If the resources are available, then execution of the thread may begin. During execution of the thread and, in particular, an instruction within the thread, the instruction may require data in order to successfully complete its execution. When this occurs, a determination is made as to whether the necessary data is available. If the data is available, the result of the instruction execution is stored and execution of the thread continues. However, if the data is unavailable, then the thread is deferred until the data becomes available and a new thread is processed. When deferring a thread, the thread is placed in the memory location which is to receive the required data. Once the data is available, the thread is removed from the data location and placed on a queue for execution and the data is stored in the location.
摘要翻译：一种用于通过进程内的线程的处理元件同步执行的方法和系统。在执行线程开始之前，确定用于执行线程的所有所需资源是否在处理元件本地的高速缓存中可用。如果资源不可用，则在执行开始之前资源从主存储器获取并存储在一个或多个本地高速缓存中。如果资源可用，则可以开始执行线程。在执行线程期间，特别是线程内的指令时，指令可能需要数据才能成功完成其执行。当发生这种情况时，确定所需数据是否可用。如果数据可用，则存储指令执行的结果并继续执行线程。然而，如果数据不可用，则线程被延迟，直到数据变得可用并且处理新的线程。延迟线程时，线程被放置在要接收所需数据的存储器位置。一旦数据可用，线程将从数据位置中删除并放置在队列上执行，数据存储在该位置。

2. 发明授权

US4685088A High performance memory system utilizing pipelining techniques 失效
标题翻译：采用流水线技术的高性能内存系统
公开(公告)号：US4685088A
公开(公告)日：1987-08-04
申请号：US722920
申请日：1985-04-15
申请人： Robert A. Iannucci
发明人： Robert A. Iannucci
IPC分类号： G11C7/00 , G06F12/00 , G06F13/16 , G06F17/16 , G11C7/10 , G11C8/08 , G11C11/401 , G11C11/413 , G11C8/00
CPC分类号： G06F13/1615 , G06F13/161 , G11C7/1039 , G11C8/08
摘要： A novel memory system is disclosed which utilizes pipelining techniques to read data from a memory array and to write data to a memory array. More data may be read from the novel memory system, within a unit of time, relative to the amount of data which may be read from a conventional memory system during the unit of time. The novel memory system comprises a plurality of standard elements which include a memory array, including a plurality of rows and columns, a row decoder, a row driver, column sense amplifiers, and a column multiplexer. However, the novel memory system further includes latch circuits interposed between the row decoder and the row driver, between the row driver and the memory array, between the memory array and the column sense amplifiers, and between the column sense amplifiers and the column multiplexer. The same number of latch circuits are interposed in serial fashion between the incoming row and column address bus and the column multiplexer. Consequently, as a result of the use of these latch circuits in a memory system, pipelining techniques are utilized in the memory system for the improvement of the performance of the memory system.
摘要翻译：公开了一种新颖的存储器系统，其利用流水线技术从存储器阵列读取数据并将数据写入存储器阵列。相对于在单位时间内可以从常规存储器系统读取的数据量，可以在时间单位内从新颖存储器系统读取更多的数据。新颖的存储器系统包括多个标准元件，其包括包括多个行和列的存储器阵列，行解码器，行驱动器，列读出放大器和列复用器。然而，新颖的存储器系统还包括插入行解码器和行驱动器之间的行驱动器和存储器阵列之间，存储器阵列和列读出放大器之间以及列读出放大器和列复用器之间的锁存电路。在输入行和列地址总线和列多路复用器之间以串行方式插入相同数量的锁存电路。因此，作为在存储器系统中使用这些锁存电路的结果，在存储器系统中利用流水线技术来改善存储器系统的性能。

3. 发明授权

US4466077A Method and apparatus for division employing associative memory 失效
标题翻译：使用关联记忆的划分方法和装置
公开(公告)号：US4466077A
公开(公告)日：1984-08-14
申请号：US305765
申请日：1981-09-25
申请人： Robert A. Iannucci , James R. Kleinsteiber
发明人： Robert A. Iannucci , James R. Kleinsteiber
IPC分类号： G06F7/493 , G06F7/496 , G06F7/52 , G06F7/533 , G06F7/535 , G06F7/544
CPC分类号： G06F7/535 , G06F7/4917 , G06F2207/5353
摘要： A method and apparatus for the arithmetic division operation is disclosed in which a set of multiples of the divisor are stored in an associative memory in addresses which match the respective multiples. The most significant byte of the numerator is then compared to the contents of each associative entry. A flag is generated signifying that the corresponding entry is less than or equal to the most significant byte of the numerator. After the flags have been generated, the address of the last flag which is on, is selected. This provides a trial "digit out", which is used to address the true table of multiples and select a value which is subtracted from the left-digit-shifted numerator (or intermediate result). If no underflow condition results, the trial "digit out" is valid and should be stored and the next iteration started. For an underflow condition, the "digit out" is decremented and stored, the X1 multiple is added to the numerator and the next iteration is carried out. If the flag indicating X8 is on or at a value of 1, an X8 latch is set and a second pass is carried out, with the X8 latch output becoming part of the "digit out".
摘要翻译：公开了一种用于算术分割操作的方法和装置，其中除数的一组倍数存储在与各个倍数匹配的地址中的关联存储器中。然后将分子的最高有效字节与每个关联条目的内容进行比较。生成一个标志，表示对应的条目小于或等于分子的最高有效字节。标志生成后，选择最后一个标志位的地址。这提供了一个试验“数字输出”，用于解决真实的多个表，并选择从左数位移分子（或中间结果）中减去的值。如果没有下溢条件结果，试用“数字输出”是有效的，应该被存储并且下一次迭代开始。对于下溢条件，“数字输出”递减并存储，将X1倍数加到分子中，并进行下一次迭代。如果指示X8的标志为1或值为1，则X8锁存器被设置并执行第二遍，X8锁存器输出成为“数字输出”的一部分。

4. 发明授权

US06219698B1 Configuring client software using remote notification 失效
标题翻译：使用远程通知配置客户端软件
公开(公告)号：US06219698B1
公开(公告)日：2001-04-17
申请号：US08994365
申请日：1997-12-19
申请人： Robert A. Iannucci , Christopher M. Weikart
发明人： Robert A. Iannucci , Christopher M. Weikart
IPC分类号： G06F9445
CPC分类号： G06F8/65 , H04L67/42
摘要： To maintain communications between first and second processing systems interconnected by a communications network, computer programing having first and second sets of instructions are stored at the first processing system. The computer programing is initialized at the first processing system to perform a task associated with the first set of instructions. In accordance with the second set of instructions, a first signal is automatically transmitted from the first processing system to the second processing system responsive to the initialization of the computer programming.
摘要翻译：为了保持由通信网络互连的第一和第二处理系统之间的通信，具有第一和第二组指令的计算机编程被存储在第一处理系统中。在第一处理系统处初始化计算机编程以执行与第一组指令相关联的任务。根据第二组指令，响应于计算机编程的初始化，第一信号被自动地从第一处理系统发送到第二处理系统。

5. 发明授权

US08572741B2 Providing security for a virtual machine by selectively triggering a host security scan 有权
标题翻译：通过选择性地触发主机安全扫描为虚拟机提供安全性
公开(公告)号：US08572741B2
公开(公告)日：2013-10-29
申请号：US12904686
申请日：2010-10-14
申请人： Constantine P. Sapuntzakis , Burt A. Toma , Phanindra V. R. Ganti , Robert A. Iannucci, Jr. , Prakash Linga
发明人： Constantine P. Sapuntzakis , Burt A. Toma , Phanindra V. R. Ganti , Robert A. Iannucci, Jr. , Prakash Linga
IPC分类号： G06F21/00
CPC分类号： G06F21/52 , G06F21/53 , G06F2221/2105 , G06F2221/2117 , G06F2221/2141 , G06F2221/2149 , H04L63/1433 , H04L63/145
摘要： The disclosed embodiments provide a system that protects an application from malware on a host system. During operation, the system receives a command to commence execution of the application on the host system. In response to the command, the system causes a security scan to be performed on the host system to detect malware, wherein the malware can compromise the security of the application. The system also restricts one or more operations associated with the application until the security scan successfully completes.
摘要翻译：所公开的实施例提供了保护应用免受主机系统上的恶意软件的系统。在操作期间，系统接收到一个命令，以在主机系统上开始执行应用程序。响应于该命令，系统导致在主机系统上执行安全扫描以检测恶意软件，其中恶意软件可能危及应用的安全性。系统还限制与应用程序相关联的一个或多个操作，直到安全扫描成功完成。

6. 发明申请

US20120096550A1 PROVIDING SECURITY FOR A VIRTUAL MACHINE BY SELECTIVELY TRIGGERING A HOST SECURITY SCAN 有权
标题翻译：通过选择性地追踪主机安全扫描为虚拟机提供安全性
公开(公告)号：US20120096550A1
公开(公告)日：2012-04-19
申请号：US12904686
申请日：2010-10-14
申请人： Constantine P. Sapuntzakis , Burt A. Toma , Phanindra V. R. Ganti , Robert A. Iannucci, JR. , Prakash Linga
发明人： Constantine P. Sapuntzakis , Burt A. Toma , Phanindra V. R. Ganti , Robert A. Iannucci, JR. , Prakash Linga
IPC分类号： G06F11/00 , G06F21/22
CPC分类号： G06F21/52 , G06F21/53 , G06F2221/2105 , G06F2221/2117 , G06F2221/2141 , G06F2221/2149 , H04L63/1433 , H04L63/145
摘要： The disclosed embodiments provide a system that protects an application from malware on a host system. During operation, the system receives a command to commence execution of the application on the host system. In response to the command, the system causes a security scan to be performed on the host system to detect malware, wherein the malware can compromise the security of the application. The system also restricts one or more operations associated with the application until the security scan successfully completes.
摘要翻译：所公开的实施例提供了保护应用免受主机系统上的恶意软件的系统。在操作期间，系统接收到一个命令，以在主机系统上开始执行应用程序。响应于该命令，系统导致在主机系统上执行安全扫描以检测恶意软件，其中恶意软件可能危及应用的安全性。系统还限制与应用程序相关联的一个或多个操作，直到安全扫描成功完成。

7. 发明授权

US5594671A Computer system for simulating physical processes using multiple-integer state vectors 失效
标题翻译：用于使用多整数状态向量模拟物理过程的计算机系统
公开(公告)号：US5594671A
公开(公告)日：1997-01-14
申请号：US165293
申请日：1993-12-10
申请人： Hudong Chen , Peter C. Churchill , Robert A. Iannucci , Kim Molvig , Gregory Papadopoulos , Stephen A. Remondi , Christopher M. Teixeira , Kenneth R. Traub
发明人： Hudong Chen , Peter C. Churchill , Robert A. Iannucci , Kim Molvig , Gregory Papadopoulos , Stephen A. Remondi , Christopher M. Teixeira , Kenneth R. Traub
IPC分类号： G06F15/80 , G06F17/50 , G06F19/00
CPC分类号： G06F15/803 , G06F17/5018 , G06F2217/10 , G06F2217/16
摘要： A computer implemented method for simulating a physical process. The method includes storing in a memory a state vector for each of a number of voxels (i.e., lattice sites). Each state vector includes a plurality of integers, each of which corresponds to a particular momentum state of a number of possible momentum states at a voxel (lattice site) and represents the number of elements having the particular momentum state. Each integer has more than two possible values. The method also includes performing interaction operations on the state vectors that model interactions between elements of different momentum states and performing move operations on the state vectors that reflect movement of elements to new voxels.
摘要翻译：用于模拟物理过程的计算机实现的方法。该方法包括在存储器中存储多个体素（即，格点位置）中的每一个的状态向量。每个状态向量包括多个整数，每个整数对应于在体素（点阵位置）处的多个可能动量状态的特定动量状态，并且表示具有特定动量状态的元素的数量。每个整数有两个以上的可能值。该方法还包括对模拟不同动量状态的元素之间的相互作用的状态向量执行交互操作，并且对反映元素向新体素的运动的状态向量执行移动操作。

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