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1. 发明授权

US5760674A Fusible links with improved interconnect structure 失效
标题翻译：具有改进的互连结构的易熔链
公开(公告)号：US5760674A
公开(公告)日：1998-06-02
申请号：US563691
申请日：1995-11-28
申请人： Richard A. Gilmour , Ronald R. Uttecht , Erick G. Walton
发明人： Richard A. Gilmour , Ronald R. Uttecht , Erick G. Walton
IPC分类号： H01L23/525 , H01H85/00
CPC分类号： H01L23/5258 , H01L2924/0002
摘要： The fuse link includes a first and second interconnect, with interconnects each being substantially longer than deep. The interconnects are disposed toward each other with a insulator region between them. A fusible conductor, spanning the insulator region, is attached at the top of the interconnects. The present device allows the length of the fusible conductor to be shortened, and results in a fuse link that can be consistently blown with a single laser pulse. Additionally, the fuse link can be used in a staggered layout. The staggered layout of parallel fuse links allows a high number of links in a relatively small area, with or without the use of tungsten barriers, and allows accessing all fuse links through a single fuse blow window.
摘要翻译：熔丝连接件包括第一和第二互连件，其互连件基本上比深度长。互连通过它们之间的绝缘体区域彼此相对设置。跨越绝缘体区域的可熔导体连接在互连的顶部。本装置允许可熔导体的长度缩短，并且导致可以用单个激光脉冲一致地熔断的熔丝链。此外，熔丝链可以以交错的布局使用。平行熔丝链的交错布局允许在有或没有使用钨屏障的情况下，在相对较小的区域中有大量的连接，并且允许通过单个保险丝熔断窗口访问所有熔丝链。

2. 发明授权

US6054339A Fusible links formed on interconnects which are at least twice as long as they are deep 失效
标题翻译：在互连上形成的可熔链，至少是深度的两倍
公开(公告)号：US6054339A
公开(公告)日：2000-04-25
申请号：US810587
申请日：1997-03-04
申请人： Richard A. Gilmour , Ronald R. Uttecht , Erick G. Walton
发明人： Richard A. Gilmour , Ronald R. Uttecht , Erick G. Walton
IPC分类号： H01L23/525 , H01L21/82
CPC分类号： H01L23/5258 , H01L2924/0002
摘要： A shortened fuse link is disclosed. The fuse link comprises a first and second interconnect, with interconnects each being substantially longer than deep. The interconnects are disposed toward each other with a insulator region between them. A fusible conductor, spanning the insulator region, is attached at the top of the interconnects. The present device allows the length of the fusible conductor to be shortened, and results in a fuse link that can be consistently blown with a single laser pulse. Additionally, the fuse link can be used in a staggered layout. The staggered layout of parallel fuse links allows a high number of links in a relatively small area, with or without the use of tungsten barriers, and allows accessing all fuse links through a single fuse blow window.
摘要翻译：公开了一种缩短的熔断体。熔丝连接件包括第一和第二互连件，每个互连件基本上比深度长。互连通过它们之间的绝缘体区域彼此相对设置。跨越绝缘体区域的可熔导体连接在互连的顶部。本装置允许可熔导体的长度缩短，并且导致可以用单个激光脉冲一致地熔断的熔丝链。此外，熔丝链可以以交错的布局使用。平行熔丝链的交错布局允许在有或没有使用钨屏障的情况下，在相对较小的区域中有大量的连接，并且允许通过单个保险丝熔断窗口访问所有熔丝链。

3. 发明授权

US06815838B2 Laser alignment target and method 失效
标题翻译：激光对准目标和方法
公开(公告)号：US06815838B2
公开(公告)日：2004-11-09
申请号：US10079333
申请日：2002-02-20
申请人： Timothy H. Daubenspeck , Richard A. Gilmour , William T. Motsiff , Christopher D. Muzzy
发明人： Timothy H. Daubenspeck , Richard A. Gilmour , William T. Motsiff , Christopher D. Muzzy
IPC分类号： H01L23544
CPC分类号： G01B11/272
摘要： A laser alignment target is provided having a surface that is out of plane with and has substantially the same first reflectivity as an adjacent surface of the semiconductor device, and a sidewall having a second reflectivity different than the first reflectivity. The target provides sidewalls that provide contrast for finding the target despite loss of contrast created by layers of dielectric over the target and use of short wavelength light.
摘要翻译：提供了具有与半导体器件的相邻表面具有并具有与第一反射率不同的第一反射率的表面的激光对准靶和具有与第一反射率不同的第二反射率的侧壁。目标提供侧壁，为寻找目标提供对比度，尽管由目标上的电介质层和使用短波长光造成的对比度损失。

4. 发明授权

US06661106B1 Alignment mark structure for laser fusing and method of use 失效
标题翻译：激光熔接对准标记结构及其使用方法
公开(公告)号：US06661106B1
公开(公告)日：2003-12-09
申请号：US10218881
申请日：2002-08-13
申请人： Richard A. Gilmour , William A. Klaasen , William T. Motsiff
发明人： Richard A. Gilmour , William A. Klaasen , William T. Motsiff
IPC分类号： H01L23544
CPC分类号： H01L23/5258 , H01L23/544 , H01L2223/54453 , H01L2924/0002 , H01L2924/00
摘要： The present invention relates to an alignment mark structure for laser fusing. An alignment mark structure is formed which is comprised of image elements that are placed on different film layers in a semiconductor device. Alignment is accomplished by examining the difference in reflected energy of a laser beam as the beam traverses the alignment mark structure. By forming the alignment mark structure such that it has elements on different film layers, the reflected energy can be modulated to avoid the situation in which no difference in reflected energy is found, which would make the alignment mark invisible to the laser fusing tool. A method of applying the alignment mark structure is also disclosed.
摘要翻译：本发明涉及用于激光熔合的对准标记结构。形成对准标记结构，其包括放置在半导体器件中的不同膜层上的图像元素。通过检查当光束穿过对准标记结构时激光束的反射能量的差异来实现对准。通过形成对准标记结构使得其在不同的膜层上具有元件，可以调制反射能量以避免发现反射能量差异的情况，这将使激光熔合工具不可见对准标记。还公开了应用对准标记结构的方法。

5. 发明授权

US5374590A Fabrication and laser deletion of microfuses 失效
标题翻译：微丝的制作和激光删除
公开(公告)号：US5374590A
公开(公告)日：1994-12-20
申请号：US53282
申请日：1993-04-28
申请人： Kerry L. Batdorf , Richard A. Gilmour , Paul Tsang
发明人： Kerry L. Batdorf , Richard A. Gilmour , Paul Tsang
IPC分类号： H01H69/02 , H01L21/768 , H01L21/82 , H01L23/525 , H01L21/268
CPC分类号： H01L23/5258 , H01L2924/0002
摘要： A method of fabricating a microfuse, deletable by laser pulses utilizes laser pulses of a predetermined spot diameter and beam alignment accuracy. A fusible link forming a portion of the microfuse is defined such that its length is at least equal to the sum of the laser spot diameter and the beam alignment accuracy and its width is no greater than half the laser spot diameter. A method of deleting the microfuse by laser pulses is provided where the microfuse has a predetermined composition, length and width having an axis bisecting the width and parallel to the length and is covered with a passivation layer at least 3 .mu.m thick. The method includes adjusting the diameter of the beam of laser light (i) to at least a minimum diameter of W+.DELTA.P.sub.w, where W equals the width of the microfuse fuse link and .DELTA. P.sub.w equals the accuracy of the beam in the direction of W and (ii) to no more than a maximum diameter of L+.DELTA.P.sub.L, where L equals the length of the microfuse fuse link and .DELTA.P.sub.L equals the accuracy of the beam in the direction of L.
摘要翻译：通过激光脉冲去除的微量制品的制造方法使用预定光点直径和光束对准精度的激光脉冲。形成微型电动机的一部分的可熔连杆被限定为使得其长度至少等于激光光斑直径和光束对准精度的总和，并且其宽度不大于激光光斑直径的一半。提供了一种通过激光脉冲来去除微量电极的方法，其中微型电弧器具有预定的组成，长度和宽度具有将宽度平分并平行于长度的轴并且被至少3μm厚的钝化层覆盖。该方法包括将激光束（i）的直径调整至至少最小直径W + DELTA Pw，其中W等于微型熔丝链的宽度，并且DELTA Pw等于沿W方向的光束的精度和（ii）不超过L + DELTA PL的最大直径，其中L等于微熔丝熔丝链的长度，并且DELTA PL等于沿L方向的光束的精度。

6. 发明授权

US5420455A Array fuse damage protection devices and fabrication method 失效
标题翻译：阵列保险丝损坏保护装置及制造方法
公开(公告)号：US5420455A
公开(公告)日：1995-05-30
申请号：US221715
申请日：1994-03-31
申请人： Richard A. Gilmour , Thomas J. Hartswick , David C. Thomas , Ronald R. Uttecht , Erick G. Walton
发明人： Richard A. Gilmour , Thomas J. Hartswick , David C. Thomas , Ronald R. Uttecht , Erick G. Walton
IPC分类号： H01L23/62 , H01L27/02
CPC分类号： H01L23/62 , H01L2924/0002
摘要： The present disclosure sets forth an improved integrated circuit in which circuit elements, adjacent to a fuse, are protected by barriers positioned adjacent the fuse. In the improved integrated circuit the barriers are non-frangible, high melting point structures buried in the passivating layer, covering a wiring layer containing a fuse, and are between the fuse and adjacent circuit elements in the wiring layer structures.Also taught is a method of protecting circuit elements adjacent a fuse comprising the steps of depositing an insulating layer on the surface of a semiconductor device having active regions therein, forming a plurality of fuses and circuit elements in said layer, coating said fuses and elements with a second insulating layer, patterning said second insulating layer to form grooves between each of said fuses and any adjacent fuse or circuit element, and depositing a high melting point and non-frangible material in said grooves.
摘要翻译：本公开提出了一种改进的集成电路，其中与保险丝相邻的电路元件由位于保险丝附近的屏障保护。在改进的集成电路中，阻挡层是非易碎的，高熔点结构掩埋在钝化层中，覆盖包含保险丝的布线层，并且位于布线层结构中的熔丝和相邻的电路元件之间。还教导了一种保护靠近熔丝的电路元件的方法，包括以下步骤：在其中具有有源区的半导体器件的表面上沉积绝缘层，在所述层中形成多个保险丝和电路元件，将所述保险丝和元件涂覆第二绝缘层，图案化所述第二绝缘层以在每个所述保险丝和任何相邻的熔丝或电路元件之间形成槽，以及在所述槽中沉积高熔点和非易碎材料。

7. 发明授权

US5523253A Array protection devices and fabrication method 失效
标题翻译：阵列保护装置及制造方法
公开(公告)号：US5523253A
公开(公告)日：1996-06-04
申请号：US389529
申请日：1995-02-16
申请人： Richard A. Gilmour , Thomas J. Hartswick , David C. Thomas , Ronald R. Uttecht , Erick G. Walton
发明人： Richard A. Gilmour , Thomas J. Hartswick , David C. Thomas , Ronald R. Uttecht , Erick G. Walton
IPC分类号： H01L23/62 , H01L21/82
CPC分类号： H01L23/62 , H01L2924/0002
摘要： The present disclosure sets forth an improved integrated circuit in which circuit elements, adjacent to a fuse, are protected by barriers positioned adjacent the fuse. In the improved integrated circuit the barriers are non-frangible, high melting point structures buried in the passivating layer, covering a wiring layer containing a fuse, and are between the fuse and adjacent circuit elements in the wiring layer structures.Also taught is a method of protecting circuit elements adjacent a fuse comprising the steps of depositing an insulating layer on the surface of a semiconductor device having active regions therein, forming a plurality of fuses and circuit elements in said layer, coating said fuses and elements with a second insulating layer, patterning said second insulating layer to form grooves between each of said fuses and any adjacent fuse or circuit element, and depositing a high melting point and non-frangible material in said grooves.
摘要翻译：本公开提出了一种改进的集成电路，其中与保险丝相邻的电路元件由位于保险丝附近的屏障保护。在改进的集成电路中，阻挡层是非易碎的，高熔点结构掩埋在钝化层中，覆盖包含保险丝的布线层，并且位于布线层结构中的熔丝和相邻的电路元件之间。还教导了一种保护靠近熔丝的电路元件的方法，包括以下步骤：在其中具有有源区的半导体器件的表面上沉积绝缘层，在所述层中形成多个保险丝和电路元件，将所述保险丝和元件涂覆第二绝缘层，图案化所述第二绝缘层以在每个所述保险丝和任何相邻的熔丝或电路元件之间形成槽，以及在所述槽中沉积高熔点和非易碎材料。

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