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1. 发明授权

US5055383A Process for making masks with structures in the submicron range 失效
标题翻译：用于制作带有结构的遮罩的方法
公开(公告)号：US5055383A
公开(公告)日：1991-10-08
申请号：US420870
申请日：1989-10-12
申请人： Otto Koblinger , Klaus Meissner , Reinhold Muhl , Hans-Joachim Trumpp , Werner Zapka
发明人： Otto Koblinger , Klaus Meissner , Reinhold Muhl , Hans-Joachim Trumpp , Werner Zapka
IPC分类号： G03F1/08 , G03F7/00 , G03F7/09 , H01L21/027 , H01L21/30 , H01L21/306 , H01L21/3065 , H01L21/308 , H01L21/311
CPC分类号： G03F7/0035 , G03F7/094 , H01L21/0271 , H01L21/30608 , H01L21/3065 , H01L21/3081 , H01L21/31144
摘要： In the course of the process for making masks with structures in the submicrometer range, initially structures of photoresist or polymer material with horizontal and substantially vertical sidewalls are produced on a silicon substrate covered with an oxide layer. This is followed by a layer of silicon nitride which is deposited by LPCVD. The resultant structure is planarized with a photoresist which is etched back until the start of the vertical edges of the sidewall coating formed by the nitride layer is bared on the photoresist structures. In a photolithographic step, a trimming mask is produced on the surface of the nitride layer and the planarizing resist. The bared regions of the nitride layer are then removed by isotropic etching. The dimensions A-B of the openings defined after removal of the nitride layer from the vertical surfaces of the photoresist structures are transferred to the oxide layer by anisotropic etching. Concurrently with these structures of minimum line width, registration marks are generated which allow the adjustment necessary for a further photolithographic step to be carried out with maximum accuracy. After removal of the trimming mask, the planarizing resist, the photoresist structures and the remainder of the nitride layer, structures with coarser line widths are defined in a further photolithographic step, which are also transferred to the oxide layer. Using the oxide layer as a mask, trenches of the desired depth are produced in the silicon substrate by anisotropic etching. The mask is thinned by anisotropic etching, and the oxide layers are removed from the front and the back side by wet etching.
摘要翻译：在制造具有亚微米范围内的结构的掩模的过程中，最初在被氧化物层覆盖的硅衬底上产生具有水平和基本垂直侧壁的光致抗蚀剂或聚合物材料的结构。之后是通过LPCVD沉积的一层氮化硅。所得到的结构被蚀刻后的光致抗蚀剂平坦化，直到由氮化物层形成的侧壁涂层的垂直边缘的开始在光致抗蚀剂结构上露出。在光刻步骤中，在氮化物层和平坦化抗蚀剂的表面上制造修整掩模。然后通过各向同性蚀刻除去氮化物层的裸露区域。在从光致抗蚀剂结构的垂直表面去除氮化物层之后限定的开口的尺寸A-B通过各向异性蚀刻转移到氧化物层。与最小线宽度的这些结构同时产生对准标记，其允许以最大精度执行进一步的光刻步骤所必需的调整。在去除修剪掩模之后，在另外的光刻步骤中限定平坦化抗蚀剂，光致抗蚀剂结构和氮化物层的其余部分，具有较宽线宽的结构也被转移到氧化物层。使用氧化物层作为掩模，通过各向异性蚀刻在硅衬底中产生所需深度的沟槽。通过各向异性蚀刻使掩模变薄，并且通过湿蚀刻从前侧和后侧去除氧化物层。

2. 发明授权

US4513203A Mask and system for mutually aligning objects in ray exposure systems 失效
标题翻译：用于在射线曝光系统中相互对准物体的掩模和系统
公开(公告)号：US4513203A
公开(公告)日：1985-04-23
申请号：US625586
申请日：1984-06-29
申请人： Harald Bohlen , Helmut Engelke , Johann Greschner , Reinhold Muhl , Peter Nehmiz , Hans J. Trumpp
发明人： Harald Bohlen , Helmut Engelke , Johann Greschner , Reinhold Muhl , Peter Nehmiz , Hans J. Trumpp
IPC分类号： G03B27/32 , G03F9/00 , H01J37/304 , H01L21/027 , H01L21/68 , G01N21/00 , G01N23/00
CPC分类号： H01J37/3174 , B82Y10/00 , B82Y40/00 , G03F9/00 , G03F9/7053 , H01J37/3045
摘要： For mutually aligning (registering) mask and substrate in X- or corpuscular ray lithography, an electron beam (16) is used which extends collaterally to the exposure beam (ion beam or X-ray) and which is suppressed during the actual exposure process. For coupling the electron beam to the exposure beam path, a magnetic field (7) is used. The accurate relative position of mask and substrate is determined during alignment by tilting the electron beam. Fine alignment during exposure is effected by suitably tilting the ion beam or shifting the substrate relative to the X-ray. The mask (10) used for exposure consists of a very thin silicon layer with a pattern area (M) and a registration area (R) spatially separated therefrom. The registration area consists of a plurality of openings, the pattern area of blind holes.
摘要翻译：为了在X射线或微粒光刻中相互对准（配准）掩模和衬底，使用电子束（16），其横向延伸到曝光光束（离子束或X射线），并且在实际曝光过程中被抑制。为了将电子束耦合到曝光光束路径，使用磁场（7）。通过倾斜电子束在对准期间确定掩模和衬底的精确相对位置。通过适当地倾斜离子束或相对于X射线移动衬底来实现曝光期间的精细对准。用于曝光的掩模（10）由具有图案区域（M）的非常薄的硅层和与其空间分离的对准区域（R）组成。注册区域由多个开口组成，盲孔的图案区域。

3. 发明授权

US4816115A Process of making via holes in a double-layer insulation 失效
标题翻译：在双层绝缘中制作通孔的工艺
公开(公告)号：US4816115A
公开(公告)日：1989-03-28
申请号：US172738
申请日：1988-03-23
申请人： Eva Horner , Reinhold Muhl , Hans-Joachim Trumpp
发明人： Eva Horner , Reinhold Muhl , Hans-Joachim Trumpp
IPC分类号： H01L21/302 , H01L21/3065 , H01L21/311 , H01L21/3213 , H01L21/768 , B44C1/22 , B29C37/00 , C03C15/00 , C03C25/06
CPC分类号： H01L21/31138 , H01L21/76804
摘要： A method of making via holes in a double-layer insulation of nitride and polyimide. The via holes are made with one photomask only by applying a photoresist process with double exposure, and a multi-step dry etching process. The double exposure, which includes an image-wise exposure followed by blanket irradiation, achieves an edge angle in the photoresist between approx. 60.degree. and 70.degree., depending on the exposure time ratios. This angle is transferred into the polyimide layer in a dry etching process. In a first etching step with CF.sub.4 as etching gas the greater part of the polyimide is removed. For removing the residual polyimide in the via holes there now follows an etching step in O.sub.2. Etch bias is thus kept on a very low level. The nitride layer is then etched with CF.sub.4 as etching gas, with the etching process being executed in two steps, each followed by an etching step in O.sub.2 for laterally shifting the photoresist and the polyimide via the resist angle. By softening the step height a softer profile of the via holes is ensured, which permits very good covering by a second layer of metallurgy.
摘要翻译：在氮化物和聚酰亚胺的双层绝缘中制造通孔的方法。通孔仅通过使用双曝光的光致抗蚀剂工艺和多步骤干蚀刻工艺由一个光掩模制成。包括曝光后进行成像曝光的双重曝光在光致抗蚀剂中达到约 60°和70°，取决于曝光时间比。该干燥蚀刻工艺将该角度转移到聚酰亚胺层中。在用CF 4作为蚀刻气体的第一蚀刻步骤中，去除了大部分聚酰亚胺。为了去除通孔中的残余聚酰亚胺，现在在O 2中进行蚀刻步骤。因此，蚀刻偏压保持在非常低的水平。然后用CF4作为蚀刻气体蚀刻氮化物层，蚀刻过程分两步进行，随后在O 2中进行蚀刻步骤，以通过抗蚀剂角横向移动光致抗蚀剂和聚酰亚胺。通过软化台阶高度，确保通孔的较软的轮廓，这允许通过第二层冶金进行非常好的覆盖。

4. 发明授权

US4980317A Method of producing integrated semiconductor structures comprising field-effect transistors with channel lengths in the submicron range using a three-layer resist system 失效
标题翻译：使用三层抗蚀剂体系制造包含具有亚微米范围的沟道长度的场效应晶体管的集成半导体结构的方法
公开(公告)号：US4980317A
公开(公告)日：1990-12-25
申请号：US326352
申请日：1989-03-21
申请人： Otto Koblinger , Reinhold Muhl , Hans-Joachim Trumpp
发明人： Otto Koblinger , Reinhold Muhl , Hans-Joachim Trumpp
IPC分类号： H01L21/302 , H01L21/027 , H01L21/28 , H01L21/30 , H01L21/3065
CPC分类号： H01L21/0271 , H01L21/28123 , Y10S148/051 , Y10S148/137 , Y10S438/947 , Y10S438/95 , Y10S438/97
摘要： Disclosed is a method of producing an integrated semiconductor structure, comprising components with dimensions in the submicron range, wherein a three-layer resist system is used to produce a polymer or resist mask. The polymer or resist mask thus produced is used to etch a layer of polysilicon on the semiconductor substrate. The method is characterized in that the pattern, produced conventionally in the top layer of the three-layer resist and including an angle
摘要翻译：公开了一种制造集成半导体结构的方法，其包括尺寸在亚微米范围内的组分，其中使用三层抗蚀剂体系来制备聚合物或抗蚀剂掩模。由此产生的聚合物或抗蚀剂掩模用于蚀刻半导体衬底上的多晶硅层。该方法的特征在于，通常在三层抗蚀剂的顶层中产生并且包括角度约90°的图案通过RIE使用CF 4转移到等离子体氮化物的中心层和通过RIE，使用氧气，到底部抗蚀剂或聚合物层。在现有技术的方法中，随后在氧气中进行横向蚀刻以将掩模的尺寸减小所需量。本发明的改进方法提供了首先要去除的等离子体氮化物掩模，如果需要，使用氧气中的平面步骤来增加掩模结构中的正角度，然后使后一结构在氧气中横向蚀刻以减少其尺寸按所需数量。当掩模中的角度<90°时，可以选择横向蚀刻的参数，使得蚀刻工艺在很大程度上是各向异性的，因此可以准确且容易地确定。结果，可以在蚀刻周期期间精确地调整横向蚀刻的绝对量。随着阴影等离子体氮化物在横向蚀刻之前被去除，相邻结构对横向蚀刻的影响大大降低。由此产生的掩模用于蚀刻多晶硅层结构，其角度确保在后续工艺步骤和离子注入中产生的间隔物的良好定义，这两者确定场效应晶体管的有效沟道长度。

5. 发明授权

US4489146A Reverse process for making chromium masks using silicon dioxide dry etch mask 失效
标题翻译：使用二氧化硅干蚀刻掩模制造铬掩模的反向工艺
公开(公告)号：US4489146A
公开(公告)日：1984-12-18
申请号：US524182
申请日：1983-08-17
申请人： Gunther Bock , Bernhard Hafner , Reinhold Muhl , Klaus P. Thiel
发明人： Gunther Bock , Bernhard Hafner , Reinhold Muhl , Klaus P. Thiel
IPC分类号： C23F1/00 , G03F1/68 , G03F1/80 , G03F7/26 , H01L21/027 , H01L21/302 , H01L21/3065 , G03F1/00 , B44C1/22 , G03F7/16
CPC分类号： G03F1/68 , G03F1/80
摘要： On a substrate (1) covered with a chromium layer (2), a positive resist layer (3) is applied, exposed through an exposure mask with the mask pattern corresponding to the negative of the respective chromium pattern, developed, and blanket-coated with a less than or equal to 10 nm thick layer (4) of silicon dioxide. Then photoresist layer (3) and the silicon layer (4) thereon are lifted off, and finally the chromium layer (2) is dry-etched, the remaining silicon dioxide layer (4) being used as an etch mask.Chromium masks are used e.g. in the production of semiconductor circuits. By means of the reverse process, structures whose smallest dimensions are in the micrometer and the submicrometer range can be transferred into chromium layers with sharp edges.
摘要翻译：在覆盖有铬层（2）的基板（1）上，施加正性抗蚀剂层（3），通过曝光掩模曝光，对应于相应铬图案的阴性的掩模图案显影，并且被覆盖具有小于或等于10nm厚的二氧化硅层（4）。然后将光致抗蚀剂层（3）和其上的硅层（4）剥离，最后将干燥蚀刻铬层（2），剩下的二氧化硅层（4）用作蚀刻掩模。铬掩模例如使用。在半导体电路的生产中。通过逆向工艺，最小尺寸在千分尺和亚微米范围内的结构可以转移到具有锋利边缘的铬层中。

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