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1. 发明申请

US20110022897A1 MICROCONTROLLER DEVICE, MICROCONTROLLER DEBUGGING DEVICE, METHOD OF DEBUGGING A MICROCONTROLLER DEVICE, MICROCONTROLLER KIT 有权
标题翻译： MICROCONTROLLER器件，微控制器调试器件，调制微控制器器件的方法，微控制器套件
公开(公告)号：US20110022897A1
公开(公告)日：2011-01-27
申请号：US12934279
申请日：2008-04-15
申请人： Ray Marshall , Thomas Macdonald , Andrew Stephen Mihalik
发明人： Ray Marshall , Thomas Macdonald , Andrew Stephen Mihalik
IPC分类号： G06F11/26 , G06F9/24
CPC分类号： G06F11/006
摘要： A microcontroller device comprising a receiver component configured to receive a one or more reset signals for the microcontroller device; an identification component configured to identify a source of the or each reset signals received by the receiver component; a time interval determining component configured to determine a length of a time interval in accordance with the identified source of the or each reset signals received by the receiver component; a voltage setting component configured to set a voltage of an output of the microcontroller device to a first value on receipt of a reset signal by the receiver component; and a control component configured to maintain the voltage of the output at the first value for the duration of the determined length of the time interval; and set the voltage of the output to a second value on substantial completion of the determined length of the time interval.
摘要翻译：一种微控制器装置，包括被配置为接收用于微控制器装置的一个或多个复位信号的接收器部件; 识别组件，其被配置为识别由所述接收器组件接收的所述或每个复位信号的源; 时间间隔确定部件，被配置为根据由所述接收器部件接收的所述或每个复位信号的识别源确定时间间隔的长度; 电压设定部件，被配置为在所述接收器部件接收到复位信号时将所述微控制器设备的输出的电压设置为第一值; 以及控制部件，被配置为将所述输出的电压在所述时间间隔的所确定的长度的持续时间内保持在所述第一值; 并且在确定的时间间隔长度的实质完成时将输出的电压设置为第二值。

2. 发明授权

US5863639A Nonwoven sheet products made from plexifilamentary film fibril webs 失效
公开(公告)号：US5863639A
公开(公告)日：1999-01-26
申请号：US685367
申请日：1996-07-23
申请人： Ralph A. Franke , Hyun S. Lim , Larry Ray Marshall , Michael P. Milone , R. Gail Raty , Akhileswar G. Vaidyanathan
发明人： Ralph A. Franke , Hyun S. Lim , Larry Ray Marshall , Michael P. Milone , R. Gail Raty , Akhileswar G. Vaidyanathan
IPC分类号： D04H1/72 , D04H3/16 , G01B11/24 , B32B27/14
CPC分类号： D04H3/16 , D04H1/724 , Y10S428/903 , Y10T428/24826 , Y10T428/24942 , Y10T428/24992 , Y10T428/249978 , Y10T442/608
摘要： This invention relates to improved sheet products and specifically to improved nonwoven sheet products made from highly oriented plexifilamentary film-fibril webs. The improved sheet products have high opacity and strength with a much wider range of porosity or Gurley Hill Porosity Values. In particular, sheet products made in accordance with the present invention have considerably higher Gurley Hill Porosity Values than similar weight sheet products subject to the same finishing treatments in accordance with prior known sheet materials. Similarly, sheet products made in accordance with the present invention can be made which have much lower Gurley Hill Porosity Values than prior sheet materials. The invention includes numerous methods and data characterizing the webs and sheets that form the improved sheet materials.

3. 发明授权

US4440019A Free point indicator 失效
标题翻译：自由点指示器
公开(公告)号：US4440019A
公开(公告)日：1984-04-03
申请号：US383178
申请日：1982-05-28
申请人： W. Ray Marshall
发明人： W. Ray Marshall
IPC分类号： E21B47/09 , E21B47/00
CPC分类号： E21B47/09
摘要： The components for operation of the invention are three: (1) a downhole tool consisting basically of a sensitive coil suitably protected by an encasing sheath as it is run downhole inside a string of drill pipe, tubing or the like, (2) surface apparatus to pulse the coil by discharging a capacitor through it, and later to detect small voltages induced in the coil as a result of running it past magnetic spots in the string produced by the capacitor discharges, and (3) connecting elements for both running and pulling the downhole tool, e.g., a wire line, and for electrically connecting the coil to the surface apparatus.Such apparatus is used in conjunction with standard equipment at the wellhead to stress the string by either pulling up on it or trying to rotate it, or both. In trying to pinpoint the depth at which the string is stuck, use of the invention exploits the fact that the lifting or torqueing force will cause strains in the material of the string along its entire free length, but no strains will be induced in the portion below the point of sticking. Also exploited is the fact that thus stressing the free part of the string will erase all magnetic spots previously placed there by pulsing the downhole tool. Since no stresses are produced below the point of sticking ("free point"), magnetic spots below such point will remain, and are detected as the tool travels past them.
摘要翻译：本发明的操作组件有三个：（1）一个井下工具，其基本上由一个敏感线圈构成，该感应线圈在一套钻杆，管子或类似的钻杆内钻出时被适当保护的套管套住，（2）表面装置通过使电容器放电来对线圈进行脉冲驱动，然后检测线圈中感应出的电压，使其通过电容器放电产生的串中的磁点而流过，（3）连接元件用于运行和拉动井下工具，例如线缆，以及用于将线圈电连接到表面装置。这样的设备与井口的标准设备结合使用，可以通过拉起或试图旋转绳子或两者来强调琴弦。在试图确定串被卡住的深度时，使用本发明利用这样的事实，即提升或扭转力将沿着其整个自由长度在串的材料中引起应变，但是在该部分中不会引起应变低于粘贴点。也被利用的事实是，因此强调弦的自由部分将通过脉冲井下工具来消除先前放置在那里的所有磁点。由于在粘着点（“自由点”）之下没有产生应力，所以在该点以下的磁点将保留，并且随着工具行进通过它们而被检测。

4. 发明授权

US09436546B2 Apparatus for error detection in memory devices 有权
标题翻译：用于存储器件中的错误检测的装置
公开(公告)号：US09436546B2
公开(公告)日：2016-09-06
申请号：US14258327
申请日：2014-04-22
申请人： Ray Marshall , Joseph Charles Circello , Wilhard Christophorus Von Wendorff
发明人： Ray Marshall , Joseph Charles Circello , Wilhard Christophorus Von Wendorff
IPC分类号： G11C29/00 , G06F11/10
CPC分类号： G06F11/1048
摘要： The invention relates to an apparatus for transfer of data elements between a bus controller, such as a CPU, and a memory controller. An address translator is arranged to receive a write address from the CPU, to modify the write address and to send the modified write address to the memory controller. An ECC calculator is arranged to receive write input data associated with the write address, from the CPU, and to generate an error correction code on the basis of the write input data. A concatenator is arranged to receive the write input data from the CPU, and to receive the error correction code from the ECC calculator, and to concatenate the write input data and the error correction code to obtain write output data, and to send the write output data to the memory controller.
摘要翻译：本发明涉及一种用于在总线控制器（例如CPU）和存储器控制器之间传送数据元素的装置。地址转换器被安排为从CPU接收写入地址，修改写入地址并将修改的写入地址发送到存储器控制器。 ECC计算器被布置成从CPU接收与写入地址相关联的写入输入数据，并且基于写入输入数据生成纠错码。串联器被配置为从CPU接收写入输入数据，并从ECC计算器接收纠错码，并且连接写入输入数据和纠错码以获得写入输出数据，并发送写入输出数据到存储器控制器。

5. 发明申请

US20150227413A1 ELECTRONIC DEVICE AND METHOD FOR PROTECTING AN ELECTRONIC DEVICE AGAINST UNAUTHORIZED USE 有权
标题翻译：用于保护未经使用的电子设备的电子设备和方法
公开(公告)号：US20150227413A1
公开(公告)日：2015-08-13
申请号：US14422060
申请日：2012-09-13
申请人： Ray Marshall , Joseph Circello , Norbert Huemmer
发明人： Ray Marshall , Joseph Circello , Norbert Huemmer
IPC分类号： G06F11/07 , G06F1/04
CPC分类号： G06F11/0793 , B60R25/00 , G06F1/04 , G06F11/0721 , G06F21/70
摘要： An electronic device comprising a clock unit and a processing unit connected to the clock unit is described. The clock unit may deliver an output clock signal for operating the processing unit in accordance with the output clock signal. The clock unit may have: a normal mode in which the output clock signal has a low amount of jitter and a normal clock rate to enable normal use of the electronic device, and a failure analysis mode in which the output clock signal has a high amount of jitter or a reduced clock rate, or a high amount of jitter combined with a reduced clock rate, to impede the normal use. The clock unit may be protected against unauthorized re-activation of the normal mode. A method of protecting an electronic device against unauthorized use is also described.
摘要翻译：描述了包括时钟单元和连接到时钟单元的处理单元的电子设备。时钟单元可以根据输出时钟信号递送用于操作处理单元的输出时钟信号。时钟单元可以具有：正常模式，其中输出时钟信号具有低的抖动量和正常的时钟速率以使得能够正常使用电子设备;以及故障分析模式，其中输出时钟信号具有高的数量的抖动或降低的时钟速率，或者与降低的时钟速率相结合的大量抖动，以阻止正常使用。可以防止时钟单元防止未经授权的重新启动正常模式。还描述了保护电子设备免受未经授权的使用的方法。

6. 发明授权

US08244381B2 Microprocessor, system for controlling a device and apparatus 有权
标题翻译：微处理器，用于控制设备和设备的系统
公开(公告)号：US08244381B2
公开(公告)日：2012-08-14
申请号：US12679391
申请日：2007-10-04
申请人： Ray Marshall , Mike Garrard , Jeff Loeliger
发明人： Ray Marshall , Mike Garrard , Jeff Loeliger
IPC分类号： G05B11/01 , G05B13/02 , G05D7/00
CPC分类号： G05B19/042 , G05B2219/21108 , G05B2219/33268 , G05B2219/34053 , G05B2219/34062 , Y10T137/8158
摘要： A microprocessor may include a logic circuit for executing instructions of a data processing application. The microprocessor may have a timer system which includes a clock counter connected to a clock input for receiving a clock signal and counting a number of cycles of the clock signal. A clock comparator may be connected the clock counter and to a timer register in which a timer reference value can be stored. The clock comparator may compare a number of cycles of the clock signal with the timer reference value and generate a timer signal based on the comparison. The timer system may have a timer output for outputting timer signal. The timer system may include a control input for receiving a digital value representing a measured value of a sensed parameter of a device and a control register in which a control reference value can be stored. A control comparator may be connected the control input. The control comparator may compare the digital value with the reference value and generating a device control signal based on the comparison. The timer system may have a control output for outputting the device control signal to an actuator arranged to control the parameter of the device.
摘要翻译：微处理器可以包括用于执行数据处理应用的指令的逻辑电路。微处理器可以具有定时器系统，其包括连接到时钟输入的时钟计数器，用于接收时钟信号并计数时钟信号的周期数。时钟比较器可以连接到时钟计数器和定时器寄存器，其中可以存储定时器参考值。时钟比较器可以将时钟信号的周期数与定时器参考值进行比较，并且基于比较生成定时器信号。定时器系统可以具有用于输出定时器信号的定时器输出。定时器系统可以包括用于接收表示设备的感测参数的测量值的数字值的控制输入和可以存储控制参考值的控制寄存器。控制比较器可以连接控制输入。控制比较器可以将数字值与参考值进行比较，并根据比较产生器件控制信号。定时器系统可以具有控制输出，用于将设备控制信号输出到布置成控制设备参数的致动器。

7. 发明申请

US20100200088A1 MICROPROCESSOR, SYSTEM FOR CONTROLLING A DEVICE AND APPARATUS 有权
标题翻译：微处理器，用于控制设备和设备的系统
公开(公告)号：US20100200088A1
公开(公告)日：2010-08-12
申请号：US12679391
申请日：2007-10-04
申请人： Ray Marshall , Mike Garrard , Jeff Loeliger
发明人： Ray Marshall , Mike Garrard , Jeff Loeliger
IPC分类号： E03B7/07 , G05B19/042
CPC分类号： G05B19/042 , G05B2219/21108 , G05B2219/33268 , G05B2219/34053 , G05B2219/34062 , Y10T137/8158
摘要： A microprocessor may include a logic circuit for executing instructions of a data processing application. The microprocessor may have a timer system which includes a clock counter connected to a clock input for receiving a clock signal and counting a number of cycles of the clock signal. A clock comparator may be connected the clock counter and to a timer register in which a timer reference value can be stored. The clock comparator may compare a number of cycles of the clock signal with the timer reference value and generate a timer signal based on the comparison. The timer system may have a timer output for outputting timer signal. The timer system may include a control input for receiving a digital value representing a measured value of a sensed parameter of a device and a control register in which a control reference value can be stored. A control comparator may be connected the control input. The control comparator may compare the digital value with the reference value and generating a device control signal based on the comparison. The timer system may have a control output for outputting the device control signal to an actuator arranged to control the parameter of the device.
摘要翻译：微处理器可以包括用于执行数据处理应用的指令的逻辑电路。微处理器可以具有定时器系统，其包括连接到时钟输入的时钟计数器，用于接收时钟信号并计数时钟信号的周期数。时钟比较器可以连接到时钟计数器和定时器寄存器，其中可以存储定时器参考值。时钟比较器可以将时钟信号的周期数与定时器参考值进行比较，并且基于比较生成定时器信号。定时器系统可以具有用于输出定时器信号的定时器输出。定时器系统可以包括用于接收表示设备的感测参数的测量值的数字值的控制输入和可以存储控制参考值的控制寄存器。控制比较器可以连接控制输入。控制比较器可以将数字值与参考值进行比较，并根据比较产生器件控制信号。定时器系统可以具有控制输出，用于将设备控制信号输出到布置成控制设备参数的致动器。

8. 发明申请

US20070255924A1 Processor and method for altering address translation 有权
标题翻译：用于改变地址转换的处理器和方法
公开(公告)号：US20070255924A1
公开(公告)日：2007-11-01
申请号：US11413422
申请日：2006-04-28
申请人： William Moyer , Ray Marshall , Richard Soja
发明人： William Moyer , Ray Marshall , Richard Soja
IPC分类号： G06F12/00
CPC分类号： G06F12/1027
摘要： In a processor having an address translation table, a method includes providing a logical address and control signal. When the control signal has a first value, a first physical address is provided corresponding to the logical address, and when the control signal has a second value, a second physical address is provided. The first physical address and the second physical address are stored in at least one valid entry of the address translation table. In one case, the first physical address is stored in a first valid entry having a tag field which matches the logical address and the second physical address is stored in a second valid entry having a tag field which matches the logical address. Alternatively, the first physical address is stored in a first field of a first valid entry and the second physical address is stored in a second field of the first valid entry.
摘要翻译：在具有地址转换表的处理器中，一种方法包括提供逻辑地址和控制信号。当控制信号具有第一值时，对应于逻辑地址提供第一物理地址，并且当控制信号具有第二值时，提供第二物理地址。第一物理地址和第二物理地址存储在地址转换表的至少一个有效条目中。在一种情况下，第一物理地址存储在具有与逻辑地址匹配的标签字段的第一有效条目中，并且第二物理地址被存储在具有与逻辑地址匹配的标签字段的第二有效条目中。或者，第一物理地址存储在第一有效条目的第一字段中，并且第二物理地址存储在第一有效条目的第二字段中。

9. 发明授权

US5851936A Elongation for flash spun products 失效
标题翻译：闪纺产品的伸长率
公开(公告)号：US5851936A
公开(公告)日：1998-12-22
申请号：US825266
申请日：1997-03-27
申请人： Larry Ray Marshall
发明人： Larry Ray Marshall
IPC分类号： A41D31/00 , D01D5/11 , D01F6/04 , D04H1/54 , D04H3/16
CPC分类号： D01F6/04 , D01D5/11 , D04H1/724 , Y10T428/24603 , Y10T442/608
摘要： This invention relates to improved elongation properties for flash-spun plexifilamentary film-fibrils. The technique for obtaining the improved properties is to increase the length to diameter ratio of the spin orifice and to reduce the ratio of polymer in the spin solution.
摘要翻译：本发明涉及闪纺丛状薄膜原纤维的改进的伸长性能。用于获得改进性能的技术是增加旋转孔的长径比并且降低旋转溶液中聚合物的比例。

10. 发明申请

US20150301890A1 APPARATUS FOR ERROR DETECTION IN MEMORY DEVICES 有权
标题翻译：用于存储器件错误检测的装置
公开(公告)号：US20150301890A1
公开(公告)日：2015-10-22
申请号：US14258327
申请日：2014-04-22
申请人： RAY MARSHALL , JOSEPH CHARLES CIRCELLO , WILHARD CHRISTOPHORUS VON WENDORFF
发明人： RAY MARSHALL , JOSEPH CHARLES CIRCELLO , WILHARD CHRISTOPHORUS VON WENDORFF
IPC分类号： G06F11/10
CPC分类号： G06F11/1048
摘要： The invention relates to an apparatus for transfer of data elements between a bus controller, such as a CPU, and a memory controller. An address translator is arranged to receive a write address from the CPU, to modify the write address and to send the modified write address to the memory controller. An ECC calculator is arranged to receive write input data associated with the write address, from the CPU, and to generate an error correction code on the basis of the write input data. A concatenator is arranged to receive the write input data from the CPU, and to receive the error correction code from the ECC calculator, and to concatenate the write input data and the error correction code to obtain write output data, and to send the write output data to the memory controller.
摘要翻译：本发明涉及一种用于在总线控制器（例如CPU）和存储器控制器之间传送数据元素的装置。地址转换器被安排为从CPU接收写入地址，修改写入地址并将修改的写入地址发送到存储器控制器。 ECC计算器被布置成从CPU接收与写入地址相关联的写入输入数据，并且基于写入输入数据生成纠错码。串联器被配置为从CPU接收写入输入数据，并从ECC计算器接收纠错码，并且连接写入输入数据和纠错码以获得写入输出数据，并发送写入输出数据到存储器控制器。

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