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    • 3. 发明授权
    • Securing leased resources on a computer
    • 保护计算机上的租用资源
    • US07707290B2
    • 2010-04-27
    • US11382080
    • 2006-05-08
    • Justin P BandholzRalph M BegunAndrew S HeinzmannFernando Lopez
    • Justin P BandholzRalph M BegunAndrew S HeinzmannFernando Lopez
    • G06F15/173
    • G06F21/57G06F21/105
    • Embodiments of the invention provide a novel and non-obvious method, system and computer program product for securing of leased resources on a computer. In one embodiment of the invention, a computer for securing resources may comprise at least one processor, a plurality of resources, wherein each resource is associated with configuration data and a programmable logic device connected to each of the plurality of resources. The programmable logic device may be configured for determining whether a resource is leased, reading un-encoded configuration data from a resource, and sending the configuration data to a first unit, if the resource is not leased. The programmable logic device may further be configured for reading encoded configuration data from a resource, decoding the configuration data, sending the configuration data that was decoded to a first unit, and logging use of the resource by the first unit, if the resource is leased.
    • 本发明的实施例提供了一种用于在计算机上保护租用资源的新颖且非显而易见的方法,系统和计算机程序产品。 在本发明的一个实施例中,用于保护资源的计算机可以包括至少一个处理器,多个资源,其中每个资源与配置数据相关联,以及连接到多个资源中的每一个的可编程逻辑设备。 可编程逻辑设备可以被配置为用于确定资源是否租用,从资源读取未编码的配置数据,以及如果所述资源不被租用,则将所述配置数据发送到第一单元。 可编程逻辑设备还可以被配置为:如果资源被租赁,则从资源读取编码的配置数据,解码配置数据,将被解码的配置数据发送到第一单元,以及记录第一单元的资源的使用 。
    • 6. 发明授权
    • Method and apparatus for selectively posting write cycles using the
82385 cache controller
    • 使用82385高速缓存控制器选择性地发布写周期的方法和装置
    • US5045998A
    • 1991-09-03
    • US359794
    • 1989-06-01
    • Ralph M. BegunPatrick M. BlandMark E. Dean
    • Ralph M. BegunPatrick M. BlandMark E. Dean
    • G06F12/08
    • G06F12/0888
    • A microprocessor system employing an 80386 CPU and an 82385 cache controller has the capability of functioning with dynamic bus sizing (where the CPU interacts with devices which may or may not be 32-bits wide), as well as posted write capability. Unfortunately, the two capabilities have the possibility of an incompatibility if a write cycle is posted to a device which cannot transfer 32 bits on a single cycle. The present invention provides logic to overcome this incompatibility. An address decoder is provided to decode the tag portion of an address asserted on a CPU bus to determine if the asserted address is inside or outside a range of addresses which define cacheable devices. Any cacheable device is by definition 32 bits wide and therefore posted writes are allowed only to cacheable devices. Accordingly, the microcomputer system employing the invention posts write cycles to cacheable devices; write cycles to non-cacheable devices are inhibited from being posted.
    • 采用80386 CPU和82385高速缓存控制器的微处理器系统具有动态总线大小调整功能(CPU与可能或不是32位宽的设备交互)以及发布的写入功能。 不幸的是,如果将写周期发布到在单个周期内不能传输32位的器件,则这两个功能具有不兼容的可能性。 本发明提供了克服这种不兼容性的逻辑。 提供地址解码器来解码在CPU总线上断言的地址的标签部分,以确定所断言的地址是否在限定可高速缓存设备的地址范围之内或之外。 任何可缓存设备的定义为32位宽,因此发布的写入仅允许可缓存设备。 因此,采用本发明的微计算机系统将写入周期写入可高速缓存的设备; 对不可缓存设备的写周期被禁止发布。
    • 7. 发明申请
    • STRUCTURE FOR SECURING LEASED RESOURCES ON A COMPUTER
    • 在计算机上保存资源的结构
    • US20080263560A1
    • 2008-10-23
    • US12165313
    • 2008-06-30
    • JUSTIN P. BANDHOLZRalph M. BegunAndrew S. HeinzmannFernando A. Lopez
    • JUSTIN P. BANDHOLZRalph M. BegunAndrew S. HeinzmannFernando A. Lopez
    • G06F9/50
    • G06F21/57G06F2221/2135
    • A design structure embodied in a machine readable storage medium for designing, manufacturing, and/or testing a design is for securing of leased resources on a computer. The design structure includes a computer for securing resources may comprise at least one processor, a plurality of resources, wherein each resource is associated with configuration data and a programmable logic device connected to each of the plurality of resources. The programmable logic device may be configured for determining whether a resource is leased, reading un-encoded configuration data from a resource, and sending the configuration data to a first unit, if the resource is not leased. The programmable logic device may further be configured for reading encoded configuration data from a resource, decoding the configuration data, sending the configuration data that was decoded to a first unit, and logging use of the resource by the first unit, if the resource is leased.
    • 体现在用于设计,制造和/或测试设计的机器可读存储介质中的设计结构用于确保计算机上的租用资源。 设计结构包括用于保护资源的计算机可以包括至少一个处理器,多个资源,其中每个资源与配置数据相关联,以及连接到多个资源中的每一个的可编程逻辑设备。 可编程逻辑设备可以被配置为用于确定资源是否租用,从资源读取未编码的配置数据,以及如果所述资源不被租用,则将所述配置数据发送到第一单元。 可编程逻辑设备还可以被配置为:如果资源被租赁,则从资源读取编码的配置数据,解码配置数据,将被解码的配置数据发送到第一单元,以及记录第一单元的资源的使用 。
    • 9. 发明授权
    • Structure for securing leased resources on a computer
    • 用于在计算机上确保租用资源的结构
    • US08028069B2
    • 2011-09-27
    • US12165313
    • 2008-06-30
    • Justin P. BandholzRalph M. BegunAndrew S. HeinzmannFernando A. Lopez
    • Justin P. BandholzRalph M. BegunAndrew S. HeinzmannFernando A. Lopez
    • G06F15/173
    • G06F21/57G06F2221/2135
    • A design structure embodied in a machine readable storage medium for designing, manufacturing, and/or testing a design is for securing of leased resources on a computer. The design structure includes a computer for securing resources may comprise at least one processor, a plurality of resources, wherein each resource is associated with configuration data and a programmable logic device connected to each of the plurality of resources. The programmable logic device may be configured for determining whether a resource is leased, reading un-encoded configuration data from a resource, and sending the configuration data to a first unit, if the resource is not leased. The programmable logic device may further be configured for reading encoded configuration data from a resource, decoding the configuration data, sending the configuration data that was decoded to a first unit, and logging use of the resource by the first unit, if the resource is leased.
    • 体现在用于设计,制造和/或测试设计的机器可读存储介质中的设计结构用于确保计算机上的租用资源。 设计结构包括用于保护资源的计算机可以包括至少一个处理器,多个资源,其中每个资源与配置数据相关联,以及连接到多个资源中的每一个的可编程逻辑设备。 可编程逻辑设备可以被配置为用于确定资源是否租用,从资源读取未编码的配置数据,以及如果所述资源不被租用,则将所述配置数据发送到第一单元。 可编程逻辑设备还可以被配置为:如果资源被租赁,则从资源读取编码的配置数据,解码配置数据,将被解码的配置数据发送到第一单元,以及记录第一单元的资源的使用 。
    • 10. 发明授权
    • System management architecture for multi-node computer system
    • 多节点计算机系统的系统管理架构
    • US07487222B2
    • 2009-02-03
    • US11092188
    • 2005-03-29
    • Ralph M. BegunAdam L. Soderlund
    • Ralph M. BegunAdam L. Soderlund
    • G06F15/173
    • G06F15/16
    • In a multi-node SMP system, at least one processor per node is enabled to execute the SMM task for the hardware resources that are local to that node. Additionally, each node is allocated its own local SMM code copy in its own SMM memory segment, to allow for improved access and a further reduction in internode traffic. In a preferred embodiment, only a signle processor per node is enabled to execute the SMM tasks, and specific SMM memory locations within the SMM memory segments are allocated and used to report status and results from each node. A root node SMM processor monitors the SMM status entries of the other nodes for completion. To further reduce run-time internode traffic, a per-node resource map is created to identify memory and I/O resources that are specific to a particular node. This per-node resource map is then stored locally within the SMM space on each node, respectively.
    • 在多节点SMP系统中,每个节点至少有一个处理器能够为该节点本地的硬件资源执行SMM任务。 另外,每个节点在其自己的SMM存储器段中分配其自己的本地SMM代码副本,以允许改进的访问和节点内流量的进一步减少。 在优选实施例中,仅每个节点的签名处理器能够执行SMM任务,并且分配SMM存储器段内的特定SMM存储器位置并用于报告来自每个节点的状态和结果。 根节点SMM处理器监视其他节点的SMM状态条目以完成。 为了进一步减少运行时节点间流量,创建了每节点资源映射,以识别特定于特定节点的内存和I / O资源。 然后将该每节点资源映射分别存储在每个节点上的SMM空间内。