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1. 发明公开

US20240077543A1 Battery Pack and Current Monitoring Method Thereof 审中-公开
公开(公告)号：US20240077543A1
公开(公告)日：2024-03-07
申请号：US18132427
申请日：2023-04-10
申请人： RICHTEK TECHNOLOGY CORP.
发明人： Hsu-Kai Hou , Po-Ching Lee , Tseng-Chuan Wu
IPC分类号： G01R31/3842 , H01M50/204
CPC分类号： G01R31/3842 , H01M50/204
摘要： A battery pack includes a group of cells, a current path switch coupled to the group of cells, and a current monitoring system. The current monitoring system includes a signal detection unit, a logic unit and a current path control unit. The signal detection unit is coupled to the group of cells and/or a positive terminal of the battery pack, and used to detect at least one voltage signal of the group of cells and/or of the positive terminal of the battery pack. The logic unit is coupled to the signal detection unit, and used to generate a calculated value of a voltage signal of the at least one voltage signal and generate a logic signal according to the calculated value. The current path control unit is coupled to the logic unit and the current path switch, and used to control the current path switch according to the logic signal.

2. 发明公开

US20230336074A1 POWER CONVERTER PREVENTING OVERVOLTAGE DAMAGE AND CONTROL METHOD THEREOF 审中-公开
公开(公告)号：US20230336074A1
公开(公告)日：2023-10-19
申请号：US18123961
申请日：2023-03-20
申请人： RICHTEK TECHNOLOGY CORP.
发明人： Kuo-Chi Liu , Ta-Yung Yang , Wei-Hsu Chang
IPC分类号： H02M1/00 , H02M3/07
CPC分类号： H02M3/07 , H02M1/0012
摘要： A power converter includes first to fourth switches, a flying capacitor, an inductor, an output capacitor and a control circuit. The first to fourth switches are sequentially coupled in cascode. The first switch is used to receive an input voltage. The flying capacitor is coupled across the second switch and the third switch, the inductor is coupled to the second switch, the third switch and the output capacitor. The output capacitor is used to output an output voltage. When the input voltage is less than an input voltage threshold, the control circuit is used to switch the first to fourth switches according to a resonant frequency. When the input voltage exceeds the input voltage threshold, the control circuit switch is used to the first to fourth switches according to a regulated frequency exceeding the resonant frequency.

3. 发明公开

US20230267090A1 CHARGING SYSTEM AND CONTROL METHOD THEREOF WHERE A SINK TERMINAL TRANSMITS A REQUEST MESSAGE TO A SOURCE TERMINAL WHILE THE SOURCE TERMINAL TRANSMITS A SOURCE MESSAGE 审中-公开
公开(公告)号：US20230267090A1
公开(公告)日：2023-08-24
申请号：US17867665
申请日：2022-07-18
申请人： RICHTEK TECHNOLOGY CORP.
发明人： Tzu-Hsuan Tseng , Tzu-Hsien Chuang , Sheng-Chun Lin , Hao-Chun Yang , Chien-Chih Huang , Heng-Min Chang , Tsung-Jung Wu , Yen-Tung Hung
IPC分类号： G06F13/40
CPC分类号： G06F13/4072 , G06F13/4022
摘要： A charging system includes a source terminal and a sink terminal. The control method of the charging system includes transmitting a bus voltage by the source terminal, determining whether the sink terminal has entered a sink attached state when the sink terminal receives the bus voltage, enabling a message transceiver of the sink terminal if the sink terminal has entered the sink attached state, transmitting a source message to the transceiver of the sink terminal by the source terminal, transmitting a request message to the source terminal by the message transceiver of the sink terminal while the source terminal transmits the source message, and continuing to enable a communication function for communicating with the sink terminal and continuing to transmit the bus voltage to the sink terminal by the source terminal when the source terminal receives the request message.

4. 发明授权

US11683025B1 Self-calibrating timing generator 有权
公开(公告)号：US11683025B1
公开(公告)日：2023-06-20
申请号：US17849747
申请日：2022-06-27
申请人： RICHTEK TECHNOLOGY CORP.
发明人： Yu-Hsuan Liu , Yung-Chun Chuang
IPC分类号： H03K3/00 , H03K3/017 , H03K5/24 , H03K3/037 , H03K19/20
CPC分类号： H03K3/017 , H03K3/037 , H03K5/24 , H03K19/20
摘要： A timing generator includes a first current source, a first switch, a second current source, a second switch, a third switch, a capacitor, a signal synthesizer, and a timing difference extractor. The first current source is for generating a first current according to the input voltage. The second current source is for generating a second current according to the input voltage. The first switch includes a control terminal for receiving a charging signal. The second switch includes a control terminal for receiving a timing difference signal. The third switch includes a control terminal for receiving a reset signal. The capacitor is coupled between a charging terminal and a ground terminal. The signal synthesizer is for generating a timing signal according to a charging voltage and a reference voltage. The timing difference extractor is for generating a timing difference signal according to the timing signal and a deformed timing signal.

5. 发明公开

US20230141723A1 High Resolution Dimmer Circuit 审中-公开
公开(公告)号：US20230141723A1
公开(公告)日：2023-05-11
申请号：US17973526
申请日：2022-10-25
申请人： RICHTEK TECHNOLOGY CORP.
发明人： Ching-Yi Chen , Hsing-Shen Huang
IPC分类号： H05B45/325 , H05B45/10
CPC分类号： H05B45/325 , H05B45/10
摘要： A dimmer circuit includes a light emitting module, a first current source, a digital-to-analog converter, a switch, a second current source and a pulse width modulation generator. The light emitting module is for emitting light according to a driving current. The first current source includes a first terminal coupled to a second terminal of the light emitting module. The digital-to-analog converter is for generating a DC voltage according to a DC dimming code signal to control the first current source. The switch includes a first terminal coupled to a second terminal of the light emitting module. The second current source includes a first terminal coupled to a second terminal of the switch. The PWM generator is for generating a PWM voltage according to the PWM dimming code signal to control the second current source.

6. 发明授权

US09858225B2 USB type-C cable and method for reading/writing a chip in a USB type-C cable 有权
公开(公告)号：US09858225B2
公开(公告)日：2018-01-02
申请号：US14978819
申请日：2015-12-22
申请人： Richtek Technology Corp.
发明人： Chien-Chih Huang , Chia-Hwa Chan , Tsung-Nan Wu
IPC分类号： G06K19/00 , G06F13/38 , G06F1/00 , G06F3/06 , G06F13/42
CPC分类号： G06F13/385 , G06F1/00 , G06F3/061 , G06F3/0659 , G06F3/0679 , G06F13/4282 , G06F2213/0042 , G06F2213/3804
摘要： A method for reading/writing a chip in a USB type-C cable comprises converting a read/write command into unstructured vendor defined message (UVDM) that is conforming to a USB power delivery specification. Such UVDM will be delivered to the chip via a type-C configuration channel interface. The chip analyzes the UVDM to acquire the read/write command and reads or modifies the content of a non-volatile memory in the chip according to the read/write command. Due to use of the type-C configuration channel interface, which is inherent in the USB type-C cable, to read/write the chip, it needs no extra interface which otherwise increases costs.

7. 发明申请

US20160259746A1 USB TYPE-C CABLE AND METHOD FOR READING/WRITING A CHIP IN A USB TYPE-C CABLE 审中-公开
公开(公告)号：US20160259746A1
公开(公告)日：2016-09-08
申请号：US15153443
申请日：2016-05-12
申请人： Richtek Technology Corp.
发明人： Chien-Chih HUANG , Chia-Hwa CHAN , Tsung-Nan WU
IPC分类号： G06F13/38 , G06F3/06 , G06F13/42
CPC分类号： G06F13/385 , G06F1/00 , G06F3/061 , G06F3/0659 , G06F3/0679 , G06F13/4282 , G06F2213/0042 , G06F2213/3804
摘要： A method for reading/writing a chip in a USB type-C cable comprises converting a read/write command into unstructured vendor defined message (UVDM) that is conforming to a USB power delivery specification. Such UVDM will be delivered to the chip via a type-C configuration channel interface. The chip analyzes the UVDM to acquire the read/write command and reads or modifies the content of a non-volatile memory in the chip according to the read/write command. Due to use of the type-C configuration channel interface, which is inherent in the USB type-C cable, to read/write the chip, it needs no extra interface which otherwise increases costs.

8. 发明申请

US20160217307A1 USB TYPE-C CABLE AND METHOD FOR READING/WRITING A CHIP IN A USB TYPE-C CABLE 有权
标题翻译： USB TYPE-C电缆和用于在USB TYPE-C电缆中读取/写入芯片的方法
公开(公告)号：US20160217307A1
公开(公告)日：2016-07-28
申请号：US14978819
申请日：2015-12-22
申请人： Richtek Technology Corp.
发明人： Chien-Chih HUANG , Chia-Hwa CHAN , Tsung-Nan WU
IPC分类号： G06K7/00
CPC分类号： G06F13/385 , G06F1/00 , G06F3/061 , G06F3/0659 , G06F3/0679 , G06F13/4282 , G06F2213/0042 , G06F2213/3804
摘要： A method for reading/writing a chip in a USB type-C cable comprises converting a read/write command into unstructured vendor defined message (UVDM) that is conforming to a USB power delivery specification. Such UVDM will be delivered to the chip via a type-C configuration channel interface. The chip analyzes the UVDM to acquire the read/write command and reads or modifies the content of a non-volatile memory in the chip according to the read/write command. Due to use of the type-C configuration channel interface, which is inherent in the USB type-C cable, to read/write the chip, it needs no extra interface which otherwise increases costs.
摘要翻译：用于在USB C型电缆中读取/写入芯片的方法包括将读/写命令转换成符合USB功率传递规范的非结构化供应商定义消息（UVDM）。这样的UVDM将通过C类配置通道接口传送到芯片。该芯片分析UVDM以获取读/写命令，并根据读/写命令读取或修改芯片中的非易失性存储器的内容。由于使用USB C型电缆固有的C型配置通道接口来读/写芯片，因此不需要额外的接口，否则会增加成本。

9. 发明申请

US20160079443A1 JUNCTION BARRIER SCHOTTKY DIODE 审中-公开
标题翻译： JUNCTION BARRIER肖特基二极管
公开(公告)号：US20160079443A1
公开(公告)日：2016-03-17
申请号：US14526843
申请日：2014-10-29
申请人： RICHTEK TECHNOLOGY CORP
发明人： Chung-Yu Hung , Ching-Yao Yang , Tzu-Cheng Kao , Tsung-Yi Huang , Wu-Te Weng
IPC分类号： H01L29/872 , H01L27/02
CPC分类号： H01L29/872 , H01L27/0248 , H01L29/0619 , H01L29/0646
摘要： A JBS diode includes a silicon substrate, a first P doped region, a metal layer, a second P doped region, and a first N doped region. The silicon substrate includes an upper surface. An NBL is provided in the bottom of the silicon substrate. An N well is provided between the upper surface and the NBL. The first P doped region is arranged in the N well, and extending downward from the upper surface. The metal layer covers the upper surface, and located on a side of the first P doped region. The second P doped region is arranged in the N well, extending downward from the upper surface, and located at the other side of the first P doped region. The first N doped region is arranged in the N well, extending downward from the upper surface, and located at the other side of the first P doped region.
摘要翻译： JBS二极管包括硅衬底，第一P掺杂区，金属层，第二P掺杂区和第一N掺杂区。硅衬底包括上表面。在硅衬底的底部提供NBL。在上表面和NBL之间设有一个N孔。第一P掺杂区域布置在N阱中，并从上表面向下延伸。金属层覆盖上表面，并且位于第一P掺杂区域的一侧。第二P掺杂区域布置在N阱中，从上表面向下延伸，并且位于第一P掺杂区域的另一侧。第一N掺杂区域布置在N阱中，从上表面向下延伸，并且位于第一P掺杂区域的另一侧。

10. 发明授权

US09276473B1 Voltage converting controller and method of voltage converting control 有权
标题翻译：电压转换控制器和电压转换控制方法
公开(公告)号：US09276473B1
公开(公告)日：2016-03-01
申请号：US14591250
申请日：2015-01-07
申请人： RICHTEK TECHNOLOGY CORP
发明人： An-Tung Chen , Li-Wen Fang , Chih-Hao Yang , Yu-Chiao Hsieh
IPC分类号： G05F1/00 , H02M3/158
CPC分类号： H02M3/158 , H02M3/156 , H02M3/1588 , H02M2001/0022 , Y02B70/1466
摘要： A voltage converting controller is applied to a switching voltage converting circuit, in which the voltage converting controller periodically operates a high-side power switch and a low-side power switch in the switching voltage converting circuit with a high-side control signal and a low-side control signal, respectively, so as to convert an input voltage into an output voltage via an inductor. Defining an ideal duty cycle as the rating value of the output voltage divided by the value of the input voltage, when the ideal duty cycle is less than one threshold duty cycle, then the period of the high-side control signal is a constant; and when the ideal duty cycle is greater than the threshold duty cycle, the period of the high-side control signal and the period of the ideal duty cycle are positively correlated.
摘要翻译：电压转换控制器被应用于开关电压转换电路，其中电压转换控制器周期性地操作具有高侧控制信号和低电平的开关电压转换电路中的高侧电源开关和低侧电源开关控制信号，以便通过电感将输入电压转换为输出电压。将理想的占空比定义为输出电压的额定值除以输入电压的值，当理想占空比小于一个阈值占空比时，则高边控制信号的周期为常数; 并且当理想占空比大于阈值占空比时，高侧控制信号的周期和理想占空比的周期是正相关的。

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