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    • 3. 发明授权
    • Level shifter
    • 电平移位器
    • US06271707B1
    • 2001-08-07
    • US09515005
    • 2000-02-29
    • Quang C. LeCharles H. Matsumoto
    • Quang C. LeCharles H. Matsumoto
    • H03L500
    • H03K19/017518
    • A level shifter for use in an integrated circuit that translates a binary input signal having a low voltage level to a binary output signal having a different voltage level. The level shifter (10) includes an input stage (20) that receives the input signal and provides control signals to a low state voltage translation circuit (30) and a high state voltage translation circuit (40). The low state voltage translation circuit (30) controls the level shifter (10) when the input signal is low and provides a bias signal to a bipolar device (Q2) adapted to pull the external output signal low. The high state voltage translation circuit (40) controls the level shifter (10) when the input signal is high and includes a voltage reducing circuit (44) operating as a current mirror with a pull-up PMOS transistor (P13) to couple an internal high voltage power supply to the output node (Vout).
    • 一种用于集成电路的电平移位器,其将具有低电压电平的二进制输入信号转换为具有不同电压电平的二进制输出信号。 电平移位器(10)包括输入级(20),其接收输入信号并向低态电压转换电路(30)和高状态电压转换电路(40)提供控制信号。 当输入信号为低电平时,低态电压转换电路(30)控制电平移位器(10),并向适于将外部输出信号拉低的双极器件(Q2)提供偏置信号。 当输入信号为高电平时,高状态电压转换电路(40)控制电平移位器(10),并包括用上拉PMOS晶体管(P13)作为电流镜工作的电压降低电路(44) 输出节点(Vout)的高压电源。