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1. 发明授权

US5699542A Address space manipulation in a processor 失效
标题翻译：处理器中的地址空间处理
公开(公告)号：US5699542A
公开(公告)日：1997-12-16
申请号：US316390
申请日：1994-09-30
申请人： Pranav Mehta , Lionel Smith , Robert Wickersheim , Nicholas Ong
发明人： Pranav Mehta , Lionel Smith , Robert Wickersheim , Nicholas Ong
IPC分类号： G06F12/06 , G06F12/00 , G06F12/02 , G06F12/10
CPC分类号： G06F12/0623
摘要： A method and apparatus for configuring the address space of a computer is described. According to the present invention, a computer system has a full address space and includes at least one base unit, at least one expansion unit and a microprocessor core. The microprocessor core issues access addresses. The full address space includes a base address space and an expanded address space. The base address space is addressed by an M bit address and the expanded address space is addressed by an N bit address (N.gtoreq.M). Each base unit is mapped to an address within the base address space, and the base unit address is mirrored in the expanded address space. Each expansion unit is mapped to an address within the expanded address space. An address configuration circuit in the computer system includes an address space remapping circuit for selectively remapping or not remapping base units out of the base address space. The address configuration circuit also includes an expanded space enabling circuit for selectively enabling or disabling the expanded address space. Expansion units are accessible in the expanded address space depending upon whether the expanded address space has been enabled.
摘要翻译：描述了用于配置计算机的地址空间的方法和装置。根据本发明，计算机系统具有完整的地址空间，并且包括至少一个基本单元，至少一个扩展单元和微处理器核。微处理器核心发出访问地址。完整的地址空间包括基地址空间和扩展的地址空间。基地址空间由M位地址寻址，扩展的地址空间由N位地址（N> / = M）寻址。每个基本单元被映射到基地址空间内的地址，并且基本单元地址被镜像在扩展的地址空间中。每个扩展单元映射到扩展地址空间内的一个地址。计算机系统中的地址配置电路包括地址空间重新映射电路，用于选择性地将基本单元重新映射到基地址空间之外。地址配置电路还包括扩展空间使能电路，用于选择性地启用或禁用扩展的地址空间。扩展单元可以在扩展的地址空间中访问，具体取决于扩展的地址空间是否已启用。

2. 发明授权

US08065438B2 Modification to AS—path elements 有权
标题翻译：修改AS路径元素
公开(公告)号：US08065438B2
公开(公告)日：2011-11-22
申请号：US11559581
申请日：2006-11-14
申请人： Pranav Mehta , Pradosh Mohapatra , Robert Rszuk
发明人： Pranav Mehta , Pradosh Mohapatra , Robert Rszuk
IPC分类号： G06H15/16 , H04L12/28
CPC分类号： H04L63/0272 , H04L45/04 , H04L45/18
摘要： In one or more embodiments, an architecture is provided that may intercept a route update message and compare AS numbers of an AS path with a list of AS numbers known or inferred to be problematic. In one or more embodiments, the problematic AS numbers can be substituted with a local AS number such that loop detection checks enforced automatically on many networks do not discard the message and/or prevent connectivity between two disparate networks.
摘要翻译：在一个或多个实施例中，提供了可以拦截路由更新消息并将AS路径的AS号与已知或推断为有问题的AS号的列表进行比较的体系结构。在一个或多个实施例中，有问题的AS号可以用本地AS号代替，使得在许多网络上自动执行的环路检测检查不丢弃该消息和/或防止两个不同网络之间的连接。

3. 发明授权

US06401208B2 Method for BIOS authentication prior to BIOS execution 失效
标题翻译： BIOS执行BIOS验证方法
公开(公告)号：US06401208B2
公开(公告)日：2002-06-04
申请号：US09118147
申请日：1998-07-17
申请人： Derek L. Davis , Pranav Mehta
发明人： Derek L. Davis , Pranav Mehta
IPC分类号： H04L932
CPC分类号： G06F21/88 , G06F9/4401 , G06F21/575
摘要： A cryptographic device is implemented in communication with a host processor to prevent the host processor from performing a standard boot-up procedure until a basic input output system (BIOS) code is authenticated. This is accomplished by a cryptographic device which is addressed by the host processor during execution of a first instruction following a power-up reset. The cryptographic device includes a first integrated circuit (IC) device and a second IC device. The first IC device includes a memory to contain firmware and a root certification key. The second IC device includes logic circuitry to execute a software code to authenticate the BIOS code before permitting execution of the BIOS code by the host processor.
摘要翻译：实现与主处理器通信的加密设备，以防止主机处理器执行标准启动过程，直到基本输入输出系统（BIOS）代码被认证为止。这是通过在上电复位之后在执行第一指令期间由主处理器寻址的加密设备来实现的。密码装置包括第一集成电路（IC）装置和第二IC装置。第一IC设备包括用于包含固件和根认证密钥的存储器。第二IC器件包括逻辑电路，用于在允许由主处理器执行BIOS代码之前执行软件代码来验证BIOS代码。

4. 发明授权

US06463494B1 Method and system for implementing control signals on a low pin count bus 有权
标题翻译：在低引脚数总线上实现控制信号的方法和系统
公开(公告)号：US06463494B1
公开(公告)日：2002-10-08
申请号：US09223302
申请日：1998-12-30
申请人： Jeff Morriss , Pranav Mehta , Narayanan Iyer , Robert Greiner , Peter J. Ruscito , Shreekant Thakkar
发明人： Jeff Morriss , Pranav Mehta , Narayanan Iyer , Robert Greiner , Peter J. Ruscito , Shreekant Thakkar
IPC分类号： G06F1314
CPC分类号： G06F13/423
摘要： A method and system are disclosed allowing devices to communicate using a highly efficient low pin count bus comprising a set of data lines, a strobe line, and one control line. Command information is transmitted simultaneously with data, the command information being defined by its timing.
摘要翻译：公开了一种方法和系统，允许设备使用包括一组数据线，选通线和一个控制线的高效低引脚数总线进行通信。命令信息与数据同时发送，命令信息由其定时定义。

5. 发明申请

US20080112418A1 MODIFICATION TO AS_PATH ELEMENTS 有权
标题翻译：修改为AS_PATH元素
公开(公告)号：US20080112418A1
公开(公告)日：2008-05-15
申请号：US11559581
申请日：2006-11-14
申请人： Pranav Mehta , Pradosh Mohapatra , Robert Raszuk
发明人： Pranav Mehta , Pradosh Mohapatra , Robert Raszuk
IPC分类号： H04L12/66
CPC分类号： H04L63/0272 , H04L45/04 , H04L45/18
摘要： In one or more embodiments, an architecture is provided that may intercept a route update message and compare AS numbers of an AS path with a list of AS numbers known or inferred to be problematic. In one or more embodiments, the problematic AS numbers can be substituted with a local AS number such that loop detection checks enforced automatically on many networks do not discard the message and/or prevent connectivity between two disparate networks.
摘要翻译：在一个或多个实施例中，提供了可以拦截路由更新消息并将AS路径的AS号与已知或推断为有问题的AS号的列表进行比较的体系结构。在一个或多个实施例中，有问题的AS号可以用本地AS号代替，使得在许多网络上自动执行的环路检测检查不丢弃该消息和/或防止两个不同网络之间的连接。

6. 发明授权

US07710899B1 System and method for speeding border gateway protocol graceful restart 有权
标题翻译：边界网关协议超速重启的系统和方法
公开(公告)号：US07710899B1
公开(公告)日：2010-05-04
申请号：US11205977
申请日：2005-08-16
申请人： David D. Ward , John Galen Scudder , Pranav Mehta
发明人： David D. Ward , John Galen Scudder , Pranav Mehta
IPC分类号： H04L12/28
CPC分类号： H04L45/28 , H04L45/02 , H04L45/04 , H04L45/60
摘要： A technique is provided for graceful restart of a Border Gateway Protocol (BGP) router that uses a local store on the restarting router that stores prefixes on all routes or the “group best path” information on all BGP peers having a common Autonomous System (AS) number. This local store is used to run best path computations on the restarting router, rather than first awaiting receipt of route information from peers to speed the restart process. Updates are then transmitted to peers using the best path data and an end-of-Routing Information Base (RIB) message it transmitted by the restarting router to indicate that all information has now been sent by the restarting router. Thereafter the restarting router processes incoming updates from peers as received (or these peers routes are timed-out), remaining stale paths are deleted and any changed best paths, based upon the newly received updates, are then transmitted to peers.
摘要翻译：提供了一种技术，用于平滑重启边界网关协议（BGP）路由器，该边界网关协议（BGP）路由器使用重新启动的路由器上存储前缀的所有路由上的本地存储或具有共同自治系统（AS）的所有BGP对等体上的“组最佳路径”信息）号码。该本地存储用于在重新启动的路由器上运行最佳路径计算，而不是首先等待从对等体接收路由信息以加速重新启动过程。然后使用最佳路径数据和由重新启动的路由器发送的路由信息库（RIB）消息的结尾将更新发送到对等体，以指示所有信息现在已由重新启动的路由器发送。此后，重新启动的路由器处理来自已接收的对等端的进入的更新（或者这些对等体路由被超时），剩余的旧路径被删除，并且基于新接收的更新的任何改变的最佳路径被发送到对等体。

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