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1. 发明授权

US5889677A Circuit designing apparatus of an interactive type 失效
标题翻译：交互式电路设计装置
公开(公告)号：US5889677A
公开(公告)日：1999-03-30
申请号：US574901
申请日：1995-12-19
申请人： Mitsuru Yasuda , Hiroyuki Sugiyama , Noriyuki Ito , Ryoichi Yamashita , Tadashi Konno , Yasunori Abe , Naomi Bizen , Terunobu Maruyama , Yoshiyuki Kato , Tomoyuki Isomura , Hiroshi Ikeda , Miki Takagi
发明人： Mitsuru Yasuda , Hiroyuki Sugiyama , Noriyuki Ito , Ryoichi Yamashita , Tadashi Konno , Yasunori Abe , Naomi Bizen , Terunobu Maruyama , Yoshiyuki Kato , Tomoyuki Isomura , Hiroshi Ikeda , Miki Takagi
IPC分类号： G06F17/50
CPC分类号： G06F17/5022
摘要： A circuit designing apparatus of an interactive type which enables a simplified and high-speed circuit design process while largely reducing a burden on a designer, having a speed analyzing unit for conducting a delay computation for each wiring path on a circuit to be designed and a display control unit for displaying a result of the delay computation by the speed analyzing unit on a display unit. When the speed analyzing unit conducts a delay computation, a delay value of each logic component forming the circuit that is an object of the design is set and altered according to a dullness of a signal waveform inputted to the logic component. The circuit designing apparatus of an interactive type may be applied to a system for conducting a circuit design of an integrated circuit such as an LSI or the like or a printed circuit board.
摘要翻译：一种交互式的电路设计装置，其能够实现简化和高速电路设计过程，同时大大减轻设计者的负担，具有速度分析单元，用于对要设计的电路上的每个布线路径执行延迟计算，以及显示控制单元，用于在显示单元上显示速度分析单元的延迟计算结果。当速度分析单元进行延迟计算时，根据输入到逻辑部件的信号波形的钝度来设定和改变形成作为设计对象的电路的每个逻辑部件的延迟值。交互式的电路设计装置可以应用于用于进行诸如LSI等的集成电路的电路设计的系统或印刷电路板。

2. 发明授权

US06560763B1 Route searching method and storage medium 失效
标题翻译：路由搜索方法和存储介质
公开(公告)号：US06560763B1
公开(公告)日：2003-05-06
申请号：US09637642
申请日：2000-08-14
申请人： Hiroyuki Sugiyama , Yasunori Abe , Naomi Bizen , Hiroshi Ikeda
发明人： Hiroyuki Sugiyama , Yasunori Abe , Naomi Bizen , Hiroshi Ikeda
IPC分类号： G06F1750
CPC分类号： G06F17/5077
摘要： A route searching method is used for circuit design, and includes a step of setting, with respect to each pin, a corresponding flag of a pass flag which indicates that a pin is passed, a searching flag which indicates that a pin is being searched, and a branch flag which indicates that a pin is a branch point, and a step of determining a direction of a route search depending on each flag which is set with respect to each pin.
摘要翻译：路径搜索方法用于电路设计，并且包括针对每个引脚设置指示引脚通过的通过标志的相应标志的步骤，指示正在搜索引脚的搜索标志，以及分支标志，其指示引脚是分支点，以及根据针对每个引脚设置的每个标志来确定路线搜索的方向的步骤。

3. 发明授权

US06308305B1 Method and apparatus for circuit designing of an LSI circuit without error paths 失效
标题翻译：没有错误路径的LSI电路的电路设计方法和装置
公开(公告)号：US06308305B1
公开(公告)日：2001-10-23
申请号：US08874506
申请日：1997-06-13
申请人： Hiroyuki Sugiyama , Yasunori Abe , Naomi Bizen
发明人： Hiroyuki Sugiyama , Yasunori Abe , Naomi Bizen
IPC分类号： G06F1750
CPC分类号： G06F17/5031 , G06F17/5068
摘要： There are disclosed a method and an apparatus for circuit designing, which enable arranging and wiring operations to be efficiently performed by using indices for arranging and wiring without the occurrence of any error paths. In the method and apparatus for circuit designing, path tracing is performed from one or more tracing start pins for a result of logical designing and the number of passing through each pin of cells to be arranged is counted during the path tracing. Thus, the method and apparatus for circuit designing are suitably used for designing of a circuit such as a LSI or the like, which has been enlarged in size and complex following an advance in a micro fabrication art.
摘要翻译：公开了一种用于电路设计的方法和装置，其能够通过使用用于布置和布线的索引来有效地执行排列和布线操作，而不发生任何错误路径。在用于电路设计的方法和装置中，对于逻辑设计的结果，从一个或多个跟踪起始引脚执行路径跟踪，并且在路径跟踪期间对要布置的单元的每个引脚的数量进行计数。因此，用于电路设计的方法和装置适合用于诸如LSI等的电路的设计，其尺寸和复杂性随着微加工领域的进步而扩大。

4. 发明授权

US06240541B1 Interactive circuit designing apparatus which displays a result of component placement and wire routing from a layout design unit 有权
标题翻译：交互式电路设计装置，其从布局设计单元显示组件放置和线路布线的结果
公开(公告)号：US06240541B1
公开(公告)日：2001-05-29
申请号：US09227967
申请日：1999-01-11
申请人： Mitsuru Yasuda , Hiroyuki Sugiyama , Noriyuki Ito , Ryoichi Yamashita , Tadashi Konno , Yasunori Abe , Naomi Bizen , Terunobu Maruyama , Yoshiyuki Kato , Tomoyuki Isomura , Hiroshi Ikeda , Miki Takagi
发明人： Mitsuru Yasuda , Hiroyuki Sugiyama , Noriyuki Ito , Ryoichi Yamashita , Tadashi Konno , Yasunori Abe , Naomi Bizen , Terunobu Maruyama , Yoshiyuki Kato , Tomoyuki Isomura , Hiroshi Ikeda , Miki Takagi
IPC分类号： G06F1750
CPC分类号： G06F17/5022
摘要： A circuit designing apparatus of an interactive type which enables a simplified and highspeed circuit design process while largely reducing a burden on a designer, having a speed analyzing unit for conducting a delay computation for each wiring path on a circuit to be designed and a display control unit for displaying a result of the delay computation by the speed analyzing unit on a display unit. When the speed analyzing unit conducts a delay computation, a delay value of each logic component forming the circuit that is an object of the design is set and altered according to a dullness of a signal waveform inputted to the logic component. The circuit designing apparatus of an interactive type may be applied to a system for conducting a circuit design of an integrated circuit such as an LSI or the like or a printed circuit board.
摘要翻译：一种交互式的电路设计装置，其能够实现简化和高速电路设计过程，同时大大减轻设计者的负担，具有用于对要设计的电路上的每个布线路径进行延迟计算的速度分析单元和显示控制单元，用于在显示单元上显示速度分析单元的延迟计算结果。当速度分析单元进行延迟计算时，根据输入到逻辑部件的信号波形的钝度来设定和改变形成作为设计对象的电路的每个逻辑部件的延迟值。交互式的电路设计装置可以应用于用于进行诸如LSI等的集成电路的电路设计的系统或印刷电路板。

5. 发明授权

US07073153B2 Route searching method and storage medium thereof 有权
标题翻译：路由搜索方法及其存储介质
公开(公告)号：US07073153B2
公开(公告)日：2006-07-04
申请号：US09982840
申请日：2001-10-22
申请人： Hiroshi Ikeda , Naomi Bizen
发明人： Hiroshi Ikeda , Naomi Bizen
IPC分类号： G06F17/50
CPC分类号： G06F17/5077 , G06F17/5022
摘要： A route of a signal from a starting point pin to an end point pin is searched for in an electronic circuit designed by combining cells which are basic devices entered for use in a designing process. At this time, one or more conditions satisfied by a route to be distinguished from other routes from the starting point pin to the end point pin are set. A route can be distinguished from others depending on whether or not the route satisfies the set condition, and a search for a route from the starting point pin to the end point pin is carried out on each route to be distinguished from others by a condition.
摘要翻译：在通过组合作为在设计过程中使用的基本装置的单元而设计的电子电路中搜索从起点针到终点针的信号的路线。此时，设定通过与从起点针到终点针的其他路线区别的路线所满足的一个或多个条件。可以根据路径是否满足设定条件来区分路线，并且通过条件在每个路线上执行从起点针到终点针的路线的搜索，以区别于其他路线。

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