专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US09082924B2 Method for preparing an N+PP+ or P+NN+ structure on silicon wafers 有权
标题翻译：在硅晶片上制备N + PP +或P + NN +结构的方法
公开(公告)号：US09082924B2
公开(公告)日：2015-07-14
申请号：US13643641
申请日：2011-04-26
申请人： Barbara Bazer-Bachi , Mustapha Lemiti , Nam Le Quang , Yvon Pellegrin
发明人： Barbara Bazer-Bachi , Mustapha Lemiti , Nam Le Quang , Yvon Pellegrin
IPC分类号： H01L21/00 , H01L21/22 , H01L21/38 , H01L31/18 , H01L21/225 , H01L31/0224 , H01L31/068 , H01L29/12 , H01L31/0232
CPC分类号： H01L31/18 , H01L21/225 , H01L21/2255 , H01L29/12 , H01L31/022425 , H01L31/02327 , H01L31/068 , H01L31/1804 , Y02E10/547 , Y02P70/521
摘要： The present invention relates to a method for preparing, on a silicon wafer, an n+pp+ or p+nn+ structure which includes the following consecutive steps: a) on a p or n silicon wafer (1), which includes a front surface (8) and a rear surface (9), a layer of boron-doped silicon oxide (BSG) (2) is formed on the rear surface (9) by PECVD, followed by a SiOx diffusion barrier (3); b) a source of phosphorus is diffused such that the phosphorus and the boron co-diffuse and in order also to form: on the front surface (8) of the wafer obtained at the end of step a), a layer of phosphorus-doped silicon oxide (PSG) (4) and an n+ doped area (5); and on the rear surface of the wafer obtained at the end of step a), a boron-rich area (BRL) (6), as well as a p+ doped area (7); c) the layers of BSG (2) and PSG (4) oxides and SiOx (3) are removed, the BRL (6) is oxidized and the layer resulting from said oxidation is removed. The invention also relates to a silicon wafer having an n+pp+ or p+nn+ structure, which can be obtained by said preparation method, as well as to a photovoltaic panel manufactured from such a silicon wafer.
摘要翻译：本发明涉及一种在硅晶片上制备n + pp +或p + nn +结构的方法，其包括以下连续步骤：a）在一个或多个硅晶片（1）上，其包括前表面（8））和后表面（9），通过PECVD在后表面（9）上形成硼掺杂氧化硅层（BSG）（2），随后是SiO x扩散阻挡层（3）; b）磷源扩散，使得磷和硼共扩散，并且还可以在步骤a）末端获得的晶片的前表面（8）上形成磷掺杂层氧化硅（PSG）（4）和n +掺杂区域（5）; 并且在步骤a）结束时获得的晶片的背面，富硼区（BRL）（6）以及p +掺杂区（7）上; c）除去BSG（2）和PSG（4）氧化物和SiO x（3）的层，BRL（6）被氧化，并且除去由所述氧化产生的层。本发明还涉及可以通过所述制备方法获得的具有n + pp +或p + nn +结构的硅晶片以及由这种硅晶片制造的光伏面板。

2. 发明申请

US20130112260A1 METHOD FOR PREPARING AN N+PP+ OR P+NN+ STRUCTURE ON SILICON WAFERS 有权
标题翻译：用于制备N + PP +或P + NN +硅基结构的方法
公开(公告)号：US20130112260A1
公开(公告)日：2013-05-09
申请号：US13643641
申请日：2011-04-26
申请人： Barbara Bazer-Bachi , Mustapha Lemiti , Nam Le Quang , Yvon Pellegrin
发明人： Barbara Bazer-Bachi , Mustapha Lemiti , Nam Le Quang , Yvon Pellegrin
IPC分类号： H01L31/18 , H01L29/12 , H01L31/0232 , H01L21/225
CPC分类号： H01L31/18 , H01L21/225 , H01L21/2255 , H01L29/12 , H01L31/022425 , H01L31/02327 , H01L31/068 , H01L31/1804 , Y02E10/547 , Y02P70/521
摘要： The present invention relates to a method for preparing, on a silicon wafer, an n+pp+ or p+nn+ structure which includes the following consecutive steps: a) on a p or n silicon wafer (1), which includes a front surface (8) and a rear surface (9), a layer of boron-doped silicon oxide (BSG) (2) is formed on the rear surface (9) by PECVD, followed by a SiOx diffusion barrier (3); b) a source of phosphorus is diffused such that the phosphorus and the boron co-diffuse and in order also to form: on the front surface (8) of the wafer obtained at the end of step a), a layer of phosphorus-doped silicon oxide (PSG) (4) and an n+ doped area (5); and on the rear surface of the wafer obtained at the end of step a), a boron-rich area (BRL) (6), as well as a p+ doped area (7); c) the layers of BSG (2) and PSG (4) oxides and SiOx (3) are removed, the BRL (6) is oxidised and the layer resulting from said oxidation is removed. The invention also relates to a silicon wafer having an n+pp+ or p+nn+ structure, which can be obtained by said preparation method, as well as to a photovoltaic panel manufactured from such a silicon wafer.
摘要翻译：本发明涉及一种在硅晶片上制备n + pp +或p + nn +结构的方法，其包括以下连续步骤：a）在一个或多个硅晶片（1）上，其包括前表面（8））和后表面（9），通过PECVD在后表面（9）上形成硼掺杂氧化硅层（BSG）（2），随后是SiO x扩散阻挡层（3）; b）磷源扩散，使得磷和硼共扩散，并且还可以在步骤a）末端获得的晶片的前表面（8）上形成磷掺杂层氧化硅（PSG）（4）和n +掺杂区域（5）; 并且在步骤a）结束时获得的晶片的背面，富硼区（BRL）（6）以及p +掺杂区（7）上; c）除去BSG（2）和PSG（4）氧化物和SiO x（3）的层，将BRL（6）氧化并除去由所述氧化产生的层。本发明还涉及可以通过所述制备方法获得的具有n + pp +或p + nn +结构的硅晶片以及由这种硅晶片制造的光伏面板。

3. 发明申请

US20060054210A1 Photovoltaic module with an electronic device in the laminated stack 审中-公开
标题翻译：具有层叠堆叠中的电子器件的光伏模块
公开(公告)号：US20060054210A1
公开(公告)日：2006-03-16
申请号：US11010319
申请日：2004-12-14
申请人： Bernard Proisy , Christophe Dugue , Michel Laporte , Nam Le Quang
发明人： Bernard Proisy , Christophe Dugue , Michel Laporte , Nam Le Quang
IPC分类号： H01L25/00
CPC分类号： H01L31/0443 , H01L31/048 , H01L2924/0002 , Y02E10/50 , H01L2924/00
摘要： A photovoltaic module including one or more photovoltaic cells connected in series and located inside a laminated stack of glass and polymer, together with an electronic protection device, e.g. a bypass diode, which is arranged to bypass the electric current passing through at least one photovoltaic cell. The electronic protection device, which is a semiconductor circuit, is itself disposed inside the laminated stack. The semiconductor circuit is electrically connected to at least one flat metal ribbon disposed in the laminated stack for the purpose of dissipating the heat energy given off by the semiconductor circuit.
摘要翻译：包括一个或多个串联连接并位于玻璃和聚合物层叠叠层内的光伏电池的光电模块，以及电子保护装置，例如电子保护装置。旁路二极管，其布置成绕过通过至少一个光伏电池的电流。作为半导体电路的电子保护装置本身设置在层叠叠层内。半导体电路与设置在叠层叠层中的至少一个平的金属带电连接，以消散由半导体电路发出的热能。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式