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1. 发明授权

US10095557B2 System and method to provide single thread access to a specific memory region 有权
公开(公告)号：US10095557B2
公开(公告)日：2018-10-09
申请号：US13537378
申请日：2012-06-29
申请人： Nicholas J. Adams
发明人： Nicholas J. Adams
IPC分类号： G06F9/44 , G06F9/52
摘要： Processing logic and a method to provide single thread access to a specific memory region without suspending processing activity for all other cores and/or threads within or in association with a processor, computer system, or other processing apparatus. Single thread access may be provided through implementation of microcode which may control thread access to model specific registers (“MSRs”) within a processor. One MSR may provide a mutex, which a single thread may claim, and another MSR may provide a range of memory locations, which may be accessed by the thread that has claimed the mutex.

2. 发明申请

US20170075682A1 POWER MANAGEMENT DATA PACKAGE PROVISION METHOD AND APPARATUS 审中-公开
标题翻译：电源管理数据包提供方法和设备
公开(公告)号：US20170075682A1
公开(公告)日：2017-03-16
申请号：US14850733
申请日：2015-09-10
申请人： Krishnakumar Narasimhan , Nicholas J. Adams
发明人： Krishnakumar Narasimhan , Nicholas J. Adams
IPC分类号： G06F9/445
CPC分类号： G06F8/654
摘要： Apparatuses, methods and storage medium associated with provision of power management data packages are disclosed herein. In embodiments, an apparatus may include one or more processors, memory to store a power management data package having a first plurality of descriptions of always present fixed platform devices and a second plurality of descriptions of potentially present variable platform devices; and firmware coupled with the one or more processors and memory to provide basic input/output services to an operating system operated by the one or more processors, wherein the operating system has an operational requirement for the power management data package. The basic input/output services may include a service to modify the power management data package to bring the power management data package into compliance with the operational requirement of the operating system. Other embodiments may be described and/or claimed.
摘要翻译：本文公开了与提供电源管理数据包相关联的装置，方法和存储介质。在实施例中，设备可以包括一个或多个处理器，用于存储具有总是存在的固定平台设备的第一多个描述的功率管理数据包的存储器和潜在的当前可变平台设备的第二多个描述; 以及与所述一个或多个处理器和存储器耦合的固件，以向由所述一个或多个处理器操作的操作系统提供基本输入/输出服务，其中所述操作系统具有对所述电力管理数据包的操作要求。基本输入/输出服务可以包括修改电源管理数据包以使电源管理数据包符合操作系统的操作要求的服务。可以描述和/或要求保护其他实施例。

3. 发明申请

US20160283238A1 SYSTEM MANAGEMENT MODE TRUST ESTABLISHMENT FOR OS LEVEL DRIVERS 有权
标题翻译：操作系统级驱动程序的系统管理模式信任建立
公开(公告)号：US20160283238A1
公开(公告)日：2016-09-29
申请号：US14666219
申请日：2015-03-23
申请人： NICHOLAS J. ADAMS , VINCENT J. ZIMMER , LEE G. ROSENBAUM , GIRI P. MUDUSURU
发明人： NICHOLAS J. ADAMS , VINCENT J. ZIMMER , LEE G. ROSENBAUM , GIRI P. MUDUSURU
IPC分类号： G06F9/30 , G06F9/34
CPC分类号： G06F9/30189 , G06F9/34 , G06F21/44 , G06F21/57 , G06F21/74
摘要： Various embodiments are generally directed to establishing trust in system management mode. An operating system management mode driver can invoke a system management mode and provide a signature to the system management mode to authenticate the driver with. Additionally, a hash value of the driver can be used to determine whether the driver is authorized to invoke system management mode or particular operations or features of system management mode.
摘要翻译：各种实施例通常涉及在系统管理模式下建立信任。操作系统管理模式驱动程序可以调用系统管理模式，并向系统管理模式提供签名以对驱动程序进行认证。另外，可以使用驱动程序的散列值来确定驱动程序是否被授权调用系统管理模式或系统管理模式的特定操作或特征。

4. 发明申请

US20150095633A1 TRUSTED BOOT AND RUNTIME OPERATION 有权
标题翻译： TRUSTED BOOT和RUNTIME操作
公开(公告)号：US20150095633A1
公开(公告)日：2015-04-02
申请号：US14127211
申请日：2013-10-02
申请人： Jiewen Yao , Vincent J. Zimmer , Nicholas J. Adams , Willard M. Wiseman , Qin Long , Shihui Li
发明人： Jiewen Yao , Vincent J. Zimmer , Nicholas J. Adams , Willard M. Wiseman , Qin Long , Shihui Li
IPC分类号： G06F21/57 , G06F21/72
CPC分类号： G06F21/575 , G06F9/4403 , G06F21/72
摘要： An embodiment includes an apparatus comprising: an out-of-band cryptoprocessor including secure non-volatile storage that couples to a root index, having a fixed address, and comprises first and second variables referenced by the root index; and semiconductor integrated code (SIC) including embedded processor logic to initialize a processor and embedded memory logic to initialize a memory coupled to the processor; wherein (a) the SIC is to be executed responsive to resetting the processor and prior to providing control to boot code, and (b) the SIC is to perform pre-boot operations in response to accessing at least one of the first and second variables. Other embodiments are described herein.
摘要翻译：实施例包括一种装置，包括：带外密码处理器，包括耦合到具有固定地址的根索引的安全非易失性存储器，并且包括由根索引引用的第一和第二变量; 以及包括用于初始化处理器和嵌入式存储器逻辑的嵌入式处理器逻辑以初始化耦合到所述处理器的存储器的半导体集成代码（SIC）; 其中（a）响应于重置所述处理器并且在向引导代码提供控制之前响应于所述SIC执行所述SIC，以及（b）所述SIC响应于访问所述第一和第二变量中的至少一个来执行预引导操作。本文描述了其它实施例。

5. 发明申请

US20160282927A1 TECHNOLOGIES FOR IMPROVED HYBRID SLEEP POWER MANAGEMENT 审中-公开
标题翻译：改进混合电源管理技术
公开(公告)号：US20160282927A1
公开(公告)日：2016-09-29
申请号：US14670939
申请日：2015-03-27
申请人： Nicholas J. Adams , Erik C. Bjorge , Giri P. Mudusuru
发明人： Nicholas J. Adams , Erik C. Bjorge , Giri P. Mudusuru
IPC分类号： G06F1/32 , G06F9/44 , G06F12/14 , G06F13/24 , G06F21/57
CPC分类号： G06F9/4418 , G06F1/3206 , G06F13/24 , G06F21/575 , G06F21/79
摘要： Technologies for hybrid sleep power management include a computing device with a processor supporting a low-power idle state. In a pre-boot firmware environment, the computing device reserves a memory block for firmware use and copies platform wake code to a secure memory location, such as system management RAM (SMRAM). At runtime, an operating system may execute with the processor in protected mode. In response to a request to enter a sleep or suspend state, the computing device generates a system management interrupt (SMI). In an SMI handler, the computing device copies the wake code from SMRAM to the reserved memory block. The computing device resumes from the SMI handler to the wake code with the processor in real mode. The wake code enters the low-power idle state and then jumps to a wake vector of the operating system after receiving a wake event. Other embodiments are described and claimed.
摘要翻译：用于混合睡眠电源管理的技术包括具有支持低功率空闲状态的处理器的计算设备。在预引导固件环境中，计算设备保留用于固件使用的存储器块，并将平台唤醒码复制到诸如系统管理RAM（SMRAM）之类的安全存储器位置。在运行时，操作系统可以以处于保护模式的方式执行。响应于进入睡眠或挂起状态的请求，计算设备产生系统管理中断（SMI）。在SMI处理程序中，计算设备将唤醒码从SMRAM复制到保留的存储块。计算设备从处理器以实模式从SMI处理程序恢复到唤醒码。唤醒码进入低功率空闲状态，然后在接收到唤醒事件后跳转到操作系统的唤醒向量。描述和要求保护其他实施例。

6. 发明申请

US20140250291A1 CONTINUATION OF TRUST FOR PLATFORM BOOT FIRMWARE 有权
标题翻译：平台引擎固件的信任连续性
公开(公告)号：US20140250291A1
公开(公告)日：2014-09-04
申请号：US13782512
申请日：2013-03-01
申请人： Nicholas J. ADAMS , Willard M. WISEMAN
发明人： Nicholas J. ADAMS , Willard M. WISEMAN
IPC分类号： G06F21/57
CPC分类号： G06F21/575 , G06F21/57
摘要： This disclosure is directed to continuation of trust for platform boot firmware. A device may comprise a processing module and a memory module including read-only memory (ROM) on which is stored platform boot firmware. On activation, the processing module may load the platform boot firmware. The platform boot firmware may cause the processing module to first load a trusted pre-verifier file to load and verify the signature of a hash table loaded from the platform boot firmware. The processing module may then load firmware program files from the platform boot firmware, calculate a hash for each file, and verify whether each program hash is in the hash table. Firmware program files with hashes in the hash table may be allowed to execute. If any firmware program file hash is not in the hash table, the processing module may perform platform specific security actions to prevent the device from being compromised.
摘要翻译：本公开旨在延续平台引导固件的信任。设备可以包括处理模块和包括只读存储器（ROM）的存储器模块，在其上存储有平台引导固件。激活时，处理模块可以加载平台引导固件。平台启动固件可能导致处理模块首先加载可信任的验证者文件以加载并验证从平台引导固件加载的散列表的签名。然后，处理模块可以从平台引导固件加载固件程序文件，计算每个文件的散列，并验证每个程序散列是否在散列表中。可以允许在哈希表中使用散列的固件程序文件执行。如果任何固件程序文件散列不在哈希表中，则处理模块可以执行平台特定的安全动作以防止设备被破坏。

7. 发明申请

US20170185207A1 Technologies for dynamic display with a transformable display 审中-公开
公开(公告)号：US20170185207A1
公开(公告)日：2017-06-29
申请号：US14998314
申请日：2015-12-26
申请人： Rajesh Poornachandran , Vincent J. Zimmer , Nicholas J. Adams , Nithyananda S. Jeganathan , Gunner D. Danneels
发明人： Rajesh Poornachandran , Vincent J. Zimmer , Nicholas J. Adams , Nithyananda S. Jeganathan , Gunner D. Danneels
IPC分类号： G06F3/041 , G06F1/16
CPC分类号： G06F3/0416 , G06F1/1652 , G06F3/0412 , G06F9/44505
摘要： Technologies for dynamic display include a mobile compute device that comprises a display transformable between at least two different physical topologies. The mobile compute device determines a current physical topology of the display and retrieves a policy based on the determined current physical topology. The policy identifies a corresponding action to occur in response to each of one or more user inputs to the mobile compute device while the display has the current physical topology. The mobile compute device processes a user input based on the retrieved policy.

8. 发明申请

US20150277778A1 VIRTUAL GENERAL-PURPOSE I/O CONTROLLER 有权
标题翻译：虚拟通用I / O控制器
公开(公告)号：US20150277778A1
公开(公告)日：2015-10-01
申请号：US14227735
申请日：2014-03-27
申请人： Nicholas J. Adams , Robert E. Gough , Sai Prasad Paithara Balagangadhara , Pronay Dutta
发明人： Nicholas J. Adams , Robert E. Gough , Sai Prasad Paithara Balagangadhara , Pronay Dutta
IPC分类号： G06F3/06 , G06F13/24
CPC分类号： G06F3/0611 , G06F3/0659 , G06F3/0673 , G06F13/105 , G06F13/24 , G06F13/385
摘要： Technologies for virtual general purpose I/O (GPIO) include a computing device having a virtual GPIO controller driver, a virtual GPIO controller firmware interface, and a virtual GPIO controller. The driver receives a GPIO command from an operating system of the computing device. The GPIO command specifies an operation to be performed by a GPIO pin. The driver sends the GPIO command to the firmware interface. In response to the firmware interface receiving the command, the virtual GPIO controller emulates a virtual GPIO pin to implement the GPIO command. The firmware interface may trigger an interrupt that can be received by the operating system. The virtual GPIO controller may emulate the virtual GPIO pin using firmware-reserved backing memory, an embedded controller, or an interface to a peripheral device of the computing device. The firmware interface may be an ACPI control method. Other embodiments are described and claimed.
摘要翻译：用于虚拟通用I / O（GPIO）的技术包括具有虚拟GPIO控制器驱动程序，虚拟GPIO控制器固件接口和虚拟GPIO控制器的计算设备。驱动程序从计算设备的操作系统接收GPIO命令。 GPIO命令指定要由GPIO引脚执行的操作。驱动程序将GPIO命令发送到固件界面。响应固件接口接收命令，虚拟GPIO控制器仿真虚拟GPIO引脚来实现GPIO命令。固件接口可能会触发操作系统可以接收的中断。虚拟GPIO控制器可以使用固件保留后备内存，嵌入式控制器或与计算设备的外围设备的接口来模拟虚拟GPIO引脚。固件接口可以是ACPI控制方法。描述和要求保护其他实施例。

9. 发明申请

US20150379306A1 Management of Authenticated Variables 有权
标题翻译：认证变量管理
公开(公告)号：US20150379306A1
公开(公告)日：2015-12-31
申请号：US14317909
申请日：2014-06-27
申请人： Vincent J. Zimmer , Nicholas J. Adams , Giri P. Mudusuru , Lee G. Rosenbaum , Michael A. Rothman
发明人： Vincent J. Zimmer , Nicholas J. Adams , Giri P. Mudusuru , Lee G. Rosenbaum , Michael A. Rothman
IPC分类号： G06F21/72 , H04L9/32 , G06F21/57 , H04L9/08
CPC分类号： G06F21/72 , G06F21/575 , G06F2221/034 , G09C1/00 , H04L9/3234 , H04L2209/12
摘要： An embodiment includes an apparatus comprising: an out-of-band cryptoprocessor coupled to secure non-volatile storage; and at least one storage medium having firmware instructions stored thereon for causing, during runtime and after an operating system for the apparatus has booted, the cryptoprocessor to (a) store a key within the secure non-volatile storage, (b) sign an object with the key, while the key is within the cryptoprocessor, to produce a signature, and (c) verify the signature. Other embodiments are described herein.
摘要翻译：实施例包括一种装置，包括：耦合到固定非易失性存储器的带外密码处理器; 以及至少一个具有存储在其上的固件指令的存储介质，用于在运行时以及在所述装置的操作系统启动之后使所述密码处理器（a）将密钥存储在所述安全非易失性存储器内，（b）使用密钥，而密钥在密码处理器内，生成签名，（c）验证签名。本文描述了其它实施例。

10. 发明申请

US20140007133A1 SYSTEM AND METHOD TO PROVIDE SINGLE THREAD ACCESS TO A SPECIFIC MEMORY REGION 审中-公开
标题翻译：提供单一线程访问特定存储区域的系统和方法
公开(公告)号：US20140007133A1
公开(公告)日：2014-01-02
申请号：US13537378
申请日：2012-06-29
申请人： Nicholas J. ADAMS
发明人： Nicholas J. ADAMS
IPC分类号： G06F9/46
CPC分类号： G06F9/526
摘要： Processing logic and a method to provide single thread access to a specific memory region without suspending processing activity for all other cores and/or threads within or in association with a processor, computer system, or other processing apparatus. Single thread access may be provided through implementation of microcode which may control thread access to model specific registers (“MSRs”) within a processor. One MSR may provide a mutex, which a single thread may claim, and another MSR may provide a range of memory locations, which may be accessed by the thread that has claimed the mutex.
摘要翻译：处理逻辑和提供对特定存储器区域的单线程访问的方法，而不会对处理器，计算机系统或其他处理装置内或与处理器，计算机系统或其他处理装置相关联的所有其他核和/或线程暂停处理活动。可以通过实现微代码来提供单线程访问，微代码可以控制线程访问处理器内的模型特定寄存器（“MSR”）。一个MSR可以提供单个线程可以声明的互斥体，另一个MSR可以提供一系列的存储器位置，这些存储器位置可以由已经要求互斥的线程访问。

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