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1. 发明授权

US08341559B2 Incremental concurrent processing for efficient computation of high-volume layout data 失效
标题翻译：增量并发处理，用于高效计算大量布局数据
公开(公告)号：US08341559B2
公开(公告)日：2012-12-25
申请号：US13291856
申请日：2011-11-08
申请人： Michael L. Rieger , Mathias Boman , Naji V. Bekhazi , Daniel D. Hung , Michael G. Brashler , Thomas Brett Hall
发明人： Michael L. Rieger , Mathias Boman , Naji V. Bekhazi , Daniel D. Hung , Michael G. Brashler , Thomas Brett Hall
IPC分类号： G06F17/50
CPC分类号： G06F17/50 , G06F17/5068
摘要： Some embodiments of the present invention overcome I/O bottlenecks of an EDA work flow by keeping layout data distributed during handoffs among different processing stages. Specifically, some embodiments leverage a concurrent computation paradigm where data is propagated incrementally between stages, and where data processing among consecutive stages and the I/O between stages are executed concurrently. Specifically, some embodiments can generate a template database which contains the unique templates in a set of templates. During operation, an embodiment can determine a set of templates for a layout. Next, the system can determine a processing schedule based on a spatially coherent ordering of the set of templates. Next, the system can process the templates according to the spatially coherent processing schedule. Processing templates in a spatially coherent order can ensure that the downstream processes in the concurrent work flow will be able to maximize concurrency, thereby improving overall performance of the system.
摘要翻译：本发明的一些实施例通过在不同处理阶段之间的切换期间保留布局数据来克服EDA工作流的I / O瓶颈。具体地，一些实施例利用并行计算范例，其中数据在级之间递增地传播，并且其中连续级之间的数据处理和级之间的I / O同时执行。具体地，一些实施例可以生成包含一组模板中的唯一模板的模板数据库。在操作期间，实施例可以确定用于布局的一组模板。接下来，系统可以基于该组模板的空间相干排序来确定处理进度。接下来，系统可以根据空间相干处理进度处理模板。以空间一致的顺序处理模板可以确保并发工作流中的下游进程能够最大化并发性，从而提高系统的整体性能。

2. 发明申请

US20110016438A1 FLASH-BASED ANTI-ALIASING TECHNIQUES FOR HIGH-ACCURACY HIGH-EFFICIENCY MASK SYNTHESIS 有权
标题翻译：用于高精度高效掩蔽合成的基于FLASH的抗锯齿技术
公开(公告)号：US20110016438A1
公开(公告)日：2011-01-20
申请号：US12892772
申请日：2010-09-28
申请人： Michael L. Rieger , Micheal Cranford , John P. Stirniman
发明人： Michael L. Rieger , Micheal Cranford , John P. Stirniman
IPC分类号： G06F17/50
CPC分类号： G06F17/5068 , G06F2217/12 , Y02P90/265
摘要： Techniques and systems for converting a non-bandlimited pattern layout into a band-limited pattern image are described. During operation, the system receives the non-bandlimited pattern layout which comprises one or more polygons. The system further receives an anti-aliasing filter (AAF) kernel, wherein the AAF kernel is configured to convert a non-bandlimited pattern into a band-limited pattern. The system then constructs an AAF lookup table for the AAF kernel, wherein the AAF lookup table contains precomputed values for a set of convolution functions which are obtained by convolving a set of basis functions with the AAF kernel. Next, the system creates a sampled pattern layout by applying a grid map over the pattern layout. The system then obtains the band-limited pattern image by using the AAF lookup table to convolve the AAF kernel with each grid location in the sampled pattern layout.
摘要翻译：描述了将非带限图案布局转换成带限图案图像的技术和系统。在操作期间，系统接收包括一个或多个多边形的非带限制模式布局。该系统还接收抗混叠滤波器（AAF）内核，其中AAF内核被配置为将非带限制模式转换成带限制模式。然后，该系统为AAF内核构建一个AAF查找表，其中AAF查找表包含一组卷积函数的预计算值，这些卷积函数是通过将一组基函数与AAF内核进行卷积而获得的。接下来，系统通过在图案布局上应用网格图来创建采样图案布局。然后，系统通过使用AAF查找表来获取带限图案图像，以将AAF内核与采样图案布局中的每个网格位置进行卷积。

3. 发明授权

US4283765A Graphics matrix multiplier 失效
标题翻译：图形矩阵乘法器
公开(公告)号：US4283765A
公开(公告)日：1981-08-11
申请号：US42392
申请日：1979-05-25
申请人： Michael L. Rieger
发明人： Michael L. Rieger
IPC分类号： G06F17/16 , G06T3/00 , G06F15/347 , G06F3/14
CPC分类号： G06T3/00 , G06F17/16
摘要： A matrix multiplier is disclosed for rotating, scaling, shearing, and stretching, three-dimensional calligraphic images. This system has particular application to incremental vector generators. The transformations are performed in real time and at the drawing rate of the display device (CRT, plotter, etc.). Complex curved images are transformed as quickly as straight lines. This system reduces matrix multiplication to incremental additions distributed along each line of an image as it is drawn.
摘要翻译：公开了用于旋转，缩放，剪切和拉伸三维书法图像的矩阵乘法器。该系统特别适用于增量矢量发生器。这些变换是以显示装置（CRT，绘图仪等）的实时和绘图速率进行的。复杂的曲面图像会像直线一样快速变换。该系统在绘制时将矩阵乘法减少到沿着图像的每一行分布的增量添加。

4. 发明授权

US08813012B2 Self-aligned via interconnect using relaxed patterning exposure 有权
标题翻译：通过使用松弛图案曝光的互连自对准
公开(公告)号：US08813012B2
公开(公告)日：2014-08-19
申请号：US13550460
申请日：2012-07-16
申请人： Michael L. Rieger , Victor Moroz
发明人： Michael L. Rieger , Victor Moroz
IPC分类号： G06F17/50
CPC分类号： H01L23/5226 , G06F17/5072 , H01L21/76816 , H01L21/76877 , H01L23/53228 , H01L23/53295 , H01L23/5384 , H01L2924/0002 , H01L2924/00
摘要： Self-aligned via interconnects using relaxed patterning exposure. In accordance with a first method embodiment, a method for controlling a computer-aided design (CAD) system for designing physical features of an integrated circuit includes accessing a first pattern for first metal traces on a first metal layer, accessing a second pattern for second metal traces on a second metal layer, vertically adjacent to the first metal layer and accessing a precise pattern of intended interconnections between the first and second metal traces. The precise pattern of intended interconnections is operated on to form an imprecise via pattern that indicates a plurality of general areas in which vias are allowed. The imprecise via pattern is for use in an integrated circuit manufacturing process to form, in conjunction with operations to form the first and second metal layers, a plurality of self-aligned vias for interconnecting the intended interconnections.
摘要翻译：通过使用松弛图案曝光的互连自对准。根据第一方法实施例，一种用于控制用于设计集成电路的物理特征的计算机辅助设计（CAD）系统的方法包括：访问用于第一金属层上的第一金属迹线的第一图案，访问用于第二金属层的第二图案垂直于第一金属层的第二金属层上的金属迹线，并且访问第一和第二金属迹线之间的预期互连的精确图案。操作预定互连的精确模式以形成指示允许通孔的多个通用区域的不精确的通孔图案。通过图案的不精确性用于集成电路制造过程中，与形成第一和第二金属层的操作一起形成用于互连预期互连的多个自对准通孔。

5. 发明申请

US20120054693A1 INCREMENTAL CONCURRENT PROCESSING FOR EFFICIENT COMPUTATION OF HIGH-VOLUME LAYOUT DATA 失效
标题翻译：有效地计算高容量布局数据的增量式并行处理
公开(公告)号：US20120054693A1
公开(公告)日：2012-03-01
申请号：US13291856
申请日：2011-11-08
申请人： Michael L. Rieger , Mathias Boman , Naji V. Bekhazi , Daniel D. Hung , Michael G. Brashler , Thomas Brett Hall
发明人： Michael L. Rieger , Mathias Boman , Naji V. Bekhazi , Daniel D. Hung , Michael G. Brashler , Thomas Brett Hall
IPC分类号： G06F17/50
CPC分类号： G06F17/50 , G06F17/5068
摘要： Some embodiments of the present invention overcome I/O bottlenecks of an EDA work flow by keeping layout data distributed during handoffs among different processing stages. Specifically, some embodiments leverage a concurrent computation paradigm where data is propagated incrementally between stages, and where data processing among consecutive stages and the I/O between stages are executed concurrently. Specifically, some embodiments can generate a template database which contains the unique templates in a set of templates. During operation, an embodiment can determine a set of templates for a layout. Next, the system can determine a processing schedule based on a spatially coherent ordering of the set of templates. Next, the system can process the templates according to the spatially coherent processing schedule. Processing templates in a spatially coherent order can ensure that the downstream processes in the concurrent work flow will be able to maximize concurrency, thereby improving overall performance of the system.
摘要翻译：本发明的一些实施例通过在不同处理阶段之间的切换期间保留布局数据来克服EDA工作流的I / O瓶颈。具体地，一些实施例利用并行计算范例，其中数据在级之间递增地传播，并且其中连续级之间的数据处理和级之间的I / O同时执行。具体地，一些实施例可以生成包含一组模板中的唯一模板的模板数据库。在操作期间，实施例可以确定用于布局的一组模板。接下来，系统可以基于该组模板的空间相干排序来确定处理进度。接下来，系统可以根据空间相干处理进度处理模板。以空间一致的顺序处理模板可以确保并发工作流中的下游进程能够最大化并发性，从而提高系统的整体性能。

6. 发明申请

US20090083693A1 FLASH-BASED UPDATING TECHNIQUES FOR HIGH-ACCURACY HIGH EFFICIENCY MASK SYNTHESIS 有权
标题翻译：基于FLASH的升级技术，实现高精度高效掩蔽合成
公开(公告)号：US20090083693A1
公开(公告)日：2009-03-26
申请号：US11861195
申请日：2007-09-25
申请人： Michael L. Rieger , Micheal Cranford , John P. Stirniman
发明人： Michael L. Rieger , Micheal Cranford , John P. Stirniman
IPC分类号： G06F17/50
CPC分类号： G06F17/5068 , G06F2217/12 , Y02P90/265
摘要： Another embodiment of the present invention provides a system that computes the effect of perturbations to an input pattern layout during an OPC (Optical Proximity Correction) process. During operation, the system receives a pattern layout. The system further receives a set of lithography model kernels. The system then obtains a set of convolved patterns by convolving the pattern layout with each of the set of lithography model kernels. Next, the system computes a model flash lookup table for each of the lithography model kernels, wherein the model flash lookup table contains precomputed values for a set of convolution functions obtained by convolving a set of basis functions with the lithography model kernel. The system additionally receives a perturbation pattern to be added onto the pattern layout. Next, for a query location in a plurality of query locations on the pattern layout, the system obtains a set of convolution values at the query location by using the model flash lookup tables to convolve the perturbation pattern with the set of lithography model kernels. The system then updates the set of convolved patterns at the query location to account for the effect of the perturbation pattern by combining the set of convolution values with the set of convolved patterns. Next, the system computes an intensity value at the query location.
摘要翻译：本发明的另一实施例提供了一种在OPC（光学邻近校正）过程期间计算扰动对输入图案布局的影响的系统。在操作过程中，系统接收到一个模式布局。该系统还接收一组光刻模型内核。然后，系统通过将图案布局与每个平版印刷模型内核中的每一个卷积来获得一组卷积图案。接下来，系统计算每个光刻模型内核的模型闪存查找表，其中模型闪存查找表包含通过将一组基础函数与光刻模型内核进行卷积而获得的一组卷积函数的预计算值。系统还接收要添加到模式布局上的扰动模式。接下来，对于模式布局上的多个查询位置中的查询位置，系统通过使用模型快速查找表来将扰动模式与该组光刻模型内核一起卷积在查询位置处获得一组卷积值。然后，该系统在查询位置处更新该组卷积模式，以通过将该组卷积值与该组卷积模式组合来考虑扰动模式的影响。接下来，系统计算查询位置处的强度值。

7. 发明授权

US06289499B1 Proximity correction software for wafer lithography 有权
标题翻译：用于晶圆光刻的接近校正软件
公开(公告)号：US06289499B1
公开(公告)日：2001-09-11
申请号：US09479340
申请日：2000-01-07
申请人： Michael L. Rieger , John P. Stirniman
发明人： Michael L. Rieger , John P. Stirniman
IPC分类号： G06F1750
CPC分类号： G03F1/36 , G03F7/70441
摘要： A system for computing a pattern function for a polygonal pattern having a finite number of predetermined face angles. One method includes the steps of decomposing the polygon into a set of flashes, computing the pattern function by summing together all flashes evaluated at a point (x,y), and the pattern function returning a 1 if point (x,y) is inside a polygon and otherwise will return a 0. Another method for computing a two-dimensional convolution value for any point (x,y) on a polygonal pattern includes the steps of identifying a set of half-plane basis functions corresponding to each face angle of the polygonal pattern, convolving each half-plane basis function with a convolution kernel using integration to find convolved flash (cflash) x,y values, storing the cflash (x,y) values to a two-dimensional look-up table, decomposing the polygonal pattern into a set of flashes where each of the flashes is an instance of the half-plane basis functions, and computing a convolution value for point (x,y) by looking-up a corresponding cflash x,y value for each flash in the table and summing together the corresponding cflash x,y values. The present invention may be used in a method for determining correction steps to which a design layout is to be subjected during wafer proximity correction.
摘要翻译：一种用于计算具有有限数量的预定面角的多边形图案的图案函数的系统。一种方法包括以下步骤：将多边形分解成一组闪光，通过将在点（x，y）处评估的所有闪光相加在一起来计算图案函数，并且如果点（x，y）在里面，模式函数返回1 多边形，否则将返回0.另一种用于计算多边形图案上的任何点（x，y）的二维卷积值的方法包括以下步骤：识别与每个面角度相对应的一组半平面基函数多边形图案，使用积分来卷积每个半平面基函数与卷积核以找到卷积闪存（cflash）x，y值，将cflash（x，y）值存储到二维查找表中，分解多边形图案形成一组闪光，其中每个闪光是半平面基函数的实例，并且通过查找每个闪光的相应的cflash x，y值来计算点（x，y）的卷积值桌子和把对象加在一起考虑cflash x，y值。本发明可以用于在晶片接近校正期间确定设计布局将要经受的校正步骤的方法。

8. 发明授权

US4879605A Rasterization system utilizing an overlay of bit-mapped low address resolution databases 失效
标题翻译：利用位映射低地址解析数据库覆盖的光栅化系统
公开(公告)号：US4879605A
公开(公告)日：1989-11-07
申请号：US161986
申请日：1988-02-29
申请人： Paul A. Warkentin , Michael L. Rieger , Chris A. Michalski , Matthew J. Jolley
发明人： Paul A. Warkentin , Michael L. Rieger , Chris A. Michalski , Matthew J. Jolley
IPC分类号： H04N1/387 , B41J2/44 , B41J5/30 , G03F7/20 , G06K15/00 , H01L21/027 , H04N1/40
CPC分类号： G03F7/704 , G06K15/00 , H04N1/40025
摘要： A method and apparatus for providing improved address resolution in a rasterization system. The rasterization system of the present invention comprises a pattern database, a pattern delivery computer, a rasterizer and a radiant energy system in which a plurality of logical passes are made across a substrate to produce photolithographically formed patterns. The plurality of passes use a combination of offset printing techniques and application of energy to photosensitive material at a plurality of intensities to provide improved address resolution.
摘要翻译：一种用于在光栅化系统中提供改进的地址分辨率的方法和装置。本发明的光栅化系统包括图案数据库，图案传送计算机，光栅化器和辐射能系统，其中跨越衬底跨越多个逻辑通道以产生光刻形成的图案。多个通道使用胶印技术的组合以及以多个强度向光敏材料施加能量以提供改进的地址分辨率。

9. 发明授权

US4777651A Method of pixel to vector conversion in an automatic picture coding system 失效
标题翻译：自动图像编码系统中像素向量转换的方法
公开(公告)号：US4777651A
公开(公告)日：1988-10-11
申请号：US624434
申请日：1984-06-25
申请人： Benjamin E. McCann , Michael L. Rieger
发明人： Benjamin E. McCann , Michael L. Rieger
IPC分类号： H04N1/413 , G06K9/48 , G06T3/00 , G06T9/20 , H04N1/411
CPC分类号： G06T9/20 , G06K9/481
摘要： An automatic picture coding system including a method for converting a bit-map image of the picture to vectors as the picture is being scanned. The bit map is delayed as it is being generated to form a series of tessellations or windows of data. The windows are propagated through a series of neighborhood-logic elements which perform data transformation operations such as growing, smoothing and thinning of the bit-map image. A bit stream output from the neighborhood logic which output includes only line and edge features of the original picture is transferred serially to a microcomputer where the features are partitioned into a plurality of line segments. Each line segment is chain coded and temporarily stored, as it is acquired, in a corresponding one of a plurality of lists, the lists being linked in an order corresponding with the order in which the segments are acquired. When the storage of each chain-coded segment is completed, the segment is converted to vectors and transmitted to a user device for display, storage, or further processing, the lists in which the converted segments were stored being unlinked and deallocated. The process is continued until the entire document has been scanned and converted to vectorial data.
摘要翻译：一种自动图像编码系统，包括当图像被扫描时将图像的位图图像转换为向量的方法。位图被生成以延迟，形成一系列数据的镶嵌或窗口。这些窗口通过执行诸如位图图像的生长，平滑和变薄等数据变换操作的一系列邻居逻辑元件进行传播。从邻域逻辑输出的比特流输出仅包括原始图像的线和边缘特征被串行地传送到其中特征被分割成多个线段的微计算机。每个线段被链式编码，并被临时存储在多个列表中的相应一个列表中，该列表以与获取段的顺序相对应的顺序链接。当每个链式编码段的存储完成时，段被转换为向量并被发送到用户设备进行显示，存储或进一步处理，转换段被存储的列表被取消链接和释放。该过程继续进行，直到整个文档被扫描并转换为矢量数据。

10. 发明授权

US3669009A Refuse compactor 失效
标题翻译：拒绝压缩器
公开(公告)号：US3669009A
公开(公告)日：1972-06-13
申请号：US3669009D
申请日：1970-11-30
申请人： THOMAS H PRATT , MICHAEL L RIEGER
发明人： PRATT THOMAS H , RIEGER MICHAEL L
IPC分类号： B30B9/30 , B30B15/16
CPC分类号： B30B9/3057
摘要： This invention provides a refuse compactor which compresses household trash and garbage into odor and moisture-proof bags and seals the bags to prevent re-expansion or leakage. This device utilizes hydraulic pressure from a home water pressure system to actuate a double-action piston which is controlled by means of a four-way valve. The double-action piston is connected to actuate a compression plate to compact the trash and garbage into the bag within a compaction chamber and to retract the compression plate to thereby allow the user to remove the compacted load. The compaction chamber is hinged to tilt outwardly to allow removal of the bag filled with the compressed trash and garbage.

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