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    • 1. 发明授权
    • High-speed optical data links
    • 高速光数据链路
    • US06947672B2
    • 2005-09-20
    • US10681663
    • 2003-10-07
    • Wenbin JiangHsing-Chung LeeMichael J. Hartmann
    • Wenbin JiangHsing-Chung LeeMichael J. Hartmann
    • G06F3/00H04B3/02H04B10/25H04B10/50H04B10/00
    • H04B10/503H04B10/25H04B10/801
    • A high-speed optical data link includes a system circuit board, a first ASIC coupled to convey electrical information to and from up level data management circuits, and a second ASIC electrically coupled to the first ASIC. A fiber optic module mounted on the system circuit board including a receiver, a transmitter and the second ASIC. The receiver includes a photo-diode positioned to receive optical signals, a trans-impedance amplifier electrically coupled to the photo diode, and a post-amplifier electrically coupled to the trans-impedance amplifier and to the second ASIC. The transmitter includes a laser positioned to convey optical signals to a remote optical receiver and a laser driver electrically coupled to the laser and to the second ASIC. Both the first and the second ASICs include clocking and equalization/retiming functions for recovering distorted data transmitted therebetween through electrical traces on the system circuit board so as to send electrical data at rates equal to or higher than 10-Gbps.
    • 高速光学数据链路包括系统电路板,耦合以向上层数据管理电路传送电信息的第一ASIC和与第一ASIC电耦合的第二ASIC。 安装在包括接收器,发射器和第二ASIC的系统电路板上的光纤模块。 接收器包括被定位成接收光信号的光电二极管,电耦合到光电二极管的跨阻放大器,以及电耦合到跨阻放大器和第二ASIC的后置放大器。 发射器包括定位成将光信号传送到远程光接收器的激光器和与激光器和第二ASIC电耦合的激光驱动器。 第一和第二ASIC都包括时钟和均衡/重新定时功能,用于通过系统电路板上的电迹线恢复其间传输的失真数据,以便以等于或高于10-Gbps的速率发送电子数据。
    • 2. 发明授权
    • High-speed optical data links
    • 高速光数据链路
    • US06665498B1
    • 2003-12-16
    • US10185091
    • 2002-06-28
    • Wenbin JiangHsing-Chung LeeMichael J. Hartmann
    • Wenbin JiangHsing-Chung LeeMichael J. Hartmann
    • H04B1000
    • H04B10/503H04B10/25H04B10/801
    • A high-speed optical data link includes a system circuit board, a first ASIC coupled to convey electrical information to and from up level data management circuits, and a second ASIC electrically coupled to the first ASIC. A fiber optic module mounted on the system circuit board including a receiver, a transmitter and the second ASIC. The receiver includes a photo-diode positioned to receive optical signals, a trans-impedance amplifier electrically coupled to the photo diode, and a post-amplifier electrically coupled to the trans-impedance amplifier and to the second ASIC. The transmitter includes a laser positioned to convey optical signals to a remote optical receiver and a laser driver electrically coupled to the laser and to the second ASIC. Both the first and the second ASICs include clocking and equalization/retiming functions for recovering distorted data transmitted therebetween through electrical traces on the system circuit board so as to send electrical data at rates equal to or higher than 10-Gbps.
    • 高速光学数据链路包括系统电路板,耦合以向上层数据管理电路传送电信息的第一ASIC和与第一ASIC电耦合的第二ASIC。 安装在包括接收器,发射器和第二ASIC的系统电路板上的光纤模块。 接收器包括被定位成接收光信号的光电二极管,电耦合到光电二极管的跨阻放大器,以及电耦合到跨阻放大器和第二ASIC的后置放大器。 发射器包括定位成将光信号传送到远程光接收器的激光器和与激光器和第二ASIC电耦合的激光驱动器。 第一和第二ASIC都包括时钟和均衡/重新定时功能,用于通过系统电路板上的电迹线恢复其间传输的失真数据,以便以等于或高于10-Gbps的速率发送电子数据。
    • 3. 发明授权
    • Determination of load flow in direct current electrical systems
    • 直流电气系统负载流量的确定
    • US5359711A
    • 1994-10-25
    • US992712
    • 1992-12-18
    • Michael J. HartmannGlenn P. McCarthy
    • Michael J. HartmannGlenn P. McCarthy
    • G06F17/50H02J13/00G06F15/00
    • G06F17/5036H02J13/0003Y02B90/228Y04S20/18Y10S715/97
    • A system and method (100,200) which uses a spreadsheet computer program having linked files in which the network architecture and the network element properties are entered and stored by the user. The overall network configuration information is input into a first, (INPUT) file type (102), which includes general parameters such as the battery terminal voltage, cable temperatures, bus (or node) names and bus interconnection information such as cable sizes and number of conductors per node. Cable impedance tables are available in a second, auxiliary (RESIST) file (112). Detailed loading information is entered in a third, (PANEL) file (128), which includes load description, load type (constant power or constant impedance), and load rating data and load status (on or off), which can be sequenced over time. These spreadsheets, or files, cooperate to automatically set up the appropriate YBUS admittance matrix file (120,124) and interactively compute voltages and currents using fourth type (CALC) files (122,126). Thus, the computed currents and short circuit fault currents are based on the actual computed node voltages. Preferably, the system and method include a graphics display module (1 LINE) (130,132), which generates a one line diagram on the display screen, along with the results of the load flow calculations.
    • 一种系统和方法(100,200),其使用具有链接文件的电子表格计算机程序,其中网络架构和网元属性由用户输入和存储。 总体网络配置信息被输入到第一(INPUT)文件类型(102),其包括诸如电池端子电压,电缆温度,总线(或节点)名称和总线互连信息(例如电缆尺寸和数量)的一般参数 每个节点的导体。 电缆阻抗表在第二个辅助(RESIST)文件(112)中可用。 详细的加载信息输入到第三个(PANEL)文件(128)中,其中包括负载描述,负载类型(恒定功率或恒定阻抗)以及负载额定值数据和负载状态(开或关),可以对其进行排序 时间。 这些电子表格或文件合作自动设置适当的YBUS导纳矩阵文件(120,124),并使用第四类型(CALC)文件交互式地计算电压和电流(122,126)。 因此,计算出的电流和短路故障电流是基于实际计算的节点电压。 优选地,系统和方法包括图形显示模块(1 LINE)(130,132),其在显示屏幕上生成一条线图以及负载流计算的结果。