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    • 2. 发明申请
    • Programmable engine core for executing digital signal processing functions
    • 用于执行数字信号处理功能的可编程引擎内核
    • US20050251542A1
    • 2005-11-10
    • US11061353
    • 2005-02-18
    • Michael HennedyAhmed Shalash
    • Michael HennedyAhmed Shalash
    • G06F7/38G06F17/14
    • G06F17/142H03H17/0213H03H17/0294H03H2017/0298H03H2218/10
    • A flexible engine for implementing digital signal processing (DSP) functions involving repeating various arithmetic/logical operations on a stream of data includes multiple programmable filter elements, at least one of which includes a microcode control program for internal control of the programmable filter element. The engine also includes programmable interconnection logic coupled to the programmable filter elements for selectively combining, scaling, and accumulating output values from the first plurality of programmable filter elements and selectively providing accumulated values as inputs to the first plurality of programmable filter elements. A filter controller coupled to the programmable filter elements and the programmable interconnection logic includes its own microcode control program for external control of the programmable filter elements and the programmable interconnection logic. Multiple engines can be combined to form larger, more powerful engines.
    • 用于实现涉及对数据流重复各种算术/逻辑运算的数字信号处理(DSP)功能的灵活引擎包括多个可编程滤波器元件,其中至少一个包括用于可编程滤波器元件的内部控制的微代码控制程序。 引擎还包括耦合到可编程滤波器元件的可编程互连逻辑,用于选择性地组合,缩放和累积来自第一多个可编程滤波器元件的输出值,并且选择性地将累积值提供给第一多个可编程滤波器元件的输入。 耦合到可编程滤波器元件和可编程互连逻辑器件的滤波器控制器包括用于可编程滤波器元件和可编程互连逻辑的外部控制的其自身的微代码控制程序。 多个引擎可以组合起来形成更大,更强大的引擎。
    • 4. 发明授权
    • Programmable engine core for executing digital signal processing functions
    • 用于执行数字信号处理功能的可编程引擎内核
    • US07698354B2
    • 2010-04-13
    • US11061353
    • 2005-02-18
    • Michael HennedyAhmed Shalash
    • Michael HennedyAhmed Shalash
    • G06F17/10
    • G06F17/142H03H17/0213H03H17/0294H03H2017/0298H03H2218/10
    • A flexible engine for implementing digital signal processing (DSP) functions involving repeating various arithmetic/logical operations on a stream of data includes multiple programmable filter elements, at least one of which includes a microcode control program for internal control of the programmable filter element. The engine also includes programmable interconnection logic coupled to the programmable filter elements for selectively combining, scaling, and accumulating output values from the first plurality of programmable filter elements and selectively providing accumulated values as inputs to the first plurality of programmable filter elements. A filter controller coupled to the programmable filter elements and the programmable interconnection logic includes its own microcode control program for external control of the programmable filter elements and the programmable interconnection logic. Multiple engines can be combined to form larger, more powerful engines.
    • 用于实现涉及对数据流重复各种算术/逻辑运算的数字信号处理(DSP)功能的灵活引擎包括多个可编程滤波器元件,其中至少一个包括用于可编程滤波器元件的内部控制的微代码控制程序。 引擎还包括耦合到可编程滤波器元件的可编程互连逻辑,用于选择性地组合,缩放和累积来自第一多个可编程滤波器元件的输出值,并且选择性地将累积值提供给第一多个可编程滤波器元件的输入。 耦合到可编程滤波器元件和可编程互连逻辑器件的滤波器控制器包括用于可编程滤波器元件和可编程互连逻辑的外部控制的其自身的微代码控制程序。 多个引擎可以组合起来形成更大,更强大的引擎。
    • 5. 发明授权
    • Micro-programmable digital filter
    • 微型可编程数字滤波器
    • US07418467B2
    • 2008-08-26
    • US10871411
    • 2004-06-18
    • Michael Hennedy
    • Michael Hennedy
    • G06F17/10
    • H03H17/0294H03H17/0288H03H2017/0298
    • A micro-programmable digital filter includes a plurality of programmable filter elements, an instruction memory for storing a control program, at least one instruction decoder for programming the filter elements based on the control program, and arithmetic logic for selectively scaling and accumulating output values received from the filter elements and providing accumulated values as inputs to the filter elements. The filter elements are typically coupled in series so that a coefficient output from one filter element can be passed to an adjacent filter element for implementing longer filters. A separate instruction decoder may be included for each filter element. Execution of the separate instruction decoders is typically staggered so that the instruction decoders can share the instruction memory and an accumulator without collision. Each filter element can be programmed to implement a different filtering function, or multiple filter elements can be programmed to operate on a single filtering function.
    • 微型可编程数字滤波器包括多个可编程滤波器元件,用于存储控制程序的指令存储器,用于基于控制程序编程滤波器元件的至少一个指令解码器,以及用于选择性地缩放和累加所接收的输出值的算术逻辑 并且将累积值作为过滤元件的输入提供。 滤波器元件典型地串联耦合,使得来自一个滤波器元件的系数输出可以传递到相邻的滤波器元件,以实现更长的滤波器。 每个滤波器元件可以包括单独的指令解码器。 单独的指令解码器的执行通常交错,使得指令解码器可以共享指令存储器和累加器而不发生冲突。 每个滤波器元件可被编程以实现不同的滤波功能,或者可以将多个滤波器元件编程为在单个滤波功能上操作。
    • 7. 发明申请
    • Micro-programmable digital filter
    • 微型可编程数字滤波器
    • US20050283508A1
    • 2005-12-22
    • US10871411
    • 2004-06-18
    • Michael Hennedy
    • Michael Hennedy
    • G06F17/10H03H17/02
    • H03H17/0294H03H17/0288H03H2017/0298
    • A micro-programmable digital filter includes a plurality of programmable filter elements, an instruction memory for storing a control program, at least one instruction decoder for programming the filter elements based on the control program, and arithmetic logic for selectively scaling and accumulating output values received from the filter elements and providing accumulated values as inputs to the filter elements. The filter elements are typically coupled in series so that a coefficient output from one filter element can be passed to an adjacent filter element for implementing longer filters. A separate instruction decoder may be included for each filter element. Execution of the separate instruction decoders is typically staggered so that the instruction decoders can share the instruction memory and an accumulator without collision. Each filter element can be programmed to implement a different filtering function, or multiple filter elements can be programmed to operate on a single filtering function.
    • 微型可编程数字滤波器包括多个可编程滤波器元件,用于存储控制程序的指令存储器,用于基于控制程序编程滤波器元件的至少一个指令解码器,以及用于选择性地缩放和累加所接收的输出值的算术逻辑 并且将累积值作为过滤元件的输入提供。 滤波器元件典型地串联耦合,使得来自一个滤波器元件的系数输出可以传递到相邻的滤波器元件,以实现更长的滤波器。 每个滤波器元件可以包括单独的指令解码器。 单独的指令解码器的执行通常交错,使得指令解码器可以共享指令存储器和累加器而不发生冲突。 每个滤波器元件可被编程以实现不同的滤波功能,或者可以将多个滤波器元件编程为在单个滤波功能上操作。