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1. 发明授权

US06780714B2 Semiconductor devices and their manufacture 有权
标题翻译：半导体器件及其制造
公开(公告)号：US06780714B2
公开(公告)日：2004-08-24
申请号：US10227672
申请日：2002-08-26
申请人： Mark A. Gajda , Michael A. A. in 't Zandt , Erwin A. Hijzen
发明人： Mark A. Gajda , Michael A. A. in 't Zandt , Erwin A. Hijzen
IPC分类号： H01L21336
CPC分类号： H01L29/7813 , H01L29/0696 , H01L29/1095 , H01L29/402 , H01L29/407 , H01L29/4238 , H01L29/7811
摘要： In a cellular power MOSFET or other semiconductor device, a wide connection across the perimeter of an active device area (120) is replaced with a plurality of narrower conducting fingers (111). The fingers (11) are used as follows in providing a doped edge region (15a) that is required below the connection (110). Dopant (150,151) is implanted at spaces (112) between and beside the fingers (111) and is diffused to form a single continuous region (15a) extending beneath the fingers (111) and at the spaces (112) therebetween. This doped edge region (15a) may be, for example, a deep guard ring in an edge termination of a power MOSFET, or an extension of its channel-accommodating region (15). A trench-gate network (11) of the MOSFET can be connected by the conducting fingers to a gate bond pad and/or field plate (114).
摘要翻译：在蜂窝功率MOSFET或其它半导体器件中，穿过有源器件区域（120）的周边的宽连接被多个较窄的导电指状物（111）代替。在提供在连接（110）下方所需的掺杂边缘区域（15a）的情况下，如下使用指状物（11）。掺杂剂（150,151）注入在指状物（111）之间和旁边的空间（112）处，并且被扩散以形成在指状物（111）下方和其间的空间（112）处延伸的单个连续区域（15a）。该掺杂边缘区域（15a）可以是例如功率MOSFET的边缘终端中的深保护环或其沟道容纳区域（15）的延伸部。 MOSFET的沟槽栅极网络（11）可以通过导电指连接到栅极接合焊盘和/或场板（114）。

2. 发明授权

US07033889B2 Trenched semiconductor devices and their manufacture 失效
标题翻译：半导体器件及其制造
公开(公告)号：US07033889B2
公开(公告)日：2006-04-25
申请号：US11220297
申请日：2005-09-02
申请人： Erwin A. Hijzen , Michael A. A. In 't Zandt , Raymond J. E. Hueting
发明人： Erwin A. Hijzen , Michael A. A. In 't Zandt , Raymond J. E. Hueting
IPC分类号： H01L21/336 , H01L21/4763
CPC分类号： H01L29/7813 , H01L21/28211 , H01L29/4232 , H01L29/42368 , H01L29/4238 , H01L29/51 , H01L29/511 , H01L29/872
摘要： In semiconductor devices which include an insulated trench electrode (11) in a trench (20), for example, trench-gate field effect power transistors and trenched Schottky diodes, a cavity (23) is provided between the bottom (25) of the trench electrode (11) and the bottom (27) of the trench (20) to reduce the dielectric coupling between the trench electrode (11) and the body portion at the bottom (27) of the trench in a compact manner. In power transistors, the reduction in dielectric coupling reduces switching power losses, and in Schottky diodes, it enables the trench width to be reduced.
摘要翻译：在包括沟槽（20）中的绝缘沟槽电极（11）的半导体器件中，例如沟槽栅场效应功率晶体管和沟槽肖特基二极管，在沟槽的底部（25）之间提供空腔（23）电极（11）和沟槽（20）的底部（27），以紧凑的方式减小沟槽电极（11）和沟槽底部（27）处的主体部分之间的电介质耦合。在功率晶体管中，介电耦合的减小降低了开关功率损耗，而在肖特基二极管中，能够减小沟槽宽度。

3. 发明授权

US07791059B2 Electric device with phase change resistor 有权
标题翻译：带相变电阻器的电器
公开(公告)号：US07791059B2
公开(公告)日：2010-09-07
申请号：US12294020
申请日：2007-03-21
申请人： Frisco J. M. Jedema , Karen Attenborough , Roel Daamen , Michael A. A. In 'T Zandt
发明人： Frisco J. M. Jedema , Karen Attenborough , Roel Daamen , Michael A. A. In 'T Zandt
IPC分类号： H01L47/00
CPC分类号： H01L45/1293 , H01L27/2436 , H01L45/06 , H01L45/1226 , H01L45/1233 , H01L45/1246
摘要： An electric device has an electrically switchable resistor (2′) comprising a phase change material. The resistance value of the resistor can be changed between at least two values by changing the phase of the phase change material within a part of the resistor called the switching zone (12′) using Joule heating of the resistor. The device comprises a body (24′) encapsulating the resistor, which body comprises at least two abutting regions (26′, 28′) having different thermally insulating properties. These regions form a thermally insulating contrast with which the dimension of the switching zone can be determined without having to alter the dimensions of the resistor. Such a device can be used in electronic memory or reconfigurable logic circuits.
摘要翻译：电气装置具有包括相变材料的电可开关电阻器（2'）。通过使用电阻器的焦耳加热来改变称为开关区（12'）的电阻器的一部分内的相变材料的相位，可以在至少两个值之间改变电阻器的电阻值。该装置包括封装电阻器的本体（24'），该主体包括具有不同绝热性能的至少两个邻接区域（26'，28'）。这些区域形成隔热对比度，可以确定开关区域的尺寸，而不必改变电阻器的尺寸。这种装置可用于电子存储器或可重新配置的逻辑电路中。

4. 发明授权

US07671390B2 Semiconductor device and method for manufacture 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07671390B2
公开(公告)日：2010-03-02
申请号：US11628130
申请日：2005-05-25
申请人： Jan Sonsky , Erwin A. Hijzen , Michael A. A. In 'T Zandt
发明人： Jan Sonsky , Erwin A. Hijzen , Michael A. A. In 'T Zandt
IPC分类号： H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113 , H01L29/00
CPC分类号： H01L21/76264 , H01L21/76895 , H01L29/0653 , H01L29/404 , H01L29/407 , H01L29/42368 , H01L29/7816 , H01L29/7824 , H01L29/7835
摘要： A semiconductor device is formed with a lower field plate (32) and optional lateral field plates (34) around semiconductor (20) in which devices are formed, for example power FETs or other transistor or diode types. The semiconductor device is manufactured by forming trenches with insulated sidewalls, etching cavities (26) at the base of the trenches which join up and then filling the trenches with conductor (30).
摘要翻译：半导体器件形成有下部场板（32）和围绕其形成器件的半导体（20）周围的可选的横向场板（34），例如功率FET或其它晶体管或二极管类型。通过形成具有绝缘侧壁的沟槽来制造半导体器件，在沟槽的基部处的蚀刻腔（26），其连接起来，然后用导体（30）填充沟槽。

5. 发明申请

US20080277642A1 Fabrication of Phase-Change Resistor Using a Backend Process 审中-公开
标题翻译：使用后端工艺制造相变电阻器
公开(公告)号：US20080277642A1
公开(公告)日：2008-11-13
申请号：US11814800
申请日：2006-01-19
申请人： Michael A., A. In T Zandt , Martijn H., R. Lankhorst , Robertus A. M. Wolters , Hans Kwinten
发明人： Michael A., A. In T Zandt , Martijn H., R. Lankhorst , Robertus A. M. Wolters , Hans Kwinten
IPC分类号： H01L45/00
CPC分类号： H01L45/06 , H01L27/2436 , H01L45/1226 , H01L45/1233 , H01L45/126 , H01L45/144 , H01L45/148 , H01L45/1675 , H01L45/1691
摘要： A phase change resistor device has a phase change material (PCM) for which the phase transition occurs inside the PCM and not at the interface with a contact electrode. For ease of manufacturing the PCM is an elongate line structure (210, 215) surrounded by the conductive electrode portions (200, 240) at its lateral sides, and is formed in a CMOS backend process. An alternative is to form the device coupled directly to other circuit parts without the electrodes. In each case, there is a line of PCM which has a constant diameter or cross section, formed with reduced dimensions by using a spacer as a hard mask. The first contact electrode and the second contact electrode are electrically connected by a “one dimensional” layer of the PCM. The contact resistance between the one-dimensional layer of PCM and the first contact electrode at the second contact electrode is lower than the resistance of a central or intervening portion of the line.
摘要翻译：相变电阻器件具有相变材料（PCM），在该相变材料（PCM）中，相变发生在PCM内部，而不在与接触电极的界面处。为了便于制造，PCM是由导电电极部分（200,240）在其侧面环绕的细长线结构（210,215），并且以CMOS后端工艺形成。一种替代方案是形成直接连接到没有电极的其它电路部件的装置。在每种情况下，存在具有恒定直径或横截面的PCM线，其通过使用间隔件作为硬掩模以减小的尺寸形成。第一接触电极和第二接触电极通过PCM的“一维”层电连接。 PCM的一维层和第二接触电极处的第一接触电极之间的接触电阻低于线的中心部分或中间部分的电阻。

6. 发明授权

US07361555B2 Trench-gate transistors and their manufacture 有权
标题翻译：沟槽栅晶体管及其制造
公开(公告)号：US07361555B2
公开(公告)日：2008-04-22
申请号：US10591352
申请日：2005-02-28
申请人： Gerrit E. J. Koops , Michael A. A. In 'T Zandt
发明人： Gerrit E. J. Koops , Michael A. A. In 'T Zandt
IPC分类号： H01L21/336
CPC分类号： H01L29/7813 , H01L29/407 , H01L29/42368 , H01L29/511 , H01L29/513 , H01L29/518 , H01L29/7811
摘要： A trench-gate transistor has an integral first layer of silicon dioxide extending from the upper surface of the semiconductor body over top corners of each cell array trench. The integral first layer also provides a thin gate dielectric insulating layer for a thick gate electrode and the integral first layer also provides a first part of a stack of materials which constitute a thick trench sidewall insulating layer for a thin field plate. Consistent with an example embodiment, there is a method of manufacture. A hardmask used to etch the trenches is removed before providing the silicon dioxide layer. The layer is then protected by successive selective etching of the oxide layer and the nitride layer in the upper parts of the trenches. After the gate electrodes are provided, layers for the channel accommodating regions and source regions may be formed through the oxide layer on the upper surface.
摘要翻译：沟槽栅晶体管具有从半导体主体的上表面延伸到每个单元阵列沟槽的顶角上的整体的二氧化硅层。积分第一层还提供了用于厚栅电极的薄栅介质绝缘层，并且整体第一层还提供构成用于薄场板的厚沟槽侧壁绝缘层的材料堆叠的第一部分。与示例性实施例一致，存在制造方法。在提供二氧化硅层之前去除用于蚀刻沟槽的硬掩模。然后通过对沟槽上部的氧化物层和氮化物层的连续选择性蚀刻来保护该层。在设置栅电极之后，可以通过上表面上的氧化物层形成用于沟道容纳区和源极区的层。

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