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1. 发明授权

US08592873B2 Semiconductor memory devices and methods of forming the same 有权
标题翻译：半导体存储器件及其形成方法
公开(公告)号：US08592873B2
公开(公告)日：2013-11-26
申请号：US13167858
申请日：2011-06-24
申请人： Jung Ho Kim , Daehyun Jang , Myoungbum Lee , Kihyun Hwang , Sangryol Yang , Yong-Hoon Son , Ju-Eun Kim , Sunghae Lee , Dongwoo Kim , JinGyun Kim
发明人： Jung Ho Kim , Daehyun Jang , Myoungbum Lee , Kihyun Hwang , Sangryol Yang , Yong-Hoon Son , Ju-Eun Kim , Sunghae Lee , Dongwoo Kim , JinGyun Kim
IPC分类号： H01L29/76
CPC分类号： H01L27/11582 , H01L21/02675 , H01L21/30604 , H01L21/324 , H01L27/11551 , H01L27/11578 , H01L29/7926
摘要： Semiconductor devices and methods of forming the same may be provided. The semiconductor devices may include gate patterns and insulation patterns repeatedly and alternatingly stacked on a substrate. The semiconductor devices may also include a through region penetrating the gate patterns and the insulation patterns. The semiconductor devices may further include a channel structure extending from the substrate through the through region. The channel structure may include a first channel pattern having a first shape. The first channel pattern may include a first semiconductor region on a sidewall of a portion of the through region, and a buried pattern dividing the first semiconductor region. The channel structure may also include a second channel pattern having a second shape. The second channel pattern may include a second semiconductor region in the through region. A grain size of the second semiconductor region may be larger than that of the first semiconductor region.
摘要翻译：可以提供半导体器件及其形成方法。半导体器件可以包括在衬底上重复并交替堆叠的栅极图案和绝缘图案。半导体器件还可以包括穿透栅极图案和绝缘图案的穿透区域。半导体器件还可以包括从衬底延伸穿过区域的沟道结构。通道结构可以包括具有第一形状的第一通道图案。第一沟道图案可以包括贯通区域的一部分的侧壁上的第一半导体区域和分割第一半导体区域的掩埋图案。通道结构还可以包括具有第二形状的第二通道图案。第二沟道图案可以包括通孔区域中的第二半导体区域。第二半导体区域的晶粒尺寸可以大于第一半导体区域的晶粒尺寸。

2. 发明授权

US08541831B2 Nonvolatile memory device and method for fabricating the same 有权
标题翻译：非易失性存储器件及其制造方法
公开(公告)号：US08541831B2
公开(公告)日：2013-09-24
申请号：US12592869
申请日：2009-12-03
申请人： Soodoo Chae , Myoungbum Lee , HuiChang Moon , Hansoo Kim , JinGyun Kim , Kihyun Kim , Siyoung Choi , Hoosung Cho
发明人： Soodoo Chae , Myoungbum Lee , HuiChang Moon , Hansoo Kim , JinGyun Kim , Kihyun Kim , Siyoung Choi , Hoosung Cho
IPC分类号： H01L29/792
CPC分类号： H01L27/11582 , H01L23/49844 , H01L23/5226 , H01L23/535 , H01L27/11565 , H01L27/11575 , H01L27/11578 , H01L29/408 , H01L29/4234 , H01L2924/0002 , H01L2924/00
摘要： A three-dimensional nonvolatile memory device and a method for fabricating the same include a semiconductor substrate, a plurality of active pillars, a plurality of gate electrodes, and a plurality of supporters. The semiconductor substrate includes a memory cell region and a contact region. The active pillars extend in the memory cell region perpendicularly to the semiconductor substrate. The gate electrodes intersect the active pillars, extend from the memory cell region to the contact region and are stacked on the semiconductor substrate. The supporters extend in the contact region perpendicularly to the semiconductor substrate to penetrate at least one or more of the gate electrodes.
摘要翻译：三维非易失性存储器件及其制造方法包括半导体衬底，多个有源柱，多个栅电极和多个支撑体。半导体衬底包括存储单元区域和接触区域。活性柱在垂直于半导体衬底的存储单元区域中延伸。栅电极与活性柱相交，从存储单元区延伸到接触区，并且堆叠在半导体衬底上。支撑体在接触区域中垂直于半导体衬底延伸以穿透至少一个或多个栅电极。

3. 发明申请

US20130115761A1 Methods of Forming a Semiconductor Device 有权
标题翻译：形成半导体器件的方法
公开(公告)号：US20130115761A1
公开(公告)日：2013-05-09
申请号：US13724632
申请日：2012-12-21
申请人： Jung Ho Kim , Sunghae Lee , Hanvit Yang , Dongwoo Kim , Chaeho Kim , Daehyun Jang , Ju-Eun Kim , Yong-Hoon Son , Sangryol Yang , Myoungbum Lee , Kihyun Hwang
发明人： Jung Ho Kim , Sunghae Lee , Hanvit Yang , Dongwoo Kim , Chaeho Kim , Daehyun Jang , Ju-Eun Kim , Yong-Hoon Son , Sangryol Yang , Myoungbum Lee , Kihyun Hwang
IPC分类号： H01L21/04
CPC分类号： H01L21/04 , H01L27/11582 , H01L29/66833 , H01L29/7926
摘要： Methods of forming a semiconductor device are provided. The methods may include forming first and second layers that are alternately and repeatedly stacked on a substrate, and forming an opening penetrating the first and second layers. The methods may also include forming a first semiconductor pattern in the opening. The methods may additionally include forming an insulation pattern on the first semiconductor pattern. The methods may further include forming a second semiconductor pattern on the insulation pattern. The methods may also include providing dopants in the first semiconductor pattern. Moreover, the methods may include thermally treating a portion of the first semiconductor pattern to form a third semiconductor pattern.
摘要翻译：提供了形成半导体器件的方法。所述方法可以包括形成在衬底上交替和重复堆叠的第一和第二层，以及形成穿透第一层和第二层的开口。所述方法还可以包括在开口中形成第一半导体图案。所述方法还可以包括在第一半导体图案上形成绝缘图案。所述方法还可以包括在绝缘图案上形成第二半导体图案。所述方法还可以包括在第一半导体图案中提供掺杂剂。此外，所述方法可以包括热处理第一半导体图案的一部分以形成第三半导体图案。

4. 发明申请

US20130005104A1 METHOD FOR FABRICATING NONVOLATILE MEMORY DEVICE 审中-公开
标题翻译：用于制造非易失性存储器件的方法
公开(公告)号：US20130005104A1
公开(公告)日：2013-01-03
申请号：US13615890
申请日：2012-09-14
申请人： ZongLiang HUO , Myoungbum LEE , Kihyun HWANG , Seungmok SHIN , Sunjung KIM
发明人： ZongLiang HUO , Myoungbum LEE , Kihyun HWANG , Seungmok SHIN , Sunjung KIM
IPC分类号： H01L21/336
CPC分类号： H01L27/11578 , H01L27/11551 , H01L27/11556 , H01L29/66825 , H01L29/66833 , H01L29/7883 , H01L29/792 , H01L29/7926
摘要： Provided are a nonvolatile memory device and a method for fabricating the same. The nonvolatile memory device may include a stacked structure, a semiconductor pattern, an information storage layer, and a fixed charge layer. The stacked structure may be disposed over a semiconductor substrate. The stacked structure may include conductive patterns and interlayer dielectric patterns alternately stacked therein. The semiconductor pattern may be connected to the semiconductor substrate by passing through the stacked structure. The information storage layer may be disposed between the semiconductor pattern and the conductive patterns. The fixed charge layer may be disposed between the semiconductor pattern and the interlayer dielectric pattern. The fixed charge layer may include fixed charges. Electrical polarity of the fixed charges may be equal to electrical polarity of majority carriers of the semiconductor pattern.
摘要翻译：提供一种非易失性存储器件及其制造方法。非易失性存储器件可以包括堆叠结构，半导体图案，信息存储层和固定电荷层。堆叠结构可以设置在半导体衬底上。层叠结构可以包括交替堆叠在其中的导电图案和层间电介质图案。半导体图案可以通过层叠结构连接到半导体衬底。信息存储层可以设置在半导体图案和导电图案之间。固定电荷层可以设置在半导体图案和层间电介质图案之间。固定电荷层可以包括固定电荷。固定电荷的电极性可以等于半导体图案的多数载流子的电极性。

5. 发明授权

US08329537B2 Method for fabricating rewritable three-dimensional memory device 有权
标题翻译：可重写三维存储器件的制造方法
公开(公告)号：US08329537B2
公开(公告)日：2012-12-11
申请号：US12816155
申请日：2010-06-15
申请人： JinGyun Kim , Myoungbum Lee
发明人： JinGyun Kim , Myoungbum Lee
IPC分类号： H01L21/336
CPC分类号： H01L21/30 , H01L21/321 , H01L27/11551 , H01L27/11556 , H01L27/11578
摘要： A method for fabricating a three-dimensional semiconductor memory device including three-dimensionally arranged transistors includes forming a thin film structure comprising a plurality of thin films on a semiconductor substrate, patterning the thin film structure such that a penetration region is formed to expose the semiconductor substrate, forming a polycrystalline semiconductor layer to cover the resultant structure where the penetration region is formed, patterning the semiconductor layer to locally form a semiconductor pattern within the penetration region, and performing a post-treatment process to treat the semiconductor layer or the semiconductor pattern with a post-treatment material containing hydrogen or deuterium.
摘要翻译：一种制造包括三维布置晶体管的三维半导体存储器件的方法，包括在半导体衬底上形成包括多个薄膜的薄膜结构，对薄膜结构进行图案化，以形成穿透区域以使半导体基板，形成多晶半导体层以覆盖其中形成穿透区域的结构，图案化半导体层以在穿透区域内局部形成半导体图案，并执行后处理工艺以处理半导体层或半导体图案含有氢或氘的后处理材料。

6. 发明申请

US20110248327A1 Three-Dimensional Semiconductor Memory Devices and Methods of Forming the Same 审中-公开
标题翻译：三维半导体存储器件及其形成方法
公开(公告)号：US20110248327A1
公开(公告)日：2011-10-13
申请号：US13039043
申请日：2011-03-02
申请人： Yong-Hoon Son , Myoungbum Lee , Kihyun Hwang , Seungjae Baik , Jung Ho Kim
发明人： Yong-Hoon Son , Myoungbum Lee , Kihyun Hwang , Seungjae Baik , Jung Ho Kim
IPC分类号： H01L27/115
CPC分类号： H01L27/11551 , H01L27/11556 , H01L27/1157 , H01L27/11578 , H01L27/11582
摘要： Nonvolatile memory devices include a string of nonvolatile memory cells on a substrate. This string of nonvolatile memory cells includes a first vertical stack of nonvolatile memory cells on the substrate and a string selection transistor on the first vertical stack of nonvolatile memory cells. A second vertical stack of nonvolatile memory cells is also provided on the substrate and a ground selection transistor is provided on the second vertical stack of nonvolatile memory cells. This second vertical stack of nonvolatile memory cells is provided adjacent the first vertical stack of nonvolatile memory cells. A conjunction doped semiconductor region is provided in the substrate. This conjunction doped region electrically connects the first vertical stack of nonvolatile memory cells in series with the second vertical stack of nonvolatile memory cells so that these stacks can operate as a single NAND-type string of memory cells.
摘要翻译：非易失性存储器件包括在衬底上的一串非易失性存储器单元。这一串非易失性存储单元包括衬底上的非易失性存储单元的第一垂直堆叠和非易失性存储单元的第一垂直堆叠上的串选择晶体管。第二垂直堆叠的非易失性存储单元也设置在衬底上，并且在非易失性存储单元的第二垂直堆叠上提供接地选择晶体管。非易失性存储单元的第二垂直堆叠被提供为与非易失性存储单元的第一垂直堆叠相邻。在衬底中提供连接掺杂半导体区域。该连接掺杂区域将非易失性存储器单元的第一垂直堆叠与第二垂直堆叠的非易失性存储器单元电连接，使得这些堆叠可以作为单个NAND型存储器单元串工作。

7. 发明申请

US20170301690A1 NONVOLATILE MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME 审中-公开
公开(公告)号：US20170301690A1
公开(公告)日：2017-10-19
申请号：US15634597
申请日：2017-06-27
申请人： Soodoo Chae , Myoungbum Lee , HuiChang Moon , Hansoo Kim , JinGyun Kim , Kihyun Kim , Siyoung Choi , Hoosung Cho
发明人： Soodoo Chae , Myoungbum Lee , HuiChang Moon , Hansoo Kim , JinGyun Kim , Kihyun Kim , Siyoung Choi , Hoosung Cho
IPC分类号： H01L27/115 , H01L23/522
摘要： A three-dimensional nonvolatile memory device and a method for fabricating the same include a semiconductor substrate, a plurality of active pillars, a plurality of gate electrodes, and a plurality of supporters. The semiconductor substrate includes a memory cell region and a contact region. The active pillars extend in the memory cell region perpendicularly to the semiconductor substrate. The gate electrodes intersect the active pillars, extend from the memory cell region to the contact region and are stacked on the semiconductor substrate. The supporters extend in the contact region perpendicularly to the semiconductor substrate to penetrate at least one or more of the gate electrodes.

8. 发明申请

US20160197086A1 SEMICONDUCTOR DEVICE 审中-公开
标题翻译：半导体器件
公开(公告)号：US20160197086A1
公开(公告)日：2016-07-07
申请号：US15070247
申请日：2016-03-15
申请人： JinGyun KIM , Myoungbum LEE , Seungmok SHIN
发明人： JinGyun KIM , Myoungbum LEE , Seungmok SHIN
IPC分类号： H01L27/115 , H01L23/522
CPC分类号： H01L27/1157 , H01L21/28282 , H01L23/5226 , H01L27/11521 , H01L27/11556 , H01L27/11568 , H01L27/11582 , H01L29/66825 , H01L29/66833 , H01L29/7881 , H01L29/792 , H01L29/7926 , H01L2924/0002 , H01L2924/00
摘要： A method of fabricating a semiconductor device including forming a charge storage layer, and forming a first tunnel insulating layer covering the charge storage layer, the forming of the first tunnel insulating layer including heat treating the charge storage layer.
摘要翻译：一种制造半导体器件的方法，包括形成电荷存储层，以及形成覆盖电荷存储层的第一隧道绝缘层，形成包括对电荷存储层进行热处理的第一隧道绝缘层。

9. 发明授权

US08883611B2 Methods of fabricating semiconductor devices having air gaps in dielectric layers 有权
标题翻译：制造在电介质层中具有气隙的半导体器件的方法
公开(公告)号：US08883611B2
公开(公告)日：2014-11-11
申请号：US13599844
申请日：2012-08-30
申请人： Bo-Young Lee , Jongwan Choi , Myoungbum Lee
发明人： Bo-Young Lee , Jongwan Choi , Myoungbum Lee
IPC分类号： H01L21/76 , H01L27/115 , H01L21/764 , H01L21/762
CPC分类号： H01L27/11582 , H01L21/76229 , H01L21/764 , H01L23/528 , H01L23/5329 , H01L27/11524 , H01L27/11556 , H01L27/1157 , H01L2924/0002 , H01L2924/00
摘要： Semiconductor devices, and methods of fabricating the same, include forming a trench between a plurality of patterns on a substrate to be adjacent to each other, forming a first sacrificial layer in the trench, forming a first porous insulation layer having a plurality of pores on the plurality of patterns and on the first sacrificial layer, and removing the first sacrificial layer through the plurality of pores of the first porous insulation layer to form a first air gap between the plurality of patterns and under the first porous insulation layer.
摘要翻译：半导体器件及其制造方法包括在彼此相邻的衬底上的多个图案之间形成沟槽，在沟槽中形成第一牺牲层，形成具有多个孔的第一多孔绝缘层所述多个图案和所述第一牺牲层上，并且通过所述第一多孔绝缘层的所述多个孔去除所述第一牺牲层，以在所述多个图案之间和所述第一多孔绝缘层下方形成第一气隙。

10. 发明申请

US20140015128A1 NONVOLATILE MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME 有权
标题翻译：非易失性存储器件及其制造方法
公开(公告)号：US20140015128A1
公开(公告)日：2014-01-16
申请号：US14027599
申请日：2013-09-16
申请人： Soodoo Chae , Myoungbum Lee , HuiChang Moon , Hansoo Kim , JinGyun Kim , Kihyun Kim , Siyoung Choi , Hoosung Cho
发明人： Soodoo Chae , Myoungbum Lee , HuiChang Moon , Hansoo Kim , JinGyun Kim , Kihyun Kim , Siyoung Choi , Hoosung Cho
IPC分类号： H01L23/498
CPC分类号： H01L27/11582 , H01L23/49844 , H01L23/5226 , H01L23/535 , H01L27/11565 , H01L27/11575 , H01L27/11578 , H01L29/408 , H01L29/4234 , H01L2924/0002 , H01L2924/00
摘要： A three-dimensional nonvolatile memory device and a method for fabricating the same include a semiconductor substrate, a plurality of active pillars, a plurality of gate electrodes, and a plurality of supporters. The semiconductor substrate includes a memory cell region and a contact region. The active pillars extend in the memory cell region perpendicularly to the semiconductor substrate. The gate electrodes intersect the active pillars, extend from the memory cell region to the contact region and are stacked on the semiconductor substrate. The supporters extend in the contact region perpendicularly to the semiconductor substrate to penetrate at least one or more of the gate electrodes.
摘要翻译：三维非易失性存储器件及其制造方法包括半导体衬底，多个有源柱，多个栅电极和多个支撑体。半导体衬底包括存储单元区域和接触区域。活性柱在垂直于半导体衬底的存储单元区域中延伸。栅电极与有源支柱相交，从存储单元区延伸到接触区，并堆叠在半导体衬底上。支撑体在接触区域中垂直于半导体衬底延伸以穿透至少一个或多个栅电极。

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