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1. 发明授权

US06180491B2 Isolation structure and method 有权
标题翻译：隔离结构与方法
公开(公告)号：US06180491B2
公开(公告)日：2001-01-30
申请号：US09335096
申请日：1999-06-17
申请人： Keith A. Joyner , Lee M. Loewenstein
发明人： Keith A. Joyner , Lee M. Loewenstein
IPC分类号： H01L2176
CPC分类号： H01L21/823878 , H01L21/76224
摘要： An isolation structure is provided that includes a substrate (10), a refill material such as a refill oxide (22), a gate dielectric such as a gate oxide layer (24), and a gate conductor layer such a polysilicon gate layer (26). The substrate (10) has an active region (12), an active region (14), and a trench region provided between the active region (12) and the active region (14). The active region (14) includes a top corner (32) that is provided where an upper surface of the active region (14) and the trench wall of the trench region that is adjacent to the active region (14) meet. The refill oxide (22) is positioned within the trench region and extends to cover at least a portion of the top corner. The gate oxide layer (24) is provided on the upper surface of the active region (14). The polysilicon gate layer (26) is provided on an upper surface of the gate oxide layer (24).
摘要翻译：提供了一种隔离结构，其包括衬底（10），诸如填充氧化物（22）的补充材料，诸如栅极氧化物层（24）的栅极电介质，以及诸如多晶硅栅极层（26）的栅极导体层）。衬底（10）具有有源区（12），有源区（14）和设置在有源区（12）和有源区（14）之间的沟槽区。有源区域（14）包括顶角（32），其设置在有源区域（14）的上表面和与有源区域（14）相邻的沟槽区域的沟槽壁相交处的位置。再填充氧化物（22）位于沟槽区域内并延伸以覆盖顶角的至少一部分。栅极氧化物层（24）设置在有源区域（14）的上表面上。多晶硅栅极层（26）设置在栅极氧化物层（24）的上表面上。

2. 发明授权

US6114741A Trench isolation of a CMOS structure 失效
标题翻译： CMOS结构的沟槽隔离
公开(公告)号：US6114741A
公开(公告)日：2000-09-05
申请号：US987226
申请日：1997-12-09
申请人： Keith A. Joyner , Lee M. Loewenstein
发明人： Keith A. Joyner , Lee M. Loewenstein
IPC分类号： H01L21/762 , H01L21/8238 , H01L21/20
CPC分类号： H01L21/823878 , H01L21/76224
摘要： An isolation structure is provided that includes a substrate (10), a refill material such as a refill oxide (22), a gate dielectric such as a gate oxide layer (24), and a gate conductor layer such a polysilicon gate layer (26). The substrate (10) has an active region (12), an active region (14), and a trench region provided between the active region (12) and the active region (14). The active region (14) includes a top corner (32) that is provided where an upper surface of the active region (14) and the trench wall of the trench region that is adjacent to the active region (14) meet. The refill oxide (22) is positioned within the trench region and extends to cover at least a portion of the top corner. The gate oxide layer (24) is provided on the upper surface of the active region (14). The polysilicon gate layer (26) is provided on an upper surface of the gate oxide layer (24).
摘要翻译：提供了一种隔离结构，其包括衬底（10），诸如填充氧化物（22）的补充材料，诸如栅极氧化物层（24）的栅极电介质，以及诸如多晶硅栅极层（26）的栅极导体层）。衬底（10）具有有源区（12），有源区（14）和设置在有源区（12）和有源区（14）之间的沟槽区。有源区域（14）包括顶角（32），其设置在有源区域（14）的上表面和与有源区域（14）相邻的沟槽区域的沟槽壁相交处的位置。再填充氧化物（22）位于沟槽区域内并延伸以覆盖顶角的至少一部分。栅极氧化物层（24）设置在有源区域（14）的上表面上。多晶硅栅极层（26）设置在栅极氧化物层（24）的上表面上。

3. 发明授权

US5741396A Isotropic nitride stripping 失效
标题翻译：各向同性氮化物剥离
公开(公告)号：US5741396A
公开(公告)日：1998-04-21
申请号：US235819
申请日：1994-04-29
申请人： Lee M. Loewenstein
发明人： Lee M. Loewenstein
IPC分类号： H01L21/00 , H01L21/311 , H01L21/3213 , H01L21/762
CPC分类号： H01L21/67069 , H01L21/31116 , H01L21/32136 , H01L21/32137 , H01L21/76205
摘要： A dry etch process for stripping LOCOS nitride masks (302) with fluorine based removal of oxynitride (312) followed by fluorine plus chlorine based removal of nitride (302) and any silicon buffer layer (303) without removal of pad oxide (304).
摘要翻译：一种用于以氟去除氧氮化物（312）去除LOCOS氮化物掩模（302）的干蚀刻工艺，随后除去氮氧化物（302）和任何硅缓冲层（303）而不去除衬垫氧化物（304）。

4. 发明授权

US5102231A Semiconductor wafer temperature measurement system and method 失效
标题翻译：半导体晶圆温度测量系统及方法
公开(公告)号：US5102231A
公开(公告)日：1992-04-07
申请号：US647085
申请日：1991-01-29
申请人： Lee M. Loewenstein , John D. Lawrence , Wayne G. Fisher , Cecil J. Davis
发明人： Lee M. Loewenstein , John D. Lawrence , Wayne G. Fisher , Cecil J. Davis
IPC分类号： G01K5/52
CPC分类号： G01K5/52
摘要： A system for measuring the temperature of a semiconductor wafer 12 comprises a light source 14, a photodetector 20 which is operable to determine light intensity, and a mirror 18 in a predetermined fixed position from a beam splitter 16. The components are positioned such that light from the light source 14 impinges the beam splitter 16 and subsequently reflects off the mirror 18 and the wafer 12 and is received by the photodetector 20. Changes in the temperature of the wafer 12 are calculated based upon changes in the intensity of the received light which depends upon the expansion/contraction of the wafer. The absolute temperature may be calculated based on a known reference temperature and the changes in wafer 12 temperature. A second system and method for measuring the temperature of a semiconductor wafer which includes the use of a plurality of mirrors and two beam splitters is also disclosed.
摘要翻译：用于测量半导体晶片12的温度的系统包括光源14，可操作以确定光强度的光电检测器20和来自分束器16的预定固定位置的反射镜18.部件被定位成使得光从光源14入射分束器16，随后从反射镜18和晶片12反射并被光电检测器20接收。晶片12的温度变化基于接收光强度的变化来计算，取决于晶片的膨胀/收缩。可以基于已知的参考温度和晶片12温度的变化来计算绝对温度。还公开了一种用于测量包括使用多个反射镜和两个分束器的半导体晶片的温度的第二系统和方法。

5. 发明授权

US5101764A Method and apparatus for integrating optical sensor into processor 失效
标题翻译：将光学传感器集成到处理器中的方法和装置
公开(公告)号：US5101764A
公开(公告)日：1992-04-07
申请号：US658121
申请日：1991-02-20
申请人： Lee M. Loewenstein , Thomas E. Tang , Ming Hwang , Steve S. Huang , Rachelle Bienstock
发明人： Lee M. Loewenstein , Thomas E. Tang , Ming Hwang , Steve S. Huang , Rachelle Bienstock
IPC分类号： G01B11/00 , G01J5/04 , H01L21/00
CPC分类号： G01J5/0003 , G01B11/00 , G01J5/0007 , G01J5/04 , G01J5/08 , G01J5/0818 , G01J5/0875 , H01L21/67253
摘要： A method and apparatus for sensing radiation 26 indicative of at least one process variable in a semiconductor process chamber 10 in which a reactant gas reacts to effect changes in a silicon wafer 12. The method comprises positioning a substantially transparent window 22 in a conduit 14 leading to the wafer 12 and then flowing the reactant gas in the conduit 14 past the window 22 and toward the wafer 12. The radiation 26 is then sensed through the window 22. In the preferred embodiment the window 22 is positioned with an optical path along the center axis of the conduit 14. Other systems and methods are also disclosed.
摘要翻译：一种用于感测辐射26的方法和装置，其指示半导体处理室10中的至少一个过程变量，其中反应气体反应以影响硅晶片12的变化。该方法包括将基本上透明的窗口22定位在导管14中然后使导管14中的反应气体流过窗口22并朝向晶片12.然后通过窗口22感测辐射26.在优选实施例中，窗口22定位成沿着还公开了其他系统和方法。

6. 发明授权

US4882008A Dry development of photoresist 失效
标题翻译：光刻胶的干燥发展
公开(公告)号：US4882008A
公开(公告)日：1989-11-21
申请号：US216884
申请日：1988-07-08
申请人： Cesar M. Garza , Monte A. Douglas , Lee M. Loewenstein , Cecil J. Davis
发明人： Cesar M. Garza , Monte A. Douglas , Lee M. Loewenstein , Cecil J. Davis
IPC分类号： G03F7/26 , H01L21/311
CPC分类号： H01L21/31138 , G03F7/265
摘要： A process for developing a photolithographic pattern on the surface of an exposed workpiece in a process chamber; disposing the workpiece in a process chamber; heating the workpiece and introducing a silylating agent to the process chamber and to a face of the workpiece to be processed; generating activated species from a source of oxygen; and introducing the activated species to the face of the workpiece.
摘要翻译：一种用于在处理室中暴露的工件的表面上显影光刻图案的工艺; 将工件放置在处理室中; 加热工件并将甲硅烷基化剂引入处理室和待加工的工件的表面; 从氧源产生活化物质; 并将活化物质引入到工件的表面。

7. 发明授权

US4875989A Wafer processing apparatus 失效
标题翻译：晶圆加工设备
公开(公告)号：US4875989A
公开(公告)日：1989-10-24
申请号：US283036
申请日：1988-12-05
申请人： Cecil J. Davis , Robert T. Matthews , Lee M. Loewenstein , Joe V. Abernathy , Timothy A. Wooldridge
发明人： Cecil J. Davis , Robert T. Matthews , Lee M. Loewenstein , Joe V. Abernathy , Timothy A. Wooldridge
IPC分类号： G03F7/16 , H01L21/00
CPC分类号： H01L21/67017 , G03F7/168
摘要： A processing apparatus and method for edge-preferential processing of partially fabricated integrated circuit wafers or of other substantially flat and thin workpieces. A plasma remote from the workpiece is used to generate activated species, and a baffle which is in proximity to the wafer face but not in contact with it is used to direct the stream of activated species. This module can be set up to perform both edge bead removal and bake of spun-on photoresist.
摘要翻译：一种用于部分制造的集成电路晶片或其它基本上平坦和薄的工件的边缘优先处理的处理装置和方法。使用远离工件的等离子体产生活化物质，并且靠近晶片表面而不与其接触的挡板用于引导活化物质流。该模块可以设置为执行旋转光刻胶的边缘珠去除和烘烤。

8. 发明授权

US4857140A Method for etching silicon nitride 失效
标题翻译：蚀刻氮化硅的方法
公开(公告)号：US4857140A
公开(公告)日：1989-08-15
申请号：US175474
申请日：1988-03-31
申请人： Lee M. Loewenstein
发明人： Lee M. Loewenstein
IPC分类号： H01L21/311
CPC分类号： H01L21/31116
摘要： A process for etching silicon nitride which utilizes free radicals from a remote plasma generated using a fluorine containing gas; and hydrogen; to produce an etch which is selective to selected materials, for example, silicon and silicon dioxide.
摘要翻译：一种利用利用含氟气体产生的远程等离子体的自由基来蚀刻氮化硅的方法; 和氢; 以产生对所选择的材料（例如硅和二氧化硅）具有选择性的蚀刻。

9. 发明授权

US4842686A Wafer processing apparatus and method 失效
标题翻译：晶圆加工设备及方法
公开(公告)号：US4842686A
公开(公告)日：1989-06-27
申请号：US75016
申请日：1987-07-17
申请人： Cecil J. Davis , Lee M. Loewenstein , Robert T. Matthews , John I. Jones , Rhett B. Jucha
发明人： Cecil J. Davis , Lee M. Loewenstein , Robert T. Matthews , John I. Jones , Rhett B. Jucha
IPC分类号： H01L21/302 , C23C16/48 , C23C16/517 , C23C16/54 , G03F7/20 , H01L21/027 , H01L21/3065 , H01L21/31 , H01L21/677
CPC分类号： G03F7/70808 , C23C16/482 , C23C16/517 , C23C16/54 , G03F7/70866
摘要： A plasma reactor with in situ ultraviolet generation processing aparatus and method. Ultraviolet light to illuminate the face of a wafer being processed is generated by a plasma which is within the vacuum processing chamber but is remote from the face of the wafer. It is useful to design the gas flow system so that the ultraviolet-generating plasma has its own gas feed, and the reaction products from the ultraviolet-generating plasma do not substantially flow or diffuse to the wafer face. A transparent isolator between the ultraviolet plasma space and the processing space near the wafer face is useful so that the ultraviolet plasma can be operated at a vacuum level slightly different from that used near the wafer face, but this transparent window is not made thick enough to act as a full vacuum seal. Optionally, this window may be omitted entirely.

10. 发明授权

US4820378A Process for etching silicon nitride selectively to silicon oxide 失效
标题翻译：将氮化硅选择性地蚀刻到氧化硅的工艺
公开(公告)号：US4820378A
公开(公告)日：1989-04-11
申请号：US75017
申请日：1987-07-17
申请人： Lee M. Loewenstein
发明人： Lee M. Loewenstein
IPC分类号： H01L21/311 , B44C1/22 , C03C15/00 , C03C25/06
CPC分类号： H01L21/31116
摘要： A process for etching silicon nitride which is selective to silicon oxide with a vacuum processing module which has a remote plasma, which is generated form a gas including He and SF.sub.6, introduced to the wafer face.
摘要翻译：一种用真空处理模块对氧化硅进行选择性蚀刻的氮化硅的方法，该真空处理模块具有从包括He和SF6的气体产生的远程等离子体，该气体被引入晶片面。

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