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1. 发明授权

US09270458B2 Encryption processing device, encryption processing method, and program 有权
标题翻译：加密处理装置，加密处理方法和程序
公开(公告)号：US09270458B2
公开(公告)日：2016-02-23
申请号：US14002462
申请日：2012-02-20
申请人： Kyoji Shibutani , Atsushi Mitsuda , Toru Akishita , Takanori Isobe , Taizo Shirai , Harunaga Hiwatari
发明人： Kyoji Shibutani , Atsushi Mitsuda , Toru Akishita , Takanori Isobe , Taizo Shirai , Harunaga Hiwatari
IPC分类号： H04L9/08 , G09C1/00 , H04L9/00 , H04L9/06
CPC分类号： H04L9/0894 , G09C1/00 , H04L9/002 , H04L9/0625 , H04L2209/24
摘要： An encryption processing device including an encryption processing part configured to divide configuration bits of data to be data processed into plural lines, and to input, and to repeatedly execute data conversion processing applying a round function to each line of data as a round calculation; and a key scheduling part configured to output round keys to a round calculation executing unit in the encryption processing part. The key scheduling part is a replacement type key scheduling part configured to generate plural round keys or round key configuration data by dividing a secret key stored beforehand into plural parts. The plural round keys are output to a round calculation executing unit sequentially executing in the encryption processing part such that a constant sequence is not repeated. The encryption processing configuration has a high level of security and a high level of resistance to repeated key attacks or other attacks.
摘要翻译：一种加密处理装置，包括：加密处理部，被配置为将要处理的数据的数据的配置位分割成多条线，并输入，并且重复执行向每行数据应用循环函数的数据转换处理作为循环计算; 以及密钥调度部，被配置为向所述加密处理部中的舍入运算执行部输出循环密钥。密钥调度部是通过将预先存储的秘密密钥划分为多个部分而构成为生成多个循环密钥或循环密钥配置数据的替换型密钥调度部。多个循环密钥被输出到在加密处理部分中顺序执行的循环计算执行单元，使得不重复常数序列。加密处理配置具有高水平的安全性和对重复的密钥攻击或其他攻击的高水平的抵抗。

2. 发明授权

US08983062B2 Encryption processing device, encryption processing method, and programme 有权
标题翻译：加密处理装置，加密处理方法和程序
公开(公告)号：US08983062B2
公开(公告)日：2015-03-17
申请号：US14005663
申请日：2012-02-20
申请人： Kyoji Shibutani , Toru Akishita , Takanori Isobe , Taizo Shirai , Harunaga Hiwatari , Atsushi Mitsuda
发明人： Kyoji Shibutani , Toru Akishita , Takanori Isobe , Taizo Shirai , Harunaga Hiwatari , Atsushi Mitsuda
IPC分类号： G06F21/00 , H04L9/28 , H04L9/06 , G09C1/00
CPC分类号： H04L9/28 , G09C1/00 , H04L9/0625 , H04L2209/24
摘要： A cryptographic processing unit divides and inputs constituent bits of data to be subjected to data processing to lines, and repeatedly performs a data converting operation using round functions on the data of the respective lines. The cryptographic processing unit inputs n/d-bit data obtained by dividing n-bit data as input data by a division number d to each line, and repeatedly performs a round calculation including a data converting operation using round functions. The n/d-bit data in each line having output data of the round calculations is divided into d/2 sets of data, and the divided data are combined to restructure d sets of n/d-bit data that are different from the output data of the round calculations of the previous stage. The restructured data is set as input data for round calculations of the next stage. The cryptographic processing realizes improved diffusion properties and a high level of security.
摘要翻译：密码处理单元将要进行数据处理的数据的构成比特划分成行，并且对各行的数据重复执行使用循环函数的数据转换操作。密码处理单元输入通过将n位数据作为输入数据划分为每行的分割数d而获得的n / d位数据，并且重复执行包括使用循环函数的数据转换操作的循环计算。具有循环计算的输出数据的每行中的n / d位数据被分成d / 2组数据，并且分割的数据被组合以重组与输出不同的d组n / d位数据前一阶段的回合计算数据。重构的数据被设置为用于下一阶段的循环计算的输入数据。加密处理实现了改进的扩散特性和高水平的安全性。

3. 发明授权

US08787563B2 Data converter, data conversion method and program 有权
标题翻译：数据转换器，数据转换方法和程序
公开(公告)号：US08787563B2
公开(公告)日：2014-07-22
申请号：US13059641
申请日：2009-08-25
申请人： Taizo Shirai , Kyoji Shibutani , Shiho Moriai , Toru Akishita , Tetsu Iwata
发明人： Taizo Shirai , Kyoji Shibutani , Shiho Moriai , Toru Akishita , Tetsu Iwata
IPC分类号： H04K1/00 , H04L9/00 , H04L9/28 , H04L9/06
CPC分类号： H04L9/0643 , H04L9/0637 , H04L2209/122 , H04L2209/125 , H04L2209/20 , H04L2209/30
摘要： A data converter for generating a hash value for message data is disclosed. The data converter executes a data conversion process, which includes compression-function execution sections and process sequences in which divided data blocks constituting message data are processed in parallel. Each compression-function execution section performs a process, using a message scheduling section and a chaining variable processing section. The message scheduling section receives a corresponding divided data block of the message data and performs a message scheduling process. The chaining variable processing section receives an output from the message scheduling section and an intermediate value output from a preceding processing section, and generates output data, which has the same number of bits as in the intermediate value. The compression-function execution sections may use one or more message scheduling sections and chaining variable processing sections.
摘要翻译：公开了一种用于生成消息数据的散列值的数据转换器。数据转换器执行数据转换处理，其包括压缩函数执行部分和处理序列，其中构成消息数据的分割数据块被并行处理。每个压缩函数执行部分使用消息调度部分和链接变量处理部分执行处理。消息调度部接收消息数据的对应的分割数据块，进行消息调度处理。链接变量处理部接收消息调度部的输出和从前一处理部输出的中间值，生成与中间值相同位数的输出数据。压缩函数执行部分可以使用一个或多个消息调度部分和链接可变处理部分。

4. 发明授权

US08379843B2 Data converter, data conversion method, and computer program 有权
标题翻译：数据转换器，数据转换方法和计算机程序
公开(公告)号：US08379843B2
公开(公告)日：2013-02-19
申请号：US12812903
申请日：2009-01-21
申请人： Talzo Shirai , Kyoji Shibutani , Shiho Moriai , Toru Akishita , Tetsu Iwata
发明人： Talzo Shirai , Kyoji Shibutani , Shiho Moriai , Toru Akishita , Tetsu Iwata
IPC分类号： H04L9/00
CPC分类号： H04L9/28 , G09C1/00 , H04L9/0625 , H04L9/0631 , H04L2209/122
摘要： A data conversion algorithm achieving efficient data diffusion is achieved. For example, in a configuration where a various processes are executed on two data segments which are resultants of dividing a rectangular matrix of data containing arranged one-byte data blocks into two parts to perform data conversion, efficient data scrambling with less operation cost is achieved by executing a linear conversion process on one of the data segments, an exclusive OR operation between the two data segments, a shift process on one of the data segments, and a swap process between the two data segments. Moreover, cryptographic processing with a high security level is achieved by including nonlinear conversion or key application operation on the data segments.
摘要翻译：实现了实现有效数据扩散的数据转换算法。例如，在将包含排列1字节的数据块的数据的矩形矩阵分割成两部分进行数据转换的两个数据段执行各种处理的结构中，实现了以较少的运算成本的有效数据加扰通过对数据段之一执行线性转换处理，在两个数据段之间进行异或运算，对数据段之一进行移位处理，以及两个数据段之间的交换处理。此外，通过在数据段上包括非线性转换或密钥应用操作来实现具有高安全级别的密码处理。

5. 发明授权

US08205075B2 Authentication device and method 失效
标题翻译：验证设备和方法
公开(公告)号：US08205075B2
公开(公告)日：2012-06-19
申请号：US11596022
申请日：2005-03-23
申请人： Shiho Moriai , Muneki Shimada , Kyoji Shibutani
发明人： Shiho Moriai , Muneki Shimada , Kyoji Shibutani
IPC分类号： G06F21/00
CPC分类号： G06F21/64 , H04L9/14 , H04L9/3236
摘要： Provided is an authentication system capable of identifying a cause of a failure when authentication fails. A data structure of data to be authenticated has a header authentication data area (D2), and an authentication data area (D4) in addition to a header area (D1) and a data area (D3). The header authentication data area (D2) authenticates validity of the header area (D1), and the authentication data area (D4) authenticates the validity of the header authentication header area (D2) and the data area (D3). Since two kinds of authentication are carried out, the cause of the failure in authentication can be identified easily when authentication is failed.
摘要翻译：提供了一种当认证失败时能够识别故障原因的认证系统。除了标题区域（D1）和数据区域（D3）之外，要认证的数据的数据结构具有标题认证数据区域（D2）和认证数据区域（D4）。标题认证数据区域（D2）对标题区域（D1）的有效性进行认证，认证数据区域（D4）验证标题认证报头区域（D2）和数据区域（D3）的有效性。由于执行了两种认证，因此认证失败时可以容易地识别认证失败的原因。

6. 发明申请

US20110293089A1 Cryptographic Processing Apparatus and Cryptographic Processing Method, and Computer Program 有权
标题翻译：加密处理装置和加密处理方法以及计算机程序
公开(公告)号：US20110293089A1
公开(公告)日：2011-12-01
申请号：US13206803
申请日：2011-08-10
申请人： Taizo Shirai , Kyoji Shibutani
发明人： Taizo Shirai , Kyoji Shibutani
IPC分类号： H04L9/06
CPC分类号： H04L9/06 , H04L9/002 , H04L9/0625 , H04L2209/122
摘要： There is provided a highly secure cryptographic processing apparatus and method where an analysis difficulty is increased. In a Feistel type common key block encrypting process in which an SPN type F function having a nonlinear conversion section and a linear conversion section is repeatedly executed a plurality of rounds. The linear conversion process of an F function corresponding to each of the plurality of rounds is performed as a linear conversion process which employs an MDS (Maximum Distance Separable) matrix, and a linear conversion process is carried out which employs a different MDS matrix at least at each of consecutive odd number rounds and consecutive even number rounds. This structure makes it possible to increase the minimum number (a robustness index against a differential attack in common key block encryption) of the active S box in the entire encrypting function.
摘要翻译：提供了一种高度安全的加密处理装置和方法，其中分析难度增加。在其中具有非线性转换部分和线性转换部分的SPN型F函数被重复执行多次的Feistel型公共密钥块加密处理中。执行与多个轮次中的每一个对应的F函数的线性转换处理作为采用MDS（最大距离可分离）矩阵的线性转换处理，并且执行线性转换处理，其至少采用不同的MDS矩阵在连续的奇数轮和连续偶数轮中的每一个。该结构使得可以增加整个加密功能中的活动S盒的最小数量（针对公共密钥块加密中的差分攻击的鲁棒性指数）。

7. 发明申请

US20100104093A1 Encryption Processing Apparatus, Encryption Processing Method, and Computer Program 有权
标题翻译：加密处理装置，加密处理方法和计算机程序
公开(公告)号：US20100104093A1
公开(公告)日：2010-04-29
申请号：US12439464
申请日：2007-08-29
申请人： Taizo Shirai , Kyoji Shibutani , Toru Akishita , Shiho Moriai
发明人： Taizo Shirai , Kyoji Shibutani , Toru Akishita , Shiho Moriai
IPC分类号： H04L9/28
CPC分类号： H04L9/0625 , G09C1/00 , H04L9/002 , H04L9/0631 , H04L2209/122 , H04L2209/125
摘要： A common-key blockcipher processing configuration with enhanced immunity against attacks such as saturation attacks and algebraic attacks (XSL attacks) is realized. In an encryption processing apparatus that performs common-key blockcipher processing, S-boxes serving as non-linear transformation processing parts set in round-function executing parts are configured using at least two different types of S-boxes. With this configuration, the immunity against saturation attacks can be enhanced. Also, types of S-boxes present a mixture of different types. With this configuration, the immunity against algebraic attacks (XSL attacks) can be enhanced, thereby realizing a highly secure encryption processing apparatus.
摘要翻译：实现了具有针对诸如饱和攻击和代数攻击（XSL攻击）等攻击的增强免疫性的通用密钥块密码处理配置。在执行共同密钥块密码处理的加密处理装置中，使用至少两种不同类型的S盒来配置用作在循环功能执行部分中设置的非线性变换处理部分的S盒。通过这种配置，可以提高对饱和攻击的抗扰度。而且，S盒的类型是不同类型的混合物。利用这种配置，可以增强对代数攻击（XSL攻击）的抗扰度，从而实现高度安全的加密处理装置。

8. 发明申请

US20100014664A1 Cryptographic Processing Apparatus, Cryptographic Processing Method, and Computer Program 有权
标题翻译：加密处理装置，加密处理方法和计算机程序
公开(公告)号：US20100014664A1
公开(公告)日：2010-01-21
申请号：US12518510
申请日：2007-11-21
申请人： Taizo Shirai , Kyoji Shibutani , Toru Akishita , Shiho Moriai
发明人： Taizo Shirai , Kyoji Shibutani , Toru Akishita , Shiho Moriai
IPC分类号： H04L9/00 , H04L9/28
CPC分类号： H04L9/003 , H04L9/0618
摘要： To realize a common-key block cipher process configuration with increased difficulty of key analysis and improved security. In a configuration for storing in a register an intermediate key generated by using a secret key transformation process and performing a transformation process on the register-stored data to generate a round key, a process of swapping (permuting) data segments constituting the register-stored data is executed to generate a round key. For example, four data segments are produced so that two sets of data segments having an equal number of bits are set, and a process of swapping the individual data segments is repeatedly executed to generate a plurality of different round keys. With this configuration, the bit array of each round key can be effectively permuted, and round keys with low relevance can be generated. A high-security cryptographic process with increased difficulty of key analysis can be realized.
摘要翻译：实现密钥分析难度更大，安全性提高的共密密钥密码过程配置。在用于在寄存器中存储通过使用秘密密钥变换处理生成的中间密钥并对寄存器存储的数据执行变换处理以生成循环密钥的配置中，构成寄存器存储的数据段的交换（置换）处理执行数据以生成圆键。例如，产生四个数据段，使得设置具有相等位数的两组数据段，并重复执行交换各个数据段的处理，以生成多个不同的循环密钥。通过这种配置，可以有效地排列每个循环密钥的位阵列，并且可以生成具有低相关性的循环密钥。可以实现密钥分析难度增加的高安全密码过程。

9. 发明申请

US20090010425A1 ENCRYPTION/DECRYPTION DEVICE, ENCRYPTION/DECRYPTION DEVICE MANUFACTURING DEVICE, AND METHOD, AND COMPUTER PROGRAM 审中-公开
标题翻译：加密/分解设备，加密/分解设备制造设备，方法和计算机程序
公开(公告)号：US20090010425A1
公开(公告)日：2009-01-08
申请号：US12161898
申请日：2007-01-04
申请人： Kyoji Shibutani , Taizo Shirai
发明人： Kyoji Shibutani , Taizo Shirai
IPC分类号： H04L9/28
CPC分类号： H04L9/0625 , H04L9/002 , H04L2209/12
摘要： A Feistel type common key block cipher process configuration capable of maintaining the involution property and safety and easily changing the number of rounds is realized. The Feistel type cipher process configuration having an SP type F function which includes a nonlinear conversion section and a linear conversion section configures an n-round basic unit which has a matrix arrangement satisfying involution property and ODM-MR or SDM-MR which is a preset F function arrangement condition. For this unit, an F function satisfying the arrangement condition of the F function is selected and added or a plurality of basic units are connected so as to constitute the Feistel cipher configuration having an increased number of rounds having the arrangement satisfying the involution property and the ODM-MR or the SDM-MR.
摘要翻译：实现了能够保持卷积性和安全性并容易地改变轮数的Feistel型通用密钥块密码处理配置。具有SP型F功能的Feistel型密码处理配置包括非线性转换部分和线性转换部分，构成具有满足归一化性质的矩阵排列的n轮基本单元和作为预设的ODM-MR或SDM-MR F功能配置条件。对于该单元，选择和添加满足F函数的布置条件的F函数，或者连接多个基本单元，以便构成具有增加的具有满足折返特性的布置的圆数的Feistel密码配置，并且 ODM-MR或SDM-MR。

10. 发明申请

US20060122802A1 Data processing apparatus, secured circuit, program and data processing method 有权
标题翻译：数据处理装置，安全电路，程序和数据处理方法
公开(公告)号：US20060122802A1
公开(公告)日：2006-06-08
申请号：US11289710
申请日：2005-11-30
申请人： Masanobu Okabe , Masafumi Kusakawa , Kyoji Shibutani , Sumio Morioka , Asami Yoshida , Muneki Shimada , Shiho Moriai
发明人： Masanobu Okabe , Masafumi Kusakawa , Kyoji Shibutani , Sumio Morioka , Asami Yoshida , Muneki Shimada , Shiho Moriai
IPC分类号： G06F19/00
CPC分类号： G01R31/31719
摘要： A data processing apparatus capable of testing whether a secure circuit is normal or not while maintaining confidentiality of the secured circuit is provided: wherein the secured circuit conducts a self-diagnostic test thereof in accordance with a self-diagnostic test start instruction signal from a CPU, and the secured circuit outputs a self-diagnostic test result signal indicating whether the secured circuit is normal or not to the CPU.
摘要翻译：提供一种能够在保护电路的保密性的同时检查安全电路是否正常的数据处理装置：其中，所述安全电路根据来自CPU的自诊断测试开始指示信号进行自诊断测试，并且安全电路输出指示安全电路是否正常到CPU的自诊断测试结果信号。

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