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1. 发明授权

US5304819A Light-activated semiconductor device having light-emitting elements, light-receiving elements and output elements 失效
标题翻译：具有发光元件，光接收元件和输出元件的光激活半导体器件
公开(公告)号：US5304819A
公开(公告)日：1994-04-19
申请号：US81124
申请日：1993-06-25
申请人： Hiroyasu Torazawa , Kenji Mizuuchi , Kazuo Hagimura
发明人： Hiroyasu Torazawa , Kenji Mizuuchi , Kazuo Hagimura
IPC分类号： H01L31/12 , H01L31/167 , H01L31/16
CPC分类号： H01L31/167 , H01L2224/48091 , H01L2224/48137 , H01L2224/48247 , H01L2924/13091
摘要： The present invention relates to a light-activated semiconductor device comprising light-emitting elements for emitting light respectively, light-receiving elements for producing driving voltages in response to the light respectively and output elements activated in response to the driving voltages respectively. The light-receiving elements are disposed on two planes opposed to each other. The output elements are disposed on their corresponding planes in opposing relationship.
摘要翻译：本发明涉及分别用于发光的发光元件的光激活半导体器件，分别响应于该光产生驱动电压的光接收元件和分别响应于驱动电压而激活的输出元件。光接收元件设置在彼此相对的两个平面上。输出元件以相对的关系设置在它们对应的平面上。

2. 发明授权

US4244000A PNPN Semiconductor switches 失效
标题翻译： PNPN半导体开关
公开(公告)号：US4244000A
公开(公告)日：1981-01-06
申请号：US96165
申请日：1979-11-20
申请人： Jun Ueda , Haruo Mori , Kazuo Hagimura , Kotaro Kato
发明人： Jun Ueda , Haruo Mori , Kazuo Hagimura , Kotaro Kato
IPC分类号： H01L27/144 , H01L29/10 , H01L29/74 , H01L29/747 , H01L29/749 , H01L31/111 , H03K17/082 , H03K17/725
CPC分类号： H01L29/747 , H01L27/1443 , H01L29/102 , H01L29/7408 , H01L29/742 , H01L31/1113 , H03K17/0824 , H03K17/725
摘要： A circuit for preventing a dV/dt erroneous operation of a PNPN semiconductor switch is replaced by a capacitance on the surface of a semiconductor substrate, a high resistance gate electrode. In other words, such a circuit is formed on the surface of the substrate by a slight modification of the basic design without decreasing the chip area and without isolating component elements.
摘要翻译：用于防止PNPN半导体开关的dV / dt错误操作的电路由半导体衬底，高电阻栅电极的表面上的电容代替。换句话说，这种电路通过对基本设计的轻微修改形成在基板的表面上，而不会减小芯片面积并且不隔离组件元件。

3. 发明授权

US4489340A PNPN Light sensitive semiconductor switch with phototransistor connected across inner base regions 失效
标题翻译： PNPN光敏半导体开关，光电晶体管连接在内部基极区域
公开(公告)号：US4489340A
公开(公告)日：1984-12-18
申请号：US228935
申请日：1981-01-28
申请人： Jun Ueda , Haruo Mori , Kazuo Hagimura , Hirokazu Tsukada , Kotaro Kato
发明人： Jun Ueda , Haruo Mori , Kazuo Hagimura , Hirokazu Tsukada , Kotaro Kato
IPC分类号： H01L27/144 , H01L31/111 , H04Q3/52 , H01L29/74
CPC分类号： H01L31/1113 , H01L27/1443 , H04Q3/521
摘要： A PNPN semiconductor switch including an N type semiconductor substrate, spaced apart first and second P type diffused regions formed on a surface of an N type substrate, spaced apart first and second N type diffused regions formed in the second P type diffused region, a first gate insulating layer formed on the surface of the second P type diffused region between the first and second N type diffused regions to cover portions thereof, a first gate electrode formed on the first gate insulating layer between the first and second N type diffused regions, a resistance region disposed on the first gate insulating layer, one end of the resistance region on the side opposite to the first gate electrode, a second gate insulating layer overlying the first gate electrode and the resistance region, a semiinsulating layer formed on the surface of the substrate except over the first and second P type diffused regions, an insulating layer overlying the semiinsulating layer, a P gate electrode electrically connected to the second P type diffused region and the second N type diffused region, a second gate electrode formed on the second gate insulating layer at a portion above the first gate electrode, a cathode electrode connected to the first N type diffused region, an anode electrode connected to the first P type diffused region and the second gate electrode and a high resistance region formed immediately beneath the first gate insulating layer and between the first and second N type diffused regions.
摘要翻译：一种PNPN半导体开关，包括N型半导体衬底，形成在N型衬底的表面上的间隔开的第一和第二P型扩散区域，形成在第二P型扩散区域中的间隔开的第一和第二N型扩散区域，第一栅极绝缘层，形成在第一和第二N型扩散区域之间的第二P型扩散区域的表面上以覆盖其部分;形成在第一和第二N型扩散区域之间的第一栅极绝缘层上的第一栅电极，电阻区域，设置在所述第一栅极绝缘层上，所述电阻区域的与所述第一栅极电极相反一侧的一端，覆盖所述第一栅电极和所述电阻区域的第二栅极绝缘层，形成在所述第一栅极绝缘层的表面上的半绝缘层基板除了第一和第二P型扩散区域之外，覆盖半绝缘层的绝缘层，P栅极电极与第二P型扩散区域和第二N型扩散区域连接的第二栅电极，形成在第一栅极电极上方的第二栅极绝缘层上的第二栅电极，连接到第一N型扩散区域的阴极电极，连接到第一P型扩散区域和第二栅电极的阳极电极和形成在第一栅极绝缘层正下方以及第一和第二N型扩散区域之间的高电阻区域。

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