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1. 发明授权

US5140110A Printed circuit board capable of preventing electromagnetic interference 失效
标题翻译：能够防止电磁干扰的印刷电路板
公开(公告)号：US5140110A
公开(公告)日：1992-08-18
申请号：US749758
申请日：1991-08-26
申请人： Katsuya Nakagawa , Masakazu Nagano , Jun Higashiyama
发明人： Katsuya Nakagawa , Masakazu Nagano , Jun Higashiyama
IPC分类号： H05K1/02 , H05K1/09 , H05K3/34 , H05K3/46 , H05K9/00
CPC分类号： H05K9/0039 , H05K1/0218 , H05K1/095 , H05K2201/0715 , H05K2203/044 , H05K2203/0723 , H05K3/3468 , H05K3/4644
摘要： A printed circuit board includes a first electric conductive layer formed on an insulating base plate to form signal patterns and a ground pattern. An insulation layer covering the signal patterns and a second electric conductive layer connected to the ground pattern are sequentially formed on the plate. A large area ground land is formed in the vicinity of a ground terminal of a digital IC by the first electric conductive layer to be connected to the ground terminal, which is directly surface-connected to the second electric conductive layer so that a ground impedance of the ground terminal can be reduced. A large area power source land connected to a power source terminal of the digital IC is formed in the vicinity of the power source terminal by the first electric conductive layer, which sandwiches the insulation layer in cooperation with the second electrostatic conductive layer so that an electrostatic capacitance larger than a line-to-line distribution capacitance formed by the signal patterns can be formed between the power source land and the second electric conductive layer.
摘要翻译：印刷电路板包括形成在绝缘基板上以形成信号图案和接地图案的第一导电层。覆盖信号图案的绝缘层和连接到接地图案的第二导电层依次形成在板上。通过与第二导电层直接表面连接的接地端子连接的第一导电层在数字IC的接地端子附近形成大面积的接地面，使得接地端子的接地阻抗可以减少接地端子。通过第一导电层在电源端子附近形成连接到数字IC的电源端子的大面积电源极，与第二静电导电层协调地夹着绝缘层，使静电可以在电源焊盘和第二导电层之间形成比由信号图案形成的线间分布电容大的电容。

2. 发明授权

US5043526A Printed circuit board capable of preventing electromagnetic interference 失效
标题翻译：能够防止电磁干扰的印刷电路板
公开(公告)号：US5043526A
公开(公告)日：1991-08-27
申请号：US482936
申请日：1990-02-22
申请人： Katsuya Nakagawa , Masakazu Nagano , Jun Higashiyama
发明人： Katsuya Nakagawa , Masakazu Nagano , Jun Higashiyama
IPC分类号： H05K1/02 , H05K1/09 , H05K3/34 , H05K3/46 , H05K9/00
CPC分类号： H05K9/0039 , H05K1/0218 , H05K1/095 , H05K2201/0715 , H05K2203/044 , H05K2203/0723 , H05K3/3468 , H05K3/4644
摘要： A printed circuit board includes a first electric conductive layer formed on an insulating base plate to form signal patterns and a ground pattern. An insulation layer covering the signal patterns and a second electric conductive layer connected to the ground pattern are sequentially formed on the plate. A large area ground land is formed in the vicinity of a ground terminal of a digital IC by the first electric conductive layer to be connected to the ground terminal, which is directly surface-mounted to the second electric conductive layer so that a ground impedance of the ground terminal can be reduced. A large area power source land connected to a power source terminal of the digital IC is formed in the vicinity of the power source terminal by the first electric conductive layer, which sandwiches the insulation layer in cooperation with the second electrostatic conductive layer so that an electrostatic capacitance larger than a line-to-line distribution capacitance formed by the signal patterns can be formed between the power source land and the second electric conductive layer.
摘要翻译：印刷电路板包括形成在绝缘基板上以形成信号图案和接地图案的第一导电层。覆盖信号图案的绝缘层和连接到接地图案的第二导电层依次形成在板上。通过与第二导电层直接表面安装的接地端子连接的第一导电层在数字IC的接地端子附近形成大面积的接地面，使得接地端子的接地阻抗可以减少接地端子。通过第一导电层在电源端子附近形成连接到数字IC的电源端子的大面积电源极，其与第二静电导电层协调地夹着绝缘层，使得静电可以在电源接地区和第二导电层之间形成比由信号图案形成的线间分布电容大的电容。

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