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热词
    • 1. 发明授权
    • Multiprocessor system having a system bus for the coupling of several
processing units with appertaining private cache memories and a common
main memory
    • 多处理器系统具有用于将多个处理单元与专用高速缓存存储器和公共主存储器耦合的系统总线
    • US5289585A
    • 1994-02-22
    • US917684
    • 1992-07-22
    • Juergen KockPeter MooshammerWilfried RottmannErich Taeuber
    • Juergen KockPeter MooshammerWilfried RottmannErich Taeuber
    • G06F12/08G06F13/14G06F13/38
    • G06F12/0831
    • A microprocessor system has a bus system for coupling several processing units, each having an appertaining private cache memory and a common main memory. When an address operation of a transaction is executed, a transaction identification number is generated and transmitted on the system bus to all other subscribers together with the fed address of the initiating subscriber. In each subscriber, memory means are provided for storing the transmitted address and the co-delivered transaction identification number. Simultaneously with the assignment of the system bus for further transmissions, the address stored in the memory means are monitored in test means of the subscribers, and after monitoring, a synchronization signal and possibly accompanying signals are set by all subscribers for the abortion or continuation of a transaction. Given continuation with a data operation, an allocation of the data operation to its corresponding address operation can be achieved by return transmission of the associated transaction identification number together with the data to the initiating subscriber, which permits that the sequential order of the data operations sequence is not bound to that of the corresponding address operations.
    • 微处理器系统具有用于耦合多个处理单元的总线系统,每个处理单元具有独立的高速缓冲存储器和公共主存储器。 当执行事务的地址操作时,在系统总线上生成交易标识号并将其与所发起订户的馈送地址一起发送给所有其他用户。 在每个用户中,存储装置用于存储发送的地址和共同交付的交易标识号。 与用于进一步传输的系统总线的分配同时,在用户的测试装置中监视存储在存储器装置中的地址,并且在监视之后,所有用户设置同步信号和可能伴随的信号,用于堕胎或继续 一个交易。 给定持续的数据操作,可以通过将关联的事务标识号与数据一起返回发起订户来实现数据操作对其相应地址操作的分配,这允许数据操作序列的顺序 不限于相应的地址操作。