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1. 发明授权

US08324936B2 Transmitter and receiver of differential current driving mode, and interface system of differential current driving mode including the same 失效
标题翻译：差动电流驱动模式的变送器和接收器，以及包括差动电流驱动模式的差动电流驱动模式的接口系统
公开(公告)号：US08324936B2
公开(公告)日：2012-12-04
申请号：US13059021
申请日：2009-07-07
申请人： Jun Ho Kim , Young Soo Ryu , Ju Pyo Hong , Jung Hwan Choi
发明人： Jun Ho Kim , Young Soo Ryu , Ju Pyo Hong , Jung Hwan Choi
IPC分类号： H03K19/094 , H03K19/0175
CPC分类号： H03K19/0175
摘要： Differential current driving type transmitter and receiver, and an interface system having the transmitter and receiver. The transmitter includes a current source, a current direction selecting block, and a balancing switch block. The current source sources currents to a pair of transmission lines or sinks currents flowing through the pair of transmission lines. The current direction selecting block transfers a current flowing from the current source to one transmission line of the pair of transmission lines and a current flowing through the other transmission line of the pair of transmission lines to the current source. The balancing switch block initializes the pair of transmission lines to a balanced state.
摘要翻译：差动电流驱动型发射机和接收机，以及具有发射机和接收机的接口系统。发射机包括电流源，电流方向选择块和平衡开关块。电流源电流流向一对传输线或吸收流过该对传输线的电流。电流方向选择块将从电流源流向一对传输线的一条传输线和流经该对传输线的另一条传输线的电流传输到电流源。平衡开关块将一对传输线初始化为平衡状态。

2. 发明授权

US08273660B2 Method of manufacturing a dual face package 有权
标题翻译：制造双面包装的方法
公开(公告)号：US08273660B2
公开(公告)日：2012-09-25
申请号：US12929614
申请日：2011-02-03
申请人： Seung Wook Park , Young Do Kweon , Jingli Yuan , Seon Hee Moon , Ju Pyo Hong , Jae Kwang Lee
发明人： Seung Wook Park , Young Do Kweon , Jingli Yuan , Seon Hee Moon , Ju Pyo Hong , Jae Kwang Lee
IPC分类号： H01L21/302 , H01L21/00
CPC分类号： H01L21/76898 , H01L21/481 , H01L23/3114 , H01L23/49827 , H01L2924/0002 , H01L2924/00
摘要： A method of manufacturing a dual face package, including: preparing an upper substrate composed of an insulating layer including a post via-hole; forming a filled electrode in a semiconductor substrate, the filled electrode being connected to a die pad; applying an adhesive layer on one side of the semiconductor substrate including the filled electrode, and attaching the upper substrate to the semiconductor substrate; cutting another side of the semiconductor substrate in a thickness direction, thus making the filled electrode into a through-electrode; and forming a post electrode in the post via-hole, forming an upper redistribution layer connected to the post electrode of the semiconductor substrate, and forming a lower redistribution layer connected to the through-electrode on the other side of the semiconductor substrate.
摘要翻译：一种制造双面包装的方法，包括：制备由包括柱状通孔的绝缘层构成的上基板; 在半导体衬底中形成填充电极，所述填充电极连接到管芯焊盘; 在包括填充电极的半导体衬底的一侧上施加粘合剂层，并将上衬底附接到半导体衬底; 在厚度方向切割半导体衬底的另一侧，从而使填充的电极成为通孔; 在柱状通孔中形成柱状电极，形成与半导体衬底的柱状电极连接的上部再分配层，在半导体衬底的另一侧形成与贯通电极连接的下部再分布层。

3. 发明申请

US20120018897A1 SEMICONDUCTOR MODULE AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：半导体模块及其制造方法
公开(公告)号：US20120018897A1
公开(公告)日：2012-01-26
申请号：US12897222
申请日：2010-10-04
申请人： Seung Wook Park , Young Do Kweon , Ju Pyo Hong
发明人： Seung Wook Park , Young Do Kweon , Ju Pyo Hong
IPC分类号： H01L23/48 , H01L21/50
CPC分类号： H01L24/97 , H01L21/561 , H01L23/3128 , H01L23/3135 , H01L23/552 , H01L24/16 , H01L24/48 , H01L25/0652 , H01L25/165 , H01L2224/16225 , H01L2224/16227 , H01L2224/16235 , H01L2224/48227 , H01L2224/97 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01033 , H01L2924/01047 , H01L2924/014 , H01L2924/09701 , H01L2924/1203 , H01L2924/1304 , H01L2924/14 , H01L2924/15311 , H01L2924/15787 , H01L2924/16152 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H01L2924/19105 , H01L2924/3025 , H01L2224/81 , H01L2224/85 , H01L2924/00 , H01L2924/00012 , H01L2224/0401 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： Disclosed herein is a semiconductor module, including: a substrate including wiring patterns formed on both sides thereof; a first device mounted on the substrate; a first molding layer made of a molding material, surrounding the first device and including via holes formed therein to interconnect with the wiring pattern formed on one side of the substrate; and a second device mounted on the first molding layer and electrically connected with the wiring pattern formed on one side of the substrate through the via holes formed in the first molding layer.
摘要翻译：这里公开了一种半导体模块，包括：基板，其包括形成在其两侧的布线图案; 安装在所述基板上的第一装置; 由模塑材料制成的第一模塑层，围绕所述第一装置并且包括形成在其中的通孔以与形成在所述基板的一侧上的所述布线图案互连; 以及第二装置，其安装在第一成型层上，并且通过形成在第一成型层中的通路孔与形成在基板的一侧上的布线图案电连接。

4. 发明申请

US20110012252A1 POWER SEMICONDUCTOR MODULE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：功率半导体模块及其制造方法
公开(公告)号：US20110012252A1
公开(公告)日：2011-01-20
申请号：US12551238
申请日：2009-08-31
申请人： Shan GAO , Seog Moon Choi , Tae Hyun Kim , Ju Pyo Hong , Bum Sik Jang , Ji Hyun Park
发明人： Shan GAO , Seog Moon Choi , Tae Hyun Kim , Ju Pyo Hong , Bum Sik Jang , Ji Hyun Park
IPC分类号： H01L23/46 , H01L23/48 , H01L21/50
CPC分类号： H01L25/072 , H01L23/3121 , H01L23/3735 , H01L23/427 , H01L24/29 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/73 , H01L25/071 , H01L25/50 , H01L2224/32225 , H01L2224/45124 , H01L2224/48091 , H01L2224/4813 , H01L2224/48137 , H01L2224/48139 , H01L2224/48227 , H01L2224/4846 , H01L2224/48472 , H01L2224/73265 , H01L2924/00014 , H01L2924/0102 , H01L2924/01057 , H01L2924/01078 , H01L2924/014 , H01L2924/1305 , H01L2924/13055 , H01L2924/16195 , H01L2924/181 , H01L2924/19107 , H01L2924/00012 , H01L2924/00 , H01L2224/45015 , H01L2924/207
摘要： Disclosed herein is a power semiconductor module. The module includes metal plates each having a first through hole, with an anodic oxidation layer formed on a surface of metal plates and an interior of the first through hole. A cooling member has a second through hole at a position corresponding to the first through hole, and the metal plates are attached to both sides of the cooling member. A circuit layer is formed on the anodic oxidation layer and performs an interlayer connection through a via formed in the first and second through holes. A power device is connected to the circuit layer. A resin encapsulant encloses the circuit layer and the power device. A housing is installed to each of the metal plates to form a sealing space for the resin encapsulant.
摘要翻译：这里公开了功率半导体模块。模块包括各自具有第一通孔的金属板，阳极氧化层形成在金属板的表面和第一通孔的内部。冷却构件在与第一通孔对应的位置具有第二通孔，并且金属板附接到冷却构件的两侧。在阳极氧化层上形成电路层，通过在第一和第二通孔中形成的通孔进行层间连接。电源设备连接到电路层。树脂密封剂包围电路层和功率器件。每个金属板上安装有一个壳体，以形成树脂密封剂的密封空间。

5. 发明授权

US08846380B2 Reaction cassette for measuring the concentration of glycated hemoglobin and measuring method thereof 有权
标题翻译：用于测量糖化血红蛋白浓度的反应盒及其测定方法
公开(公告)号：US08846380B2
公开(公告)日：2014-09-30
申请号：US12025443
申请日：2008-02-04
申请人： Byeong-woo Bae , Sung-dong Lee , Min-sun Kim , Jae-hyun Yoo , Hyoung-soo Kim , Ki-won Lee , Ju-pyo Hong
发明人： Byeong-woo Bae , Sung-dong Lee , Min-sun Kim , Jae-hyun Yoo , Hyoung-soo Kim , Ki-won Lee , Ju-pyo Hong
IPC分类号： C12M1/34 , G01N33/72 , G01N33/543 , B01L3/00
CPC分类号： G01N33/723 , B01L3/502 , B01L2200/0621 , B01L2400/0457 , G01N33/54306 , G01N33/726
摘要： A reaction cassette for a glycated hemoglobin meter and a measuring method thereof are provided. The reaction cassette for the glycated hemoglobin meter includes: a first zone receiving a first reagent and a blood sample; a second zone receiving a second reagent; a reaction zone in which the blood sample reacts with the first reagent, or through which the second reagent passes to react with a first blood sample mixture obtained by reacting the blood sample with the first reagent; and a measurement zone measuring an amount of total hemoglobin in the first blood sample mixture, or measuring an amount of glycated hemoglobin in a second blood sample mixture obtained by reacting the first blood sample mixture with the second reagent, wherein the blood sample, the first reagent, and the second reagent move between the reaction zone and the measurement zone according to a rotation angle of the reaction cassette when the reaction cassette is rotated. Therefore, since the reaction cassette rotates automatically, it is possible to measure the amount of glycated hemoglobin in a blood sample through simple manipulation and reduce a manufacturing time. Furthermore, since reagents are supplied to the reaction cassette from a separate reagent pack, it is possible to resolve storage and distribution problems of the reaction cassette, which occur when reagents are stored in the reaction cassette.
摘要翻译：提供了糖化血红蛋白计的反应盒及其测定方法。糖化血红蛋白计的反应盒包括：接收第一试剂和血液样品的第一区; 接收第二试剂的第二区域; 血液样品与第一试剂反应的反应区域，或第二试剂通过的反应区域与通过使血液样品与第一试剂反应获得的第一血液样品混合物反应; 以及测量第一血液样品混合物中的总血红蛋白量的测量区域，或者测量通过使第一血液样品混合物与第二试剂反应获得的第二血液样品混合物中的糖化血红蛋白的量，其中，血液样品，第一试剂，第二试剂在反应盒旋转时根据反应盒的旋转角度在反应区和测量区之间移动。因此，由于反应盒自动旋转，因此可以通过简单的操作来测量血液样品中的糖化血红蛋白的量，并减少制造时间。此外，由于将试剂从单独的试剂盒供给到反应盒中，因此可以解决当试剂储存在反应盒中时发生的反应盒的储存和分配问题。

6. 发明授权

US08842745B2 Transmission unit adopting a differential voltage driving system, transmission unit and receiving unit selectively adopting a differential current driving system, differential voltage driving system, and interface system 有权
标题翻译：采用差分电压驱动系统的传输单元，选择采用差动电流驱动系统的传输单元和接收单元，差分电压驱动系统和接口系统
公开(公告)号：US08842745B2
公开(公告)日：2014-09-23
申请号：US13142409
申请日：2009-12-03
申请人： Ju-Pyo Hong , Jun-Ho Kim , Jung-Hwan Choi
发明人： Ju-Pyo Hong , Jun-Ho Kim , Jung-Hwan Choi
IPC分类号： H04L27/00 , H04L25/02 , H04L7/00 , H03K19/0175 , H04L7/04
CPC分类号： H04L25/0272 , H03K19/017581 , H04L7/0091 , H04L7/041 , H04L25/0282
摘要： In the transmitter, receiver and interface system capable of selective adoption of a differential current driving scheme and a differential voltage driving scheme, a differential current driving scheme and a differential voltage driving scheme can be selectively adopted in one semiconductor chip depending upon the states of the transmission lines, so that effective data transmission is possible and common parts can be shared, whereby a design time can be shortened and a layout area can be reduced.
摘要翻译：在能够选择性地采用差分电流驱动方案和差分电压驱动方案的发射器，接收器和接口系统中，可以在一个半导体芯片中选择性地使用差分电流驱动方案和差分电压驱动方案，这取决于传输线，使得有效的数据传输是可能的，并且可以共享公共部分，从而可以缩短设计时间并且可以减少布局面积。

7. 发明授权

US08658467B2 Method of manufacturing stacked wafer level package 有权
标题翻译：堆叠晶圆级封装的制造方法
公开(公告)号：US08658467B2
公开(公告)日：2014-02-25
申请号：US12929703
申请日：2011-02-09
申请人： Seung Wook Park , Young Do Kweon , Jin Gu Kim , Ju Pyo Hong , Hee Kon Lee , Hyung Jin Jeon , Yuan Jing Li , Jong Yun Lee
发明人： Seung Wook Park , Young Do Kweon , Jin Gu Kim , Ju Pyo Hong , Hee Kon Lee , Hyung Jin Jeon , Yuan Jing Li , Jong Yun Lee
IPC分类号： H01L21/00
CPC分类号： H01L23/3128 , H01L21/563 , H01L21/568 , H01L21/6835 , H01L23/49816 , H01L23/49827 , H01L23/5384 , H01L23/5389 , H01L24/19 , H01L24/81 , H01L24/83 , H01L2224/05001 , H01L2224/05026 , H01L2224/05124 , H01L2224/05147 , H01L2224/05155 , H01L2224/05166 , H01L2224/05548 , H01L2224/12105 , H01L2224/16225 , H01L2224/2402 , H01L2224/2929 , H01L2224/293 , H01L2224/32225 , H01L2224/73203 , H01L2224/73204 , H01L2224/81801 , H01L2224/83851 , H01L2225/1035 , H01L2225/1058 , H01L2924/00011 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/09701 , H01L2924/15311 , H01L2924/351 , H01L2224/29075 , H01L2924/00014 , H01L2924/00
摘要： A method of manufacturing a stacked wafer level package includes: preparing a substrate; forming a conductive layer on the substrate; forming chip connection pads and internal connection pads on the conductive layer; forming solder balls connected to the internal connection pads; mounting a semiconductor chip on the conductive layer to be connected to the chip connection pads; forming a sealing member to seal the solder balls and the semiconductor chip; separating the substrate from the conductive layer; forming a rearrangement wiring layer by etching the conductive layer; forming an external connection on the rearrangement wiring layer; forming contact holes in the sealing member to expose the solder balls; and stacking an electronic component to be electrically connected to the solder balls exposed through the contact holes.
摘要翻译：层叠晶片级封装的制造方法包括：准备基板; 在所述基板上形成导电层; 在导电层上形成芯片连接焊盘和内部连接焊盘; 形成连接到内部连接焊盘的焊球; 将半导体芯片安装在所述导电层上以连接到所述芯片连接焊盘; 形成密封构件以密封焊球和半导体芯片; 将衬底与导电层分离; 通过蚀刻导电层形成重排布线层; 在所述重排布线层上形成外部连接; 在所述密封构件中形成接触孔以暴露所述焊球; 并且堆叠要电连接到通过接触孔暴露的焊料球的电子部件。

8. 发明授权

US08624128B2 Printed circuit board and manufacturing method thereof 有权
标题翻译：印刷电路板及其制造方法
公开(公告)号：US08624128B2
公开(公告)日：2014-01-07
申请号：US13235110
申请日：2011-09-16
申请人： Ju-Pyo Hong , Young-Do Kweon , Jin-Gu Kim , Seon-Hee Moon , Dong-Jin Lee , Seung-Wook Park
发明人： Ju-Pyo Hong , Young-Do Kweon , Jin-Gu Kim , Seon-Hee Moon , Dong-Jin Lee , Seung-Wook Park
IPC分类号： H05K1/02
CPC分类号： H05K3/4644 , H05K1/0271 , H05K2201/09036
摘要： A printed circuit board and a manufacturing method of the printed circuit board are disclosed. The printed circuit board includes: a first insulation layer having a first pattern formed thereon; a first trench caved in one surface of the first insulation layer along at least a portion of the first pattern; and a second insulation layer stacked on one surface of the first insulation layer so as to cover the first pattern. The first trench is filled by the second insulation layer.
摘要翻译：公开了印刷电路板和印刷电路板的制造方法。印刷电路板包括：第一绝缘层，其上形成有第一图案; 沿着所述第一图案的至少一部分在所述第一绝缘层的一个表面中凹陷的第一沟槽; 以及层叠在第一绝缘层的一个表面上以覆盖第一图案的第二绝缘层。第一沟槽由第二绝缘层填充。

9. 发明授权

US08093705B2 Dual face package having resin insulating layer 失效
标题翻译：具有树脂绝缘层的双面包装
公开(公告)号：US08093705B2
公开(公告)日：2012-01-10
申请号：US12320286
申请日：2009-01-22
申请人： Seung Wook Park , Young Do Kweon , Jingli Yuan , Seon Hee Moon , Ju Pyo Hong , Jae Kwang Lee
发明人： Seung Wook Park , Young Do Kweon , Jingli Yuan , Seon Hee Moon , Ju Pyo Hong , Jae Kwang Lee
IPC分类号： H01L23/50 , H01L21/768
CPC分类号： H01L21/76898 , H01L21/481 , H01L23/3114 , H01L23/49827 , H01L2924/0002 , H01L2924/00
摘要： A dual face package includes a semiconductor substrate including a through-electrode connected to a die pad disposed on one side of the semiconductor substrate, and a lower redistribution layer disposed on another side thereof and connected to the through-electrode, an insulating layer including a post electrode connected to the through-electrode, and an upper redistribution layer disposed on one side thereof and connected to the post electrode, and an adhesive layer disposed on the one side of the semiconductor substrate so as to attach the insulating layer to the semiconductor substrate such that the through-electrode is connected to the post electrode.
摘要翻译：双面包装包括半导体衬底，其包括连接到设置在半导体衬底的一侧的管芯焊盘的通孔和设置在其另一侧并连接到通孔的下再分布层，绝缘层包括：连接到所述贯通电极的后电极以及设置在其一侧并连接到所述柱电极的上再分配层，以及设置在所述半导体衬底的一侧上以将所述绝缘层附着到所述半导体衬底的粘合层使得贯通电极连接到柱电极。

10. 发明申请

US20090085134A1 Wafer-level image sensor module, method of manufacturing the same, and camera module 审中-公开
标题翻译：晶圆级图像传感器模块，其制造方法和相机模块
公开(公告)号：US20090085134A1
公开(公告)日：2009-04-02
申请号：US12007977
申请日：2008-01-17
申请人： Seung Wook Park , Jing Li Yuan , Ju Pyo Hong , Si Joong Yang
发明人： Seung Wook Park , Jing Li Yuan , Ju Pyo Hong , Si Joong Yang
IPC分类号： H01L31/0232 , H01L21/52
CPC分类号： H01L27/14618 , H01L27/14683 , H01L2224/02372 , H01L2224/05001 , H01L2224/05009 , H01L2224/05024 , H01L2224/05548 , H01L2224/13 , H01L2924/00014 , H01L2224/05599
摘要： Provided is a wafer-level image sensor module including a wafer; an image sensor mounted on the wafer; a transparent member installed above the top surface of the wafer so as to seal the image sensor; a plurality of vias formed in the wafer so as to be positioned outside the transparent member; a plurality of upper pads formed on the upper ends of the respective vias; an encapsulation portion formed on the top surface of the wafer so as to be positioned outside the transparent member; and a plurality of external connection members that are electrically connected to the lower ends of the respective vias.
摘要翻译：提供了一种晶片级图像传感器模块，其包括晶片; 安装在晶片上的图像传感器; 透明构件安装在晶片的顶表面上方，以密封图像传感器; 形成在所述晶片中以便位于所述透明构件外部的多个通孔; 形成在各个通路的上端的多个上焊盘; 形成在所述晶片的上表面上以便位于所述透明构件外部的封装部; 以及电连接到各个通孔的下端的多个外部连接构件。

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