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1. 发明授权

US5744988A Amplifier circuits for driving large capacitive loads 失效
标题翻译：用于驱动大容性负载的放大器电路
公开(公告)号：US5744988A
公开(公告)日：1998-04-28
申请号：US708434
申请日：1996-09-05
申请人： Joseph Henry Condon , Joseph Peter Savicki
发明人： Joseph Henry Condon , Joseph Peter Savicki
IPC分类号： H03K3/57 , H03K17/06 , H03K17/687 , H03K1/00
CPC分类号： H03K3/57 , H03K17/063 , H03K17/6871
摘要： In an amplifier for driving a large capacitive load, a boost circuit is included to improve the efficiency of the amplifier where an input to the amplifier has a small signal swing. The amplifier comprises a stack of series-connected charge-storage capacitors serving as secondary power sources. During a charging of the capacitive load, charge is obtained from voltage nodes between the stack capacitors. One or more low-voltage power supplies are connected to the capacitive load in the boost circuit. With these power supplies, during a discharge of the capacitive load, the latter appears to be charged to a higher voltage than it actually is so as to return some charge to the highest voltage node from where a portion of its charge was obtained. As a result, the power consumption in the amplifier is substantially reduced.
摘要翻译：在用于驱动大容性负载的放大器中，包括升压电路以提高其放大器的输入具有小信号摆幅的放大器的效率。放大器包括用作次级电源的串联电荷存储电容器的堆叠。在电容负载充电期间，电荷从堆叠电容器之间的电压节点获得。一个或多个低压电源连接到升压电路中的电容性负载。利用这些电源，在电容性负载放电期间，后者似乎被充电到比其实际更高的电压，以便从其中获得一部分电荷的一部分电荷返回一些电荷。结果，放大器的功耗显着降低。

2. 发明授权

US3956700A Two-feedback-path delta modulation system with circuits for reducing pulse width modulation 失效
标题翻译：具有用于减小脉宽调制的电路的双反馈路径增量调制系统
公开(公告)号：US3956700A
公开(公告)日：1976-05-11
申请号：US569160
申请日：1975-04-18
申请人： Joseph Henry Condon
发明人： Joseph Henry Condon
IPC分类号： H03M3/02 , H03K13/22
CPC分类号： H03M3/022
摘要： An analog input signal to a delta modulation coder is differentiated prior to being combined in an integrator with the output of a precise first negative feedback circuit to produce an error signal. An amplified and integrated form of the error signal is combined in a resistive-capacitive crossover circuit with the output of a fast, but coarsely integrating, negative feedback circuit to overcome delay in the response of the first-mentioned, i.e., slow, feedback circuit. The crossover circuit output is applied to a low gain comparator having a ground reference and used to drive a first clocked threshold circuit for producing a digital signal representation. A Q output of the latter circuit drives the fast feedback path; and a Q output controls a further clocked threshold circuit which drives the slow feedback path, as well as providing a retimed delta modulated output signal train. A delta modulation decoder which is compatible with the described coder is also shown.
摘要翻译：在增益调制编码器的模拟输入信号在积分器与精确的第一负反馈电路的输出组合之前被微分，以产生误差信号。误差信号的放大和集成形式被组合在电阻电容交叉电路中，并与快速但粗集成的负反馈电路的输出相结合，以克服第一个提到的响应的延迟，即慢速反馈电路。交叉电路输出被施加到具有接地参考的低增益比较器，并用于驱动第一时钟阈值电路以产生数字信号表示。后一电路的Q输出驱动快速反馈路径; 并且Q输出控制驱动慢反馈路径的另一时钟阈值电路，以及提供重新定时的增量调制输出信号串。还示出了与所述编码器兼容的增量调制解码器。

3. 发明授权

US06665299B1 Method and system for telephony and high speed data access on a broadband access network 失效
标题翻译：用于宽带接入网络中电话和高速数据接入的方法和系统
公开(公告)号：US06665299B1
公开(公告)日：2003-12-16
申请号：US09231681
申请日：1999-01-14
申请人： Steven Michael Bellovin , Joseph Henry Condon , Richard Vandervoort Cox , Alexander Gibson Fraser , Charles Robert Kalmanek, Jr. , Alan Edward Kaplan , Thomas Joseph Killian , William Todd Marshall , Peter Z. Onufryk , Kadangode K. Ramakrishnan , Norman Loren Schryer
发明人： Steven Michael Bellovin , Joseph Henry Condon , Richard Vandervoort Cox , Alexander Gibson Fraser , Charles Robert Kalmanek, Jr. , Alan Edward Kaplan , Thomas Joseph Killian , William Todd Marshall , Peter Z. Onufryk , Kadangode K. Ramakrishnan , Norman Loren Schryer
IPC分类号： H04L1228
CPC分类号： H04Q11/0478 , H04L29/06 , H04L69/40 , H04L2012/5615 , H04L2012/5663 , H04M7/0057 , H04M7/006
摘要： A system and method for providing telephony and high speed data access over a broadband access network, comprising a network interface unit (NIU) coupled to a backup local exchange carrier (LEC) line, the broadband access network coupled to the NIU, an intermediate point-of-presence (IPOP) coupled to the broadband access network, and at least one external access network coupled to the IPOP. The system also provides for a fail-safe mode in which the NIU supports the LEC line for lifeline services.
摘要翻译：一种用于通过宽带接入网络提供电话和高速数据接入的系统和方法，包括耦合到备用本地交换载波（LEC）线路的网络接口单元（NIU），耦合到NIU的宽带接入网络，中间点（IPOP），以及耦合到IPOP的至少一个外部接入网络。该系统还提供了故障安全模式，其中NIU支持用于生命线服务的LEC线路。

4. 发明授权

US4006314A Digital interface for resynchronizing digital signals 失效
标题翻译：用于重新同步数字信号的数字接口
公开(公告)号：US4006314A
公开(公告)日：1977-02-01
申请号：US653349
申请日：1976-01-29
申请人： Joseph Henry Condon , Robert Bruce Kieburtz
发明人： Joseph Henry Condon , Robert Bruce Kieburtz
IPC分类号： H04J3/06 , H04L25/30 , H04Q11/04
CPC分类号： H04J3/0629 , H04Q11/04
摘要： An elastic interface is disclosed for two communicating digital carrier systems autonomously synchronized to disparate time bases independent of each other in frequency and phase. The interface includes two arrangements, one for each direction of transmission between the two digital systems. In an illustrative application for the interface in a telephone system, the first of the two digital systems is a digital transmission system while the second is a time-division-multiplex switching network. The different internal constraints of each system call for digital signals at variance in sampling rate and code format. The interface amply satisfies the difference in sampling rate by an interpolation process which supplies the requisite number of intermediate encoded signal samples. Code conversion techniques are employed to match the code format of each digital system. Flexibility in the interpolation process is provided by adjusting the value of the encoded samples in response to changes in the relative time intervals between each encoded sample being supplied to one digital system and the encoded samples from the other digital system upon which it is derived. The digital signal medium established in the interface preserves the quality of the information traversing the medium as the digital signals coupled thereto undergo a change in sampling rate even though the autonomous operation of each of the two digital systems occasions relative frequency drift between the time bases of the two digital systems.
摘要翻译：公开了一种弹性接口，用于两个通信的数字载波系统，它们在频率和相位上彼此独立地独立地同步到不同的时基。该接口包括两个布置，一个用于两个数字系统之间的每个传输方向。在电话系统中的接口的说明性应用中，两个数字系统中的第一个是数字传输系统，而第二个是时分复用交换网络。每个系统的不同内部约束对采样率和代码格式方差的数字信号进行调用。该接口通过提供必需数量的中间编码信号采样的内插处理来满足采样率的差异。采用代码转换技术来匹配每个数字系统的代码格式。内插过程的灵活性是通过响应于提供给一个数字系统的每个编码样本与从其导出的其他数字系统的编码样本之间的相对时间间隔的变化调整编码样本的值来提供的。在接口中建立的数字信号介质保持了通过介质传播的信息的质量，因为即使两个数字系统中的每一个的自主操作相对频率在两个数字系统。

5. 发明授权

US08107479B2 Method and system for telephony and high-speed data access on a broadband access network 有权
标题翻译：在宽带接入网络上进行电话和高速数据接入的方法和系统
公开(公告)号：US08107479B2
公开(公告)日：2012-01-31
申请号：US10705048
申请日：2003-11-10
申请人： Steven Michael Bellovin , Joseph Henry Condon , Richard Vandervoort Cox , Alexander Gibson Fraser , Charles Robert Kalmanek, Jr. , Alan Edward Kaplan , Thomas Joseph Killian , William Todd Marshall , Peter Z. Onufryk , Kadangode K. Ramakrishnan , Norman Loren Schryer
发明人： Steven Michael Bellovin , Joseph Henry Condon , Richard Vandervoort Cox , Alexander Gibson Fraser , Charles Robert Kalmanek, Jr. , Alan Edward Kaplan , Thomas Joseph Killian , William Todd Marshall , Peter Z. Onufryk , Kadangode K. Ramakrishnan , Norman Loren Schryer
IPC分类号： H04L12/28
CPC分类号： H04Q11/0478 , H04L29/06 , H04L69/40 , H04L2012/5615 , H04L2012/5663 , H04M7/0057 , H04M7/006
摘要： A system and method for providing telephony and high-speed data access over a broadband access network, comprising a network interface unit (NIU) coupled to a backup local exchange carrier (LEC) line, the broadband access network coupled to the NIU, an intermediate point-of-presence (IPOP) coupled to the broadband access network, and at least one external access network coupled to the IPOP. The system also provides for a fail-safe mode in which the NIU supports the LEC line for lifeline services.
摘要翻译：一种用于通过宽带接入网络提供电话和高速数据接入的系统和方法，包括耦合到备用本地交换载波（LEC）线路的网络接口单元（NIU），耦合到NIU的宽带接入网络，中间耦合到宽带接入网络的接入点（IPOP）以及耦合到IPOP的至少一个外部接入网络。该系统还提供了故障安全模式，其中NIU支持用于生命线服务的LEC线路。

6. 发明授权

US06456410B1 Optical data communication system and method 失效
标题翻译：光数据通信系统及方法
公开(公告)号：US06456410B1
公开(公告)日：2002-09-24
申请号：US08360513
申请日：1994-12-21
申请人： Joseph Henry Condon , Thomas Douglas Selkirk Duff , Milan F. Jukl , Charles Robert Kalmanek, Jr. , Bart Nicholas Locanthi, III , Joseph Peter Savicki
发明人： Joseph Henry Condon , Thomas Douglas Selkirk Duff , Milan F. Jukl , Charles Robert Kalmanek, Jr. , Bart Nicholas Locanthi, III , Joseph Peter Savicki
IPC分类号： H04J1408
CPC分类号： H04L12/40032 , H04B10/1149 , H04B10/40 , H04L12/4135
摘要： A system and method that overcomes the deficiencies of prior optical data communication systems for local area networks by employing a centralized controller in conjunction with a robust protocol and contention scheme. This combination facilitates the transport of data between a number of optical nodes without collision. The invention is particularly suited to transmissions between several mobile optical nodes and one or more stationary network infrared collector/transmitters, allowing communication with the network as the mobile nodes roam from the vicinity of one network infrared collector/transmitter to the next.
摘要翻译：一种系统和方法，通过结合鲁棒的协议和争用方案采用集中式控制器，克服了现有的局域网光数据通信系统的缺陷。这种组合有助于在多个光节点之间传输数据而不发生冲突。本发明特别适用于若干移动光节点与一个或多个固定网络红外收发器/发射机之间的传输，当移动节点从一个网络红外线收发器/发射机附近漫游到下一个时，允许与网络进行通信。

7. 发明授权

US5844923A Fast framing of nude ATM by header error check 失效
标题翻译：通过头错误检查快速构图裸机ATM
公开(公告)号：US5844923A
公开(公告)日：1998-12-01
申请号：US736151
申请日：1996-10-24
申请人： Joseph Henry Condon
发明人： Joseph Henry Condon
IPC分类号： H04Q3/00 , H04L12/56 , H04Q11/04 , H03M13/00 , H04L7/00
CPC分类号： H04Q11/0478 , H04L2012/5647 , H04L2012/5674
摘要： This invention provides a fast framing device that processes a stream of bytes and generates a signal for every byte clock that indicates whether a selected Asychronous Transfer mode cell boundary may be valid. The fast framing device generates a Cyclical Redundancy Code (CRC) corresponding to each byte from a input byte stream. The generated CRC is processed by an XOR tree that produces an output equivalent to processing the CRC code through five cycles of an CRC generator. The result of the XOR tree is XORed with a hexidecimal number "AC" or 0.times.AC. The result of the XOR tree and the XOR gate is delayed by five cycles and then compared with the CRC generated during the fifth byte clock. The compared results indicate whether the prior five bytes may be a valid ATM cell header.
摘要翻译：本发明提供了一种处理字节流并且为每个字节时钟生成指示所选择的同步传输模式单元边界是否有效的信号的快速成帧设备。快速成帧设备从输入字节流产生对应于每个字节的循环冗余码（CRC）。所生成的CRC由异或树处理，其产生等效于通过CRC发生器的五个周期处理CRC码的输出。 XOR树的结果与十六进制数字“AC”或0xAC进行异或运算。 XOR树和异或门的结果被延迟五个周期，然后与第五个字节时钟产生的CRC进行比较。比较结果表明前五个字节是否为有效的ATM信元头。

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