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1. 发明申请

US20110284388A1 Resin Plating Method Using Graphene Thin Layer 审中-公开
标题翻译：使用石墨烯薄层的树脂电镀方法
公开(公告)号：US20110284388A1
公开(公告)日：2011-11-24
申请号：US13078123
申请日：2011-04-01
申请人： Ah Hyun Bae , Sang Ik Son , Jae Do Nam , Jun Ho Lee , Tae Seon Hwang , Joon Suk Oh
发明人： Ah Hyun Bae , Sang Ik Son , Jae Do Nam , Jun Ho Lee , Tae Seon Hwang , Joon Suk Oh
IPC分类号： C25D5/54 , B82Y99/00 , B82Y40/00
CPC分类号： C25D5/56 , C23C18/1653 , C23C18/2006 , C23C18/2066 , C23C18/2073 , C23C18/31 , C23C18/405 , C25D5/10
摘要： According to an example embodiment a method of plating resin using a graphene thin layer includes forming a graphene thin layer on a resin substrate and electroplating the resin substrate having the graphene thin layer fog on the resin substrate.
摘要翻译：根据示例性实施例，使用石墨烯薄层对树脂进行电镀的方法包括在树脂基板上形成石墨烯薄层，并将具有石墨烯薄层雾的树脂基板电镀在树脂基板上。

2. 发明申请

US20080293205A1 METHOD OF FORMING METAL SILICIDE LAYER, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE USING THE SAME 审中-公开
标题翻译：形成金属硅化物层的方法和使用其制造半导体器件的方法
公开(公告)号：US20080293205A1
公开(公告)日：2008-11-27
申请号：US12125224
申请日：2008-05-22
申请人： Oh-Kyum KWON , Bum-Seok KIM , Geun-Sook PARK , Joon-Suk OH , Hye-Young PARK , Min-Jun CHOI
发明人： Oh-Kyum KWON , Bum-Seok KIM , Geun-Sook PARK , Joon-Suk OH , Hye-Young PARK , Min-Jun CHOI
IPC分类号： H01L21/336 , H01L21/44
CPC分类号： H01L29/872 , H01L21/28518 , H01L21/28537 , H01L21/324 , H01L29/0638 , H01L29/0692 , H01L29/66143 , H01L29/665
摘要： A method of forming a metal silicide layer includes sequentially forming a metal layer and a first capping layer on a substrate, performing a first heat treatment on the substrate to cause the substrate to react to the metal layer, removing the first, capping layer and an unreacted metal layer, forming a second capping layer on the substrate, and performing a second heat treatment on the substrate to form a metal silicide layer on the substrate.
摘要翻译：形成金属硅化物层的方法包括在基板上依次形成金属层和第一覆盖层，在基板上进行第一热处理以使基板与金属层反应，去除第一封盖层和未反应的金属层，在衬底上形成第二覆盖层，并在衬底上进行第二热处理，以在衬底上形成金属硅化物层。

3. 发明授权

US08018021B2 Schottky diode and method of fabricating the same 有权
标题翻译：肖特基二极管及其制造方法
公开(公告)号：US08018021B2
公开(公告)日：2011-09-13
申请号：US12662452
申请日：2010-04-19
申请人： Dae-Shik Kim , Oh-Kyum Kwon , Myung-Hee Kim , Yong-Chan Kim , Hye-Young Park , Joon-Suk Oh
发明人： Dae-Shik Kim , Oh-Kyum Kwon , Myung-Hee Kim , Yong-Chan Kim , Hye-Young Park , Joon-Suk Oh
IPC分类号： H01L29/872
CPC分类号： H01L29/872 , H01L29/0619 , H01L29/0649 , H01L29/47 , H01L29/66143
摘要： A schottky diode may include a schottky junction including a well formed in a semiconductor substrate and a first electrode contacting the first well. The well may have a first conductivity type. A first ohmic junction may include a first junction region formed in the well and a second electrode contacting the first junction region. The first junction region may have a higher concentration of the first conductivity type than the well. A first device isolation region may be formed in the semiconductor substrate separating the schottky junction and the first ohmic junction. A well guard having a second conductivity type opposite to the first conductivity type may be formed in the well. At least a portion of the well guard may be formed under a portion of the schottky junction.
摘要翻译：肖特基二极管可以包括包括在半导体衬底中形成的阱和与第一阱接触的第一电极的肖特基结。该井可具有第一导电类型。第一欧姆结可以包括形成在阱中的第一结区域和与第一结区接触的第二电极。第一结区可能具有比阱更高的第一导电类型的浓度。可以在分离肖特基结和第一欧姆结的半导体衬底中形成第一器件隔离区。可以在井中形成具有与第一导电类型相反的第二导电类型的保护罩。阱护套的至少一部分可以形成在肖特基结的一部分下方。

4. 发明授权

US07635746B2 Diamine compound containing triazine group, polyamic acid synthesized from the diamine compound and LC alignment film prepared from the polyamic acid 有权
标题翻译：含有三嗪基的二胺化合物，由二胺化合物合成的聚酰胺酸和由聚酰胺酸制备的LC取向膜
公开(公告)号：US07635746B2
公开(公告)日：2009-12-22
申请号：US10525671
申请日：2004-01-20
申请人： Jae Min Oh , Bum Jin Lee , Moo Young Lee , O Bum Kwon , Joon Suk Oh , Dong Won Park , Chul Hee Kim
发明人： Jae Min Oh , Bum Jin Lee , Moo Young Lee , O Bum Kwon , Joon Suk Oh , Dong Won Park , Chul Hee Kim
IPC分类号： C08G69/08
CPC分类号： C07D251/20 , C07D251/30 , C08G73/1042 , C08G73/106 , C08G73/1085 , G02F1/133723 , Y10T428/10 , Y10T428/1005 , Y10T428/31721
摘要： Diamine compound containing specific triazine group, polyamic acid obtained by reacting the diamine compound and tetracarboxylic dianhydride, and liquid crystal alignment film obtained by coating and imidizing the polyamic acid. The liquid crystal alignment film has good heat-resistance, high transparency in visible light region and improved voltage holding ratio. Also, pretilt angle is easily controlled over broad range.
摘要翻译：含有特定三嗪基的二胺化合物，二胺化合物和四羧酸二酐反应得到的聚酰胺酸，以及通过对聚酰胺酸进行酰亚胺化得到的液晶取向膜。液晶取向膜具有良好的耐热性，可见光区域的高透明度和电压保持率的提高。此外，预倾角容易控制在宽范围内。

5. 发明申请

US20080006899A1 Schottky diode and method of fabricating the same 审中-公开
标题翻译：肖特基二极管及其制造方法
公开(公告)号：US20080006899A1
公开(公告)日：2008-01-10
申请号：US11797560
申请日：2007-05-04
申请人： Dae-Shik Kim , Oh-Kyum Kwon , Myung-Hee Kim , Yong-Chan Kim , Hye-Young Park , Joon-Suk Oh
发明人： Dae-Shik Kim , Oh-Kyum Kwon , Myung-Hee Kim , Yong-Chan Kim , Hye-Young Park , Joon-Suk Oh
IPC分类号： H01L29/47 , H01L21/28
CPC分类号： H01L29/872 , H01L29/0619 , H01L29/0649 , H01L29/47 , H01L29/66143
摘要： A schottky diode may include a schottky junction including a well formed in a semiconductor substrate and a first electrode contacting the first well. The well may have a first conductivity type. A first ohmic junction may include a first junction region formed in the well and a second electrode contacting the first junction region. The first junction region may have a higher concentration of the first conductivity type than the well. A first device isolation region may be formed in the semiconductor substrate separating the schottky junction and the first ohmic junction. A well guard having a second conductivity type opposite to the first conductivity type may be formed in the well. At least a portion of the well guard may, be formed under a portion of the schottky junction.
摘要翻译：肖特基二极管可以包括包括在半导体衬底中形成的阱和与第一阱接触的第一电极的肖特基结。该井可具有第一导电类型。第一欧姆结可以包括形成在阱中的第一结区域和与第一结区接触的第二电极。第一结区可能具有比阱更高的第一导电类型的浓度。可以在分离肖特基结和第一欧姆结的半导体衬底中形成第一器件隔离区。可以在井中形成具有与第一导电类型相反的第二导电类型的保护罩。可以在肖特基结的一部分下方形成阱护罩的至少一部分。

6. 发明授权

US08907391B2 Semiconductor device and method of manufacturing the semiconductor device 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08907391B2
公开(公告)日：2014-12-09
申请号：US13614654
申请日：2012-09-13
申请人： Jung-Soo Nam , Joon-Suk Oh , Hye-Young Park
发明人： Jung-Soo Nam , Joon-Suk Oh , Hye-Young Park
IPC分类号： H01L29/94 , H01L29/78
CPC分类号： H01L29/78 , H01L27/0629 , H01L27/0811 , H01L29/66181 , H01L29/94
摘要： A semiconductor device includes a substrate including an active region having an isolated shape and a field region. A gate insulation layer is provided on an upper surface of the active region of the substrate. A gate electrode is provided on the gate insulation layer and spaced apart from the boundary of the active region to cover the middle portion of the active region. An impurity region is provided under a surface of the active region that is exposed by the gate electrode.
摘要翻译：半导体器件包括具有隔离形状的有源区和场区的衬底。栅极绝缘层设置在衬底的有源区的上表面上。栅电极设置在栅绝缘层上并与有源区的边界隔开以覆盖有源区的中间部分。在由栅电极露出的有源区的表面下方设置有杂质区。

7. 发明授权

US07705409B2 High voltage transistors 有权
标题翻译：高压晶体管
公开(公告)号：US07705409B2
公开(公告)日：2010-04-27
申请号：US12014244
申请日：2008-01-15
申请人： Oh-kyum Kwon , Yong-chan Kim , Joon-suk Oh , Myung-hee Kim , Hye-young Park
发明人： Oh-kyum Kwon , Yong-chan Kim , Joon-suk Oh , Myung-hee Kim , Hye-young Park
IPC分类号： H01L29/78
CPC分类号： H01L29/78 , H01L29/0653 , H01L29/0692 , H01L29/66568
摘要： Some embodiments of the present invention provide high voltage transistors including a semiconductor substrate and a device isolation film defining an active region in the semiconductor substrate. A gate electrode extends along a central portion of the active region while maintaining a predetermined width on the semiconductor substrate. A second well is formed on both sides of the gate electrode in the semiconductor substrate, and partially extends to a bottom surface of the device isolation film. The active region in the semiconductor substrate comprises a first active region disposed under the gate electrode, and separating the device isolation film and a second active region defined by the first active region and the device isolation film. Methods of manufacturing high voltage transistors are also provided.
摘要翻译：本发明的一些实施例提供了包括半导体衬底和限定半导体衬底中的有源区的器件隔离膜的高压晶体管。栅电极沿着有源区的中心部分延伸，同时保持半导体衬底上的预定宽度。第二阱形成在半导体衬底中的栅电极的两侧，并且部分地延伸到器件隔离膜的底表面。半导体衬底中的有源区域包括设置在栅电极下方的第一有源区，以及分离器件隔离膜和由第一有源区和器件隔离膜限定的第二有源区。还提供制造高压晶体管的方法。

8. 发明申请

US20080185664A1 High Voltage Transistors 有权
标题翻译：高压晶体管
公开(公告)号：US20080185664A1
公开(公告)日：2008-08-07
申请号：US12014244
申请日：2008-01-15
申请人： Oh-kyum Kwon , Yong-chan Kim , Joon-suk Oh , Myung-hee Kim , Hye-young Park
发明人： Oh-kyum Kwon , Yong-chan Kim , Joon-suk Oh , Myung-hee Kim , Hye-young Park
IPC分类号： H01L29/78
CPC分类号： H01L29/78 , H01L29/0653 , H01L29/0692 , H01L29/66568
摘要： Some embodiments of the present invention provide high voltage transistors including a semiconductor substrate and a device isolation film defining an active region in the semiconductor substrate. A gate electrode extends along a central portion of the active region while maintaining a predetermined width on the semiconductor substrate. A second well is formed on both sides of the gate electrode in the semiconductor substrate, and partially extends to a bottom surface of the device isolation film. The active region in the semiconductor substrate comprises a first active region disposed under the gate electrode, and separating the device isolation film and a second active region defined by the first active region and the device isolation film. Methods of manufacturing high voltage transistors are also provided.
摘要翻译：本发明的一些实施例提供了包括半导体衬底和限定半导体衬底中的有源区的器件隔离膜的高压晶体管。栅电极沿着有源区的中心部分延伸，同时保持半导体衬底上的预定宽度。第二阱形成在半导体衬底中的栅电极的两侧，并且部分地延伸到器件隔离膜的底表面。半导体衬底中的有源区域包括设置在栅电极下方的第一有源区，以及分离器件隔离膜和由第一有源区和器件隔离膜限定的第二有源区。还提供制造高压晶体管的方法。

9. 发明申请

US20120237692A1 EFFECTIVE COATING METHOD FOR PLATE TYPE NANO MATERIALS ON LARGE AREA SUBSTRATE 审中-公开
标题翻译：用于大面积基板上的板状纳米材料的有效涂层方法
公开(公告)号：US20120237692A1
公开(公告)日：2012-09-20
申请号：US13418732
申请日：2012-03-13
申请人： Jae Do NAM , Joon Suk Oh , Tae Seon Hwang
发明人： Jae Do NAM , Joon Suk Oh , Tae Seon Hwang
IPC分类号： B05D1/18 , C09D5/00 , B05D3/02 , B05D3/00 , B05D3/10
CPC分类号： B05D1/185 , B05D3/02 , B05D3/0486 , B05D3/142 , B82Y30/00 , B82Y40/00 , C09D5/24 , C09D7/70
摘要： A method for coating a substrate with a plate type nanomaterial is provided. The method involves preparing a dispersed solution containing the plate type nanomaterial and a surface active agent, dipping the substrate into the dispersed solution, and drying the substrate after withdrawing the substrate from the dispersed solution. Also provided herein are a dipping solution used for coating the substrate, and a method of preparing a dipping solution for coating a substrate with a plate type nanomaterial.
摘要翻译：提供了一种用板状纳米材料涂覆基板的方法。该方法包括制备含有板型纳米材料和表面活性剂的分散溶液，将基材浸入分散的溶液中，并在从分散溶液中取出基材后干燥基材。本文还提供了用于涂布基材的浸渍溶液，以及制备用板状纳米材料涂覆基材的浸渍溶液的方法。

10. 发明申请

US20100200945A1 Schottky diode and method of fabricating the same 有权
标题翻译：肖特基二极管及其制造方法
公开(公告)号：US20100200945A1
公开(公告)日：2010-08-12
申请号：US12662452
申请日：2010-04-19
申请人： Dae-Shik Kim , Oh-Kyum Kwon , Myung-Hee Kim , Yong-Chan Kim , Hye-Young Park , Joon-Suk Oh
发明人： Dae-Shik Kim , Oh-Kyum Kwon , Myung-Hee Kim , Yong-Chan Kim , Hye-Young Park , Joon-Suk Oh
IPC分类号： H01L29/872
CPC分类号： H01L29/872 , H01L29/0619 , H01L29/0649 , H01L29/47 , H01L29/66143
摘要： A schottky diode may include a schottky junction including a well formed in a semiconductor substrate and a first electrode contacting the first well. The well may have a first conductivity type. A first ohmic junction may include a first junction region formed in the well and a second electrode contacting the first junction region. The first junction region may have a higher concentration of the first conductivity type than the well. A first device isolation region may be formed in the semiconductor substrate separating the schottky junction and the first ohmic junction. A well guard having a second conductivity type opposite to the first conductivity type may be formed in the well. At least a portion of the well guard may be formed under a portion of the schottky junction.
摘要翻译：肖特基二极管可以包括包括在半导体衬底中形成的阱和与第一阱接触的第一电极的肖特基结。该井可具有第一导电类型。第一欧姆结可以包括形成在阱中的第一结区域和与第一结区接触的第二电极。第一结区可能具有比阱更高的第一导电类型的浓度。可以在分离肖特基结和第一欧姆结的半导体衬底中形成第一器件隔离区。可以在井中形成具有与第一导电类型相反的第二导电类型的保护罩。阱护套的至少一部分可以形成在肖特基结的一部分下方。

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