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1. 发明申请

US20130146342A1 PATTERN-FORMING COMPOSITION AND PATTERN-FORMING METHOD USING THE SAME 审中-公开
公开(公告)号：US20130146342A1
公开(公告)日：2013-06-13
申请号：US13611220
申请日：2012-09-12
申请人： Yong Sung EOM , Kwang-Seong Choi , Hyun-cheol Bae , Jung Hyun Noh , Jong Tae Moon
发明人： Yong Sung EOM , Kwang-Seong Choi , Hyun-cheol Bae , Jung Hyun Noh , Jong Tae Moon
IPC分类号： H01B1/02 , H05K3/00 , C25D5/02 , H05K1/09 , H05K3/12
CPC分类号： H05K3/1216 , C25D5/02 , H01B1/02 , H01B1/22 , H05K1/09 , H05K1/095 , H05K3/102 , H05K3/188 , H05K3/246 , H05K2201/0245 , H05K2201/0302 , H05K2203/0425
摘要： The present invention relates to a pattern-forming composition used to form a conductive circuit pattern. The pattern-forming composition comprises Cu powders, a solder for electrically coupling the Cu powders, a polymer resin, a curing agent and a reductant. According to the present invention, a circuit pattern having superior conductivity can be formed at low cost.

2. 发明授权

US08420722B2 Composition and methods of forming solder bump and flip chip using the same 有权
公开(公告)号：US08420722B2
公开(公告)日：2013-04-16
申请号：US12476925
申请日：2009-06-02
申请人： Yong Sung Eom , Jong Tae Moon , Sangwon Oh , Keonsoo Jang
发明人： Yong Sung Eom , Jong Tae Moon , Sangwon Oh , Keonsoo Jang
IPC分类号： B60C1/00
CPC分类号： H05K13/0465 , B23K3/0623 , B23K35/24 , B23K35/34 , B23K35/3601 , B23K35/3613 , B23K2101/36 , B82Y10/00 , H01L24/29 , H01L24/30 , H01L24/83 , H01L2224/1141 , H01L2224/1152 , H01L2224/1184 , H01L2224/16238 , H01L2224/27416 , H01L2224/2784 , H01L2224/3003 , H01L2224/73104 , H01L2224/73204 , H01L2224/81355 , H01L2224/83886 , H05K3/323 , H05K3/3436 , H05K3/3484 , H05K3/46 , H05K2201/026 , H05K2201/10977 , Y10T29/49117 , Y10T29/49126
摘要： Provided are a composition for an anisotropic conductive adhesive, a method of forming a solder bump and a method of forming a flip chip using the same. The composition for an anisotropic conductive adhesive includes a low melting point solder particle and a thermo-curable polymer resin. The anisotropic conductive adhesive includes forming a mixture by mixing a polymer resin and a curing agent, and mixing a deforming agent, a catalyst or a reductant with the mixture.

3. 发明申请

US20130087884A1 SILICON INTERPOSER INCLUDING BACKSIDE INDUCTOR 失效
标题翻译：硅绝缘子，包括背面电感器
公开(公告)号：US20130087884A1
公开(公告)日：2013-04-11
申请号：US13493458
申请日：2012-06-11
申请人： Hyun-Cheol BAE , Kwang-Seong CHOI , Jong Tae Moon , Jong-Moon PARK
发明人： Hyun-Cheol BAE , Kwang-Seong CHOI , Jong Tae Moon , Jong-Moon PARK
IPC分类号： H01L27/08
CPC分类号： H01L27/08 , H01L23/147 , H01L23/481 , H01L23/49822 , H01L23/49827 , H01L23/5227 , H01L27/0694 , H01L2924/0002 , H01L2924/19042 , H01L2924/00
摘要： Disclosed is a silicon interposer that can reduce the entire area of a semiconductor package and increase the degree of integration by forming inductors at a lower part in addition to an upper part of a silicon substrate. The silicon interposer includes a silicon substrate, an upper inductor layer formed at the upper part of the silicon substrate and a lower inductor layer formed at the lower part of the silicon substrate.
摘要翻译：公开了一种硅插入器，其可以减少半导体封装的整个面积，并且除了硅衬底的上部之外，通过在下部形成电感器来增加集成度。硅插入器包括硅衬底，形成在硅衬底的上部的上电感器层和形成在硅衬底的下部的下电感层。

4. 发明授权

US08211745B2 Method and structure for bonding flip chip 有权
标题翻译：键合倒装芯片的方法和结构
公开(公告)号：US08211745B2
公开(公告)日：2012-07-03
申请号：US12761715
申请日：2010-04-16
申请人： Yong Sung Eom , Jong Tae Moon , Kwang-Seong Choi
发明人： Yong Sung Eom , Jong Tae Moon , Kwang-Seong Choi
IPC分类号： H01L21/60 , H01L21/44 , H01L23/498
CPC分类号： H01L25/50 , H01L24/29 , H01L2224/114 , H01L2224/1152 , H01L2224/13109 , H01L2224/13111 , H01L2224/13113 , H01L2224/13116 , H01L2224/13139 , H01L2224/13147 , H01L2224/1403 , H01L2224/16225 , H01L2224/16227 , H01L2224/2919 , H01L2224/2929 , H01L2224/73104 , H01L2224/73204 , H01L2224/81191 , H01L2224/83101 , H01L2224/83138 , H01L2224/83191 , H01L2225/06513 , H01L2225/06575 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/0133 , H01L2924/014 , H01L2924/15787 , H01L2924/01083 , H01L2924/00014 , H01L2924/00012
摘要： Provided is a method and structure for bonding a flip chip while increasing the manufacturing yield. In the method, solder bumps are formed on first electrodes and/or second electrodes disposed on first and second substrates, respectively. In addition, the first and second electrodes are arranged to face each other with a second resin including spacer balls being disposed between the first and second substrates. In addition, while flowing the second resin, the first and second substrates are pressed until the distance between the first and second substrates is decreased smaller than diameter of the spacer balls so as to connect the solder bumps between the first and second electrodes.
摘要翻译：提供了一种在提高制造成品率的同时将倒装芯片接合的方法和结构。在该方法中，分别在设置在第一和第二基板上的第一电极和/或第二电极上形成焊料凸点。此外，第一和第二电极被布置成使第二树脂彼此面对，该第二树脂包括设置在第一和第二基板之间的间隔球。此外，在流动第二树脂时，第一和第二基板被压制直到第一和第二基板之间的距离小于间隔球的直径，以便连接第一和第二电极之间的焊料凸块。

5. 发明申请

US20120164787A1 VACUUM WAFER LEVEL PACKAGING METHOD FOR MICRO ELECTRO MECHANICAL SYSTEM DEVICE 有权
标题翻译：用于微电子机械系统装置的真空水平包装方法
公开(公告)号：US20120164787A1
公开(公告)日：2012-06-28
申请号：US13309582
申请日：2011-12-02
申请人： Jong Tae Moon , Yong Sung Eom , Hyun-Cheol Bae
发明人： Jong Tae Moon , Yong Sung Eom , Hyun-Cheol Bae
IPC分类号： H01L21/60
CPC分类号： B81C1/00293 , B81C2203/0145 , B81C2203/035 , H01L21/50 , H01L23/10 , H01L24/05 , H01L24/13 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/81 , H01L24/83 , H01L24/94 , H01L2224/0401 , H01L2224/05568 , H01L2224/131 , H01L2224/16238 , H01L2224/291 , H01L2224/81815 , H01L2224/83815 , H01L2224/94 , H01L2924/00014 , H01L2924/1461 , H01L2924/014 , H01L2224/81 , H01L2224/83 , H01L2924/00 , H01L2224/05552
摘要： Disclosed is a vacuum wafer level packaging method for a micro electro mechanical system device, including: forming a plurality of via holes on an upper wafer for protecting a micro electro mechanical system (MEMS) wafer; forming at least one metal layer on inner walls of the plurality of via holes and regions extended from the plurality of via holes; arranging and bonding the upper wafer and the MEMS wafer at atmospheric pressure; applying solder paste to the regions extended from the plurality of via holes; filling a solder in the plurality of via holes by increasing the temperature of a high-vacuum chamber to melt the solder paste; and changing the solder in the plurality of via holes to a solid state by lowering the temperature of the high-vacuum chamber.
摘要翻译：公开了一种用于微机电系统装置的真空晶片级封装方法，包括：在上晶片上形成多个通孔，用于保护微机电系统（MEMS）晶片; 在所述多个通孔的内壁和从所述多个通孔延伸的区域中形成至少一个金属层; 在大气压下布置和粘合上晶片和MEMS晶片; 将焊膏施加到从所述多个通孔延伸的区域; 通过增加高真空室的温度来熔化焊膏，在多个通孔中填充焊料; 并且通过降低高真空室的温度将多个通孔中的焊料改变为固态。

6. 发明申请

US20110227228A1 FILLING COMPOSITION, SEMICONDUCTOR DEVICE INCLUDING THE SAME, AND METHOD OF FABRICATING THE SEMICONDUCTOR DEVICE 审中-公开
标题翻译：填充组合物，包括其的半导体器件以及制造半导体器件的方法
公开(公告)号：US20110227228A1
公开(公告)日：2011-09-22
申请号：US12886927
申请日：2010-09-21
申请人： Yong Sung EOM , Jong Tae Moon , Kwang-Seong Choi , Hyun-cheol Bae , Jong Jin Lee
发明人： Yong Sung EOM , Jong Tae Moon , Kwang-Seong Choi , Hyun-cheol Bae , Jong Jin Lee
IPC分类号： H01L23/488 , H01B1/22 , H01L21/50
CPC分类号： B23K35/025 , B23K35/262 , B23K35/264 , B23K35/268 , B23K35/3006 , B23K35/302 , B23K35/3613 , H01L23/49866 , H01L24/29 , H01L24/32 , H01L24/83 , H01L2224/29101 , H01L2224/29109 , H01L2224/29111 , H01L2224/2919 , H01L2224/2929 , H01L2224/293 , H01L2224/29309 , H01L2224/29311 , H01L2224/29313 , H01L2224/29316 , H01L2224/29339 , H01L2224/29347 , H01L2224/29499 , H01L2224/83101 , H01L2224/83191 , H01L2224/838 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01082 , H01L2924/0132 , H01L2924/0133 , H01L2924/014 , H01L2924/0665 , H05K3/321 , H05K2201/0245 , H05K2203/0425 , H01L2924/00 , H01L2924/01083 , H01L2924/00014 , H01L2924/00012
摘要： Provided is a filling composition. The filling composition includes: a first particle including Cu and/or Ag; a second particle electrically connecting the first particles; and a resin containing a high molecular compound, a hardener, and a reducer, in which the first and second particles are dispersed, wherein the hardener includes amine and/or anhydride, and the reducer includes carboxyl.
摘要翻译：提供了一种填充组合物。填充组合物包括：包含Cu和/或Ag的第一颗粒; 电连接第一颗粒的第二颗粒; 以及分散有第一和第二粒子的含有高分子化合物，硬化剂和还原剂的树脂，其中所述固化剂包括胺和/或酸酐，所述还原剂包括羧基。

7. 发明授权

US07985697B2 Wafer level package and method of fabricating the same 有权
标题翻译：晶圆级封装及其制造方法
公开(公告)号：US07985697B2
公开(公告)日：2011-07-26
申请号：US12208512
申请日：2008-09-11
申请人： Jong Tae Moon , Yong Sung Eom , Min Ji Lee , Hyun Kyu Yu
发明人： Jong Tae Moon , Yong Sung Eom , Min Ji Lee , Hyun Kyu Yu
IPC分类号： H01L21/31
CPC分类号： H01L23/10 , B81B7/007 , B81C2203/0118 , H01L24/45 , H01L24/48 , H01L24/94 , H01L2224/16145 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2924/00014 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/1461 , H01L2924/16235 , H01L2924/00 , H01L2924/2076 , H01L2224/05599
摘要： Provided are a wafer level package in which a communication line can be readily formed between an internal device and the outside of the package, and a method of fabricating the wafer level package. The wafer level package includes a first substrate having a cavity in which a first internal device is disposed, an Input/Output (I/O) pad formed on the first substrate and electrically connected with the first internal device, a second substrate disposed over the first substrate and from which a part corresponding to the I/O pad is removed, and a solder bonding the first and second substrates. According to the wafer level package and the method of fabricating the same, upper and lower substrates are sawed to different cutting widths, or a hole is formed in the upper substrate, such that a communication line of an internal device can be readily formed without a via process which penetrates a substrate. Therefore, in comparison with a conventional wafer level package fabricated using the via process, it is possible to simplify a fabrication process and reduce production cost.
摘要翻译：提供了一种晶片级封装，其中可以容易地在内部器件和封装外部之间形成通信线，以及制造晶片级封装的方法。晶片级封装包括具有第一内部器件的空腔的第一衬底，形成在第一衬底上并与第一内部器件电连接的输入/输出（I / O）焊盘，设置在第一衬底上的第二衬底第一衬底并且从其中除去对应于I / O焊盘的部分，以及焊接第一和第二衬底的焊料。根据晶片级封装及其制造方法，上下基板被切割成不同的切割宽度，或者在上基板上形成孔，使得可以容易地形成内部装置的连通线，而不需要穿过基底的过程。因此，与使用通孔工艺制造的常规晶片级封装相比，可以简化制造工艺并降低生产成本。

8. 发明授权

US07012939B2 Wavelength stabilization module having light-receiving element array and method of manufacturing the same 失效
标题翻译：具有光接收元件阵列的波长稳定模块及其制造方法
公开(公告)号：US07012939B2
公开(公告)日：2006-03-14
申请号：US10648238
申请日：2003-08-27
申请人： Kwang Seong Choi , Heung Woo Park , Ho Gyeong Yun , Byung Seok Choi , Yong Sung Eom , Jong Hyun Lee , Jong Tae Moon
发明人： Kwang Seong Choi , Heung Woo Park , Ho Gyeong Yun , Byung Seok Choi , Yong Sung Eom , Jong Hyun Lee , Jong Tae Moon
IPC分类号： H01S3/13 , G01B9/02
CPC分类号： H04B10/572
摘要： A wavelength stabilization module having a light-receiving element array and a method of manufacturing the same are disclosed. The wavelength stabilization module having a laser diode which irradiates a laser beam at the front side and the rear side thereof comprises a collimator for paralleling the laser beam irradiated at the rear side; a beam splitter for splitting the laser beam passed through the collimator into the two directional laser beams; a light-receiving element for receiving one of the split laser beams; a filter for transmitting a specific wavelength of the other of the split laser beams; a light-receiving element array for receiving the laser beam passed through the filter; and a controller for controlling the output wavelength of the laser diode by using the signals output from the light-receiving element and the light-receiving element array, and the filter and the light-receiving element array are tilted at a predetermined angle with respect to the laser beam and lock the wavelength by using an incident angle dependency of the laser beam passed through the filter.
摘要翻译：公开了具有光接收元件阵列的波长稳定模块及其制造方法。具有在其前侧和后侧照射激光束的激光二极管的波长稳定模块包括用于与在后侧照射的激光束并联的准直器; 用于将穿过准直器的激光束分成两个定向激光束的分束器; 用于接收所述分离激光束中的一个的光接收元件; 用于传输另一个分离激光束的特定波长的滤波器; 用于接收通过过滤器的激光束的光接收元件阵列; 以及控制器，用于通过使用从光接收元件和光接收元件阵列输出的信号来控制激光二极管的输出波长，并且滤光器和光接收元件阵列相对于激光束并通过使用通过过滤器的激光束的入射角依赖性来锁定波长。

9. 发明授权

US07009716B2 System for monitoring optical output/wavelength 失效
标题翻译：监控光输出/波长的系统
公开(公告)号：US07009716B2
公开(公告)日：2006-03-07
申请号：US10802095
申请日：2004-03-15
申请人： Jong-Deog Kim , Byung-Seok Choi , Jong-Hyun Lee , Hogyeong Yun , Kwang-Seong Choi , Jong-Tae Moon
发明人： Jong-Deog Kim , Byung-Seok Choi , Jong-Hyun Lee , Hogyeong Yun , Kwang-Seong Choi , Jong-Tae Moon
IPC分类号： G01B9/02 , H01S3/04
CPC分类号： H01S5/0612 , H01S5/0683 , H01S5/0687
摘要： A system for monitoring an optical output/wavelength is employed to be used for a WDM system having a narrow channel space by structuring an etalon and photodiode as an integrated structure. The system includes: a laser source control unit for controlling the laser source; an optical/wavelength monitoring unit for monitoring an optical output/wavelength of the controlled laser source; a TEC control unit for controlling a TEC in order to constantly maintain the laser source of the optical output/wavelength monitoring unit to have a predetermined temperature; a temperature control unit for controlling a heater and a thermistor to set an etalon to a predetermined temperature, wherein the heater is attached on the optical output/wavelength monitoring unit and the thermistor is attached on the heater; a comparison unit for comparing the optical output signal and the wavelength signal, each of which is monitored by the optical output/wavelength monitoring unit; and a processing unit for comparing values of the compared signals with a preset value to control an input current or a temperature of the laser source.
摘要翻译：用于监测光输出/波长的系统被用于通过构造标准具和光电二极管作为一体结构而具有窄通道空间的WDM系统。该系统包括：用于控制激光源的激光源控制单元; 用于监测受控激光源的光输出/波长的光/波长监测单元; 用于控制TEC的TEC控制单元，以便将光输出/波长监视单元的激光源恒定地保持为预定温度; 温度控制单元，用于控制加热器和热敏电阻以将标准具设定到预定温度，其中加热器安装在光输出/波长监测单元上，热敏电阻附着在加热器上; 比较单元，用于比较光输出信号和波长信号，每个波长信号由光输出/波长监测单元监视; 以及处理单元，用于将比较的信号的值与预设值进行比较，以控制激光源的输入电流或温度。

10. 发明申请

US20120240727A1 METHOD OF MANUFACTURING SOLDER POWDER HAVING DIAMETER OF SUB-MICROMETERS OR SEVERAL MICROMETERS 审中-公开
标题翻译：制造具有小分子或多个微细颗粒的直径的焊料粉末的方法
公开(公告)号：US20120240727A1
公开(公告)日：2012-09-27
申请号：US13364347
申请日：2012-02-02
申请人： Yong Sung EOM , Jong Tae MOON , Kwang Seong CHOI
发明人： Yong Sung EOM , Jong Tae MOON , Kwang Seong CHOI
IPC分类号： B22F9/04
CPC分类号： B22F9/04 , B22F9/06 , B22F2998/10 , B23K35/0244 , C22C1/0483 , B22F1/0059 , B22F1/0077 , B22F2202/01
摘要： Disclosed is a method of manufacturing a solder powder having a diameter of sub-micrometers or several micrometers, the method including: mixing solder powder having a diameter of 10 to 1000 micrometers with a polymer resin to obtain a mixture; heating the mixture to a temperature higher than a melting point of the solder powder in the mixture; applying ultrasonic waves to the heated mixture so that the diameter of the solder powder becomes 0.1 to 10 micrometers; and cooling the mixture to the room temperature without exposing the solder powder of 0.1 to 10 micrometers to the air.
摘要翻译：公开了一种制造直径为亚微米或几微米的焊料粉末的方法，该方法包括：将具有10至1000微米直径的焊料粉末与聚合物树脂混合以获得混合物; 将混合物加热到高于混合物中焊料粉末的熔点的温度; 向加热的混合物施加超声波，使得焊料粉末的直径为0.1至10微米; 并将混合物冷却至室温，而不会将0.1至10微米的焊料粉末暴露于空气中。

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