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1. 发明授权

US5692153A Method and system for verifying execution order within a multiprocessor data processing system 失效
标题翻译：用于验证多处理器数据处理系统内的执行顺序的方法和系统
公开(公告)号：US5692153A
公开(公告)日：1997-11-25
申请号：US405058
申请日：1995-03-16
申请人： Nadeem Malik , Brian O'Krafka , Avijit Saha , Shahram Salamian
发明人： Nadeem Malik , Brian O'Krafka , Avijit Saha , Shahram Salamian
IPC分类号： G06F15/16 , G06F11/28 , G06F12/08 , G06F15/177 , G06F13/00
CPC分类号： G06F12/0806 , G06F11/28
摘要： A method and system are disclosed for verifying consistency of an instruction execution order of a multiprocessor data processing system with a specified memory consistency model. Each processor within the multiprocessor data processing system executes instructions from an associated one of a number of instruction streams, which include instructions that store a number of unique values from multiple processors to a single selected address within memory. One of the unique values is loaded from the selected address to a particular processor within the data processing system. A set of valid values which may be returned by the loading step is determined according to the specified memory consistency model. By comparing the unique value with members of the set of valid values, the instruction execution order of the multiprocessor data processing system is verified. Utilizing the unique value which was returned by the load instruction, the set of valid values may then be updated.
摘要翻译：公开了一种用于验证多处理器数据处理系统的指令执行顺序与指定的存储器一致性模型的一致性的方法和系统。多处理器数据处理系统中的每个处理器从多个指令流中的相关联的一个指令流中执行指令，指令流包括将多个处理器的唯一值存储到存储器内的单个选定地址的指令。唯一值中的一个从所选地址加载到数据处理系统中的特定处理器。根据指定的内存一致性模型确定可由加载步骤返回的一组有效值。通过将唯一值与有效值集合的成员进行比较，验证多处理器数据处理系统的指令执行顺序。利用加载指令返回的唯一值，然后可以更新该组有效值。

2. 发明申请

US20050120182A1 Method and apparatus for implementing cache coherence with adaptive write updates 审中-公开
标题翻译：用于实现与自适应写入更新的高速缓存一致性的方法和装置
公开(公告)号：US20050120182A1
公开(公告)日：2005-06-02
申请号：US10726787
申请日：2003-12-02
申请人： Michael Koster , Brian O'Krafka , Roy Moore
发明人： Michael Koster , Brian O'Krafka , Roy Moore
IPC分类号： G06F12/08 , G06F12/00
CPC分类号： G06F12/0831
摘要： One embodiment of the present invention provides a system that facilitates cache coherence with adaptive write updates. During operation, a cache is initialized to operate using a write-invalidate protocol. During program execution, the system monitors the dynamic behavior of the cache. If the dynamic behavior indicates that better performance can be achieved using a write-broadcast protocol, the system switches the cache to operate using the write-broadcast protocol.
摘要翻译：本发明的一个实施例提供了一种有助于与自适应写入更新的高速缓存一致性的系统。在操作期间，使用写无效协议来初始化高速缓存以进行操作。在程序执行期间，系统监视高速缓存的动态行为。如果动态行为表明可以使用写入 - 广播协议实现更好的性能，则系统将使用写入 - 广播协议切换高速缓存以进行操作。

3. 发明授权

US08385740B2 Arbitration scheme for an optical bus 有权
标题翻译：光学总线仲裁方案
公开(公告)号：US08385740B2
公开(公告)日：2013-02-26
申请号：US12176294
申请日：2008-07-18
申请人： Brian O'Krafka , Pranay Koka , John E. Cunningham , Ashok Krishnamoorthy , Xuezhe Zheng
发明人： Brian O'Krafka , Pranay Koka , John E. Cunningham , Ashok Krishnamoorthy , Xuezhe Zheng
IPC分类号： H04B10/20 , H04B10/08
CPC分类号： H04L12/413
摘要： A method of arbitrating data transmissions to prevent data collisions in an optical data interconnect system including a transmitting node, a plurality of receiving nodes, and one or more remaining nodes connected through an optical data channel. The method involves transmitting a transmission request signal from the transmitting node over an arbitration channel corresponding to the transmitting node, monitoring, at the transmitting node, a plurality of arbitration channels corresponding to each of the plurality of receiving nodes and the one or more remaining nodes at the transmitting node for a predetermined period of time, determining a start time for a data transmission from the transmitting node based on the monitored signals to prevent a data collision, and initiating a data transmission of a data signal from the transmitting node over the optical data channel at the determined start time.
摘要翻译：一种仲裁数据传输的方法，以防止包括发送节点，多个接收节点以及通过光数据信道连接的一个或多个剩余节点的光数据互连系统中的数据冲突。该方法涉及通过对应于发送节点的仲裁信道从发送节点发送发送请求信号，在发送节点处监视与多个接收节点中的每一个对应的多个仲裁信道，以及一个或多个剩余节点在发送节点预定的时间段内，基于所监视的信号确定来自发送节点的数据传输的开始时间，以防止数据冲突，以及通过光学发送来自发送节点的数据信号的数据传输数据通道在确定的开始时间。

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