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1. 发明申请

US20080024202A1 HIGH VOLTAGE GENERATING CIRCUIT PRESERVING CHARGE PUMPING EFFICIENCY 失效
标题翻译：高电压发生电路保护充电泵送效率
公开(公告)号：US20080024202A1
公开(公告)日：2008-01-31
申请号：US11865863
申请日：2007-10-02
申请人： Jeong-hoon KOOK , Jung-hwa LEE , Jung-suk KIM , Dae-hwan KIM
发明人： Jeong-hoon KOOK , Jung-hwa LEE , Jung-suk KIM , Dae-hwan KIM
IPC分类号： G05F3/02
CPC分类号： G11C5/145 , G11C11/4074 , H02M3/07
摘要： A high voltage generating circuit is disclosed. In the high voltage generating circuit a boost node is precharged and boosted by a plurality of pump circuits and then discharged to an output terminal. Where a voltage apparent at the boost node is smaller than a power supply voltage, the voltage apparent at the boost node is elevated to the power supply voltage. Where the voltage apparent at the boost node is larger than the power supply voltage, a current path is prevented from forming between the boost node and the power supply voltage so as to maintain the voltage apparent at the boost node.
摘要翻译：公开了一种高压发生电路。在高电压产生电路中，升压节点由多个泵电路预充电并升压，然后放电到输出端子。在升压节点处的电压明显小于电源电压的情况下，升压节点处的电压升高到电源电压。在升压节点处的电压明显大于电源电压的情况下，防止在升压节点和电源电压之间形成电流路径，以保持升压节点处的电压明显。

2. 发明授权

US07277977B2 DRAM for high-speed data access 失效
标题翻译： DRAM用于高速数据访问
公开(公告)号：US07277977B2
公开(公告)日：2007-10-02
申请号：US10330482
申请日：2002-12-30
申请人： Jeong-Hoon Kook , Sang-Hoon Hong , Se-Jun Kim
发明人： Jeong-Hoon Kook , Sang-Hoon Hong , Se-Jun Kim
IPC分类号： G06F12/00
CPC分类号： G06F12/0893 , G06F12/0607 , G06F2212/3042 , G11C11/4076 , G11C2207/2245
摘要： A DRAM with a general interleaving scheme for data input/output uses a normal bank structure. The DRAM provides a high-performance without consideration of a data access pattern. In order to implement the high-performance, the DRAM includes a plurality of normal banks, at least one cache bank, which has the same data access scheme with the normal banks, for selectively storing data with a normal bank selected at a read mode and a controller for controlling the access to the cache bank and the selected normal bank when continuous read commands are occurred to the selected normal bank.
摘要翻译：具有用于数据输入/输出的通用交织方案的DRAM使用正常的存储体结构。 DRAM提供高性能而不考虑数据访问模式。为了实现高性能，DRAM包括多个正常库，至少一个与正常库具有相同数据访问方案的高速缓存组，用于选择性地以读取模式选择存储与正常存储库的数据;以及控制器，用于在连续读取命令发生到所选择的法线段时控制对高速缓存组和所选择的法线库的访问。

3. 发明授权

US06327204B1 Method of storing information in a memory cell 失效
标题翻译：将信息存储在存储单元中的方法
公开(公告)号：US06327204B1
公开(公告)日：2001-12-04
申请号：US09722023
申请日：2000-11-27
申请人： Jeong Hoon Kook , Hoi Jun Yoo
发明人： Jeong Hoon Kook , Hoi Jun Yoo
IPC分类号： G11C1300
CPC分类号： G11C11/4091 , G11C7/06 , G11C2207/005
摘要： A method of storing information in a memory cell. The method writes information via only the bit-line that is connected to a memory cell with respect to a word-line, and thus reduces the overall power consumption in the memory by reducing the unnecessary power consumption occurring from the change of voltage level in the bit-line that is not connected to a memory cell. To this end, a method of storing information in a memory cell having a sense amplifier which differentially amplifies a difference in voltage level between a pair of bit-lines is provided, the method comprising the steps of activating a word-line connected to the memory cell to be accessed, differentially amplifying the difference in voltage level between the pair of bit-lines coupled to the memory cell to be accessed, and selecting only one bit-line that is connected to the memory cell among the pair of bit-lines and rewriting the information via the one bit-line.
摘要翻译：一种将信息存储在存储单元中的方法。该方法仅通过相对于字线连接到存储单元的位线来写入信息，从而通过减少从存储器单元中的电压电平的变化而发生的不必要的功率消耗来降低存储器的总功耗未连接到存储单元的位线。为此，提供了一种在具有差分放大一对位线之间的电压电平差的读出放大器的存储单元中存储信息的方法，该方法包括以下步骤：激活连接到存储器的字线要差分地放大耦合到要访问的存储器单元的一对比特线之间的电压电平差，并且仅选择连接到所述一对位线中的存储器单元的一个位线，以及通过一个位线重写信息。

4. 发明授权

US06757210B2 Semiconductor memory device 有权
标题翻译：半导体存储器件
公开(公告)号：US06757210B2
公开(公告)日：2004-06-29
申请号：US10330892
申请日：2002-12-27
申请人： Sang Hoon Hong , Se Jun Kim , Jeong Hoon Kook
发明人： Sang Hoon Hong , Se Jun Kim , Jeong Hoon Kook
IPC分类号： G11C800
CPC分类号： G11C7/1066 , G11C7/10 , G11C2207/002
摘要： A semiconductor memory device configured to share a local I/O line is described herein. The device includes: a memory cell array including a plurality of memory cells; a plurality of bit line sense amplifiers configured to sense and to amplify data stored in the plurality of memory cells; a plurality of bit lines configured to transmit transmitting the data stored in the plurality of memory cells to the plurality of bit line sense amplifiers, respectively; a plurality of bit line dividing circuits configured to selectively divide the plurality of bit lines; and a plurality of column selecting circuits configured to sequentially transmit the data amplified by the plurality of bit line sense amplifiers to corresponding I/O lines.
摘要翻译：这里描述了配置成共享本地I / O线的半导体存储器件。该装置包括：包括多个存储单元的存储单元阵列; 多个位线读出放大器，被配置为感测和放大存储在所述多个存储器单元中的数据; 多个位线，被配置为分别将多个存储单元中存储的数据发送到多个位线读出放大器; 多个位线分割电路，被配置为选择性地划分所述多个位线; 以及多个列选择电路，被配置为顺序地将由多个位线读出放大器放大的数据发送到对应的I / O线。

5. 发明授权

US07573320B2 High voltage generating circuit preserving charge pumping efficiency 失效
公开(公告)号：US07573320B2
公开(公告)日：2009-08-11
申请号：US11865863
申请日：2007-10-02
申请人： Jeong-hoon Kook , Jung-hwa Lee , Jung-suk Kim , Dae-hwan Kim
发明人： Jeong-hoon Kook , Jung-hwa Lee , Jung-suk Kim , Dae-hwan Kim
IPC分类号： G05F1/10
CPC分类号： G11C5/145 , G11C11/4074 , H02M3/07
摘要： A high voltage generating circuit is disclosed. In the high voltage generating circuit a boost node is precharged and boosted by a plurality of pump circuits and then discharged to an output terminal. Where a voltage apparent at the boost node is smaller than a power supply voltage, the voltage apparent at the boost node is elevated to the power supply voltage. Where the voltage apparent at the boost node is larger than the power supply voltage, a current path is prevented from forming between the boost node and the power supply voltage so as to maintain the voltage apparent at the boost node.

6. 发明申请

US20080024200A1 HIGH VOLTAGE GENERATING CIRCUIT PRESERVING CHARGE PUMPING EFFICIENCY 失效
公开(公告)号：US20080024200A1
公开(公告)日：2008-01-31
申请号：US11865858
申请日：2007-10-02
申请人： Jeong-hoon KOOK , Jung-hwa LEE , Jung-suk KIM , Dae-hwan KIM
发明人： Jeong-hoon KOOK , Jung-hwa LEE , Jung-suk KIM , Dae-hwan KIM
IPC分类号： G05F3/02
CPC分类号： G11C5/145 , G11C11/4074 , H02M3/07
摘要： A high voltage generating circuit is disclosed. In the high voltage generating circuit a boost node is precharged and boosted by a plurality of pump circuits and then discharged to an output terminal. Where a voltage apparent at the boost node is smaller than a power supply voltage, the voltage apparent at the boost node is elevated to the power supply voltage. Where the voltage apparent at the boost node is larger than the power supply voltage, a current path is prevented from forming between the boost node and the power supply voltage so as to maintain the voltage apparent at the boost node.

7. 发明申请

US20050254308A1 High voltage generating circuit preserving charge pumping efficiency 失效
标题翻译：高压发生电路保持电荷泵浦效率
公开(公告)号：US20050254308A1
公开(公告)日：2005-11-17
申请号：US11103647
申请日：2005-04-12
申请人： Jeong-hoon Kook , Jung-hwa Lee , Jung-suk Kim , Dae-hwan Kim
发明人： Jeong-hoon Kook , Jung-hwa Lee , Jung-suk Kim , Dae-hwan Kim
IPC分类号： H02M3/07 , G11C5/14 , G11C7/00 , G11C7/12 , G11C11/407 , G11C11/4074 , G11C16/06
CPC分类号： G11C5/145 , G11C11/4074 , H02M3/07
摘要： A high voltage generating circuit is disclosed. In the high voltage generating circuit a boost node is precharged and boosted by a plurality of pump circuits and then discharged to an output terminal. Where a voltage apparent at the boost node is smaller than a power supply voltage, the voltage apparent at the boost node is elevated to the power supply voltage. Where the voltage apparent at the boost node is larger than the power supply voltage, a current path is prevented from forming between the boost node and the power supply voltage so as to maintain the voltage apparent at the boost node.
摘要翻译：公开了一种高压发生电路。在高电压产生电路中，升压节点由多个泵电路预充电并升压，然后放电到输出端子。在升压节点处的电压明显小于电源电压的情况下，升压节点处的电压升高到电源电压。在升压节点处的电压明显大于电源电压的情况下，防止在升压节点和电源电压之间形成电流路径，以保持升压节点处的电压明显。

8. 发明授权

US07573319B2 High voltage generating circuit preserving charge pumping efficiency 失效
公开(公告)号：US07573319B2
公开(公告)日：2009-08-11
申请号：US11865858
申请日：2007-10-02
申请人： Jeong-hoon Kook , Jung-hwa Lee , Jung-suk Kim , Dae-hwan Kim
发明人： Jeong-hoon Kook , Jung-hwa Lee , Jung-suk Kim , Dae-hwan Kim
IPC分类号： G01F1/10
CPC分类号： G11C5/145 , G11C11/4074 , H02M3/07
摘要： A high voltage generating circuit is disclosed. In the high voltage generating circuit a boost node is precharged and boosted by a plurality of pump circuits and then discharged to an output terminal. Where a voltage apparent at the boost node is smaller than a power supply voltage, the voltage apparent at the boost node is elevated to the power supply voltage. Where the voltage apparent at the boost node is larger than the power supply voltage, a current path is prevented from forming between the boost node and the power supply voltage so as to maintain the voltage apparent at the boost node.

9. 发明授权

US07511562B2 High voltage generating circuit preserving charge pumping efficiency 失效
标题翻译：高压发生电路保持电荷泵浦效率
公开(公告)号：US07511562B2
公开(公告)日：2009-03-31
申请号：US11865861
申请日：2007-10-02
申请人： Jeong-hoon Kook , Jung-hwa Lee , Jung-suk Kim , Dae-hwan Kim
发明人： Jeong-hoon Kook , Jung-hwa Lee , Jung-suk Kim , Dae-hwan Kim
IPC分类号： G05F1/10
CPC分类号： G11C5/145 , G11C11/4074 , H02M3/07
摘要： A high voltage generating circuit is disclosed. In the high voltage generating circuit a boost node is precharged and boosted by a plurality of pump circuits and then discharged to an output terminal. Where a voltage apparent at the boost node is smaller than a power supply voltage, the voltage apparent at the boost node is elevated to the power supply voltage. Where the voltage apparent at the boost node is larger than the power supply voltage, a current path is prevented from forming between the boost node and the power supply voltage so as to maintain the voltage apparent at the boost node.
摘要翻译：公开了一种高压发生电路。在高电压产生电路中，升压节点由多个泵电路预充电并升压，然后放电到输出端子。在升压节点处的电压明显小于电源电压的情况下，升压节点处的电压升高到电源电压。在升压节点处的电压明显大于电源电压的情况下，防止在升压节点和电源电压之间形成电流路径，以保持升压节点处的电压明显。

10. 发明申请

US20080024201A1 HIGH VOLTAGE GENERATING CIRCUIT PRESERVING CHARGE PUMPING EFFICIENCY 失效
公开(公告)号：US20080024201A1
公开(公告)日：2008-01-31
申请号：US11865861
申请日：2007-10-02
申请人： Jeong-hoon KOOK , Jung-hwa LEE , Jung-suk KIM , Dae-hwan KIM
发明人： Jeong-hoon KOOK , Jung-hwa LEE , Jung-suk KIM , Dae-hwan KIM
IPC分类号： G05F3/02
CPC分类号： G11C5/145 , G11C11/4074 , H02M3/07
摘要： A high voltage generating circuit is disclosed. In the high voltage generating circuit a boost node is precharged and boosted by a plurality of pump circuits and then discharged to an output terminal. Where a voltage apparent at the boost node is smaller than a power supply voltage, the voltage apparent at the boost node is elevated to the power supply voltage. Where the voltage apparent at the boost node is larger than the power supply voltage, a current path is prevented from forming between the boost node and the power supply voltage so as to maintain the voltage apparent at the boost node.

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