专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US07281196B2 Single error Reed-Solomon decoder 有权
标题翻译：单个错误里德 - 所罗门解码器
公开(公告)号：US07281196B2
公开(公告)日：2007-10-09
申请号：US10636997
申请日：2003-08-08
申请人： James Richard Pollock
发明人： James Richard Pollock
IPC分类号： H03M13/00
CPC分类号： H03M13/158 , H03M13/1515 , H03M13/1575
摘要： The error offset and the error magnitude of a data stream in a Read-Solomon code is calculated using the same architecture. The advantage this method has over previous techniques is its simplicity of design and the minimum steps required to convert the syndrome information into an error location and correction pattern. The maximum of four cycles (steps) needed to compute the offset and correction pattern allows for a correction to be applied in the byte time immediately following receipt of the last check byte.
摘要翻译：使用相同的结构计算Read-Solomon码中的数据流的误差偏移和误差幅度。该方法与先前技术相比的优点在于其简单的设计和将错误信息转换为错误位置和校正模式所需的最小步骤。计算偏移和校正模式所需的最多四个周期（步骤）允许在收到最后一个校验字节之后的字节时间内应用校正。

2. 发明授权

US6038613A Prefetching and storing device work information from multiple data storage devices 失效
标题翻译：从多个数据存储设备预取和存储设备工作信息
公开(公告)号：US6038613A
公开(公告)日：2000-03-14
申请号：US971085
申请日：1997-11-14
申请人： Enrique Q Garcia , Gregg Steven Lucas , James Richard Pollock , Juan Antonio Yanes
发明人： Enrique Q Garcia , Gregg Steven Lucas , James Richard Pollock , Juan Antonio Yanes
IPC分类号： G06F3/06 , G06F13/12 , G06F13/00
CPC分类号： G06F3/0607 , G06F13/122 , G06F3/0632 , G06F3/0653 , G06F3/0674
摘要： A device controller is described within a data storage system for pre-fetching device work information from multiple data storage devices, and accumulating the device work information to immediately respond to a subsequent device poll command from a storage controller. The device controller includes a device receiver to receive the device poll command, a device transmitter to transmit a response to the device poll command, a device information register for storing the pre-fetched device work information for each data storage device, and a sequencer for periodically pre-fetching the device work information from each data storage device. The sequencer pre-fetches such information by verifying that no device subsystem command from the storage controller is pending in the device receiver, then issuing a background poll command to a selected device to query the device for its device work information, and storing the device work information in the device information register. The device controller can then immediately respond to a subsequent device poll command issued from the storage controller by copying the device work information from the device information register to the device transmitter.
摘要翻译：在数据存储系统内描述设备控制器，用于从多个数据存储设备预取设备工作信息，并累积设备工作信息以立即响应来自存储控制器的后续设备轮询命令。设备控制器包括接收设备轮询命令的设备接收器，用于发送对设备轮询命令的响应的设备发送器，用于存储每个数据存储设备的预取设备工作信息的设备信息寄存器，以及用于定期从每个数据存储设备预取设备工作信息。定序器通过验证设备接收器中没有来自存储控制器的设备子系统命令等待处理，然后向所选设备发出后台轮询命令来查询设备的设备工作信息，并存储设备工作，从而预取这些信息设备信息寄存器中的信息。然后，设备控制器可以通过将设备工作信息从设备信息寄存器复制到设备发送器来立即响应从存储控制器发出的后续设备轮询命令。

3. 发明授权

US6038676A Method and circuit for data integrity verification during DASD data transfer 失效
标题翻译： DASD数据传输过程中数据完整性验证的方法和电路
公开(公告)号：US6038676A
公开(公告)日：2000-03-14
申请号：US937633
申请日：1997-09-25
申请人： Adalberto G. Yanes , James Richard Pollock , James C. Chen , David C. Giese
发明人： Adalberto G. Yanes , James Richard Pollock , James C. Chen , David C. Giese
IPC分类号： G06F11/00
CPC分类号： G06F11/076
摘要： System and method aspects for avoiding data corruption during data transfer in a disk array environment are described. In a circuit aspect, an integrity checker includes counting logic for counting fields in the data being transferred. The integrity checker further includes comparison logic for comparing a constant value and a value in a predetermined field of data being transferred. Combinational logic is further included and coupled to the comparison logic and counting logic, wherein when the comparison logic results in a miscompare and the counting logic is at a predetermined count value, the integrity checker circuit aborts data transfer. In a method aspect, the method includes providing an integrity checker at an interface to an array of disk drives, and performing data validity determinations on data passing across the interface with the integrity checker, wherein invalid data is not transferred.
摘要翻译：描述了在磁盘阵列环境中数据传输期间避免数据损坏的系统和方法方面。在电路方面，完整性校验器包括用于对正在传送的数据中的字段进行计数的计数逻辑。完整性检查器还包括用于比较恒定值和正在传送的数据的预定字段中的值的比较逻辑。组合逻辑还包括并耦合到比较逻辑和计数逻辑，其中当比较逻辑导致错误比较并且计数逻辑处于预定计数值时，完整性校验器电路中止数据传送。在方法方面，该方法包括在与磁盘驱动器阵列的接口处提供完整性检查器，以及对与完整性检查器通过接口的数据执行数据有效性确定，其中无法传送无效数据。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式