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    • 5. 发明申请
    • MOS VARACTOR AND FABRICATING METHOD OF THE SAME
    • MOS变压器及其制作方法
    • US20100244113A1
    • 2010-09-30
    • US12565197
    • 2009-09-23
    • Jae-Sung RiehYong Ho OhSue Yeon KimSeung Yong Lee
    • Jae-Sung RiehYong Ho OhSue Yeon KimSeung Yong Lee
    • H01L29/93H01L21/329
    • H01L29/93H01L29/66174
    • The present invention provides a MOS varactor for use in circuits and elements of a millimeter-wave frequency band, which is capable of reducing series resistance and enhancing a Q-factor by using a plurality of island-like gates seated in a well region of a substrate and gate contacts directly over the gates, and a method of fabricating the MOS varactor. The MOS varactor include: island-like gate insulating layers which are arranged at equal intervals in the form of a (n×m) matrix (where, n and m are integers equal to or larger than one), and a gate electrode of a first height (t1) placed on the gate insulating layers in a well region of a substrate; a gate contact which contacts the gate electrode; a first metal wire of a second height (t2) (where, t1
    • 本发明提供一种用于毫米波频带的电路和元件的MOS可变电抗器,其能够通过使用位于一个或多个的区域中的多个岛状门来降低串联电阻并提高Q因子 衬底和栅极直接连接在栅极上,以及制造MOS变容二极管的方法。 MOS变容二极管包括:以(n×m)矩阵(其中,n和m为1以上的整数)等间隔配置的岛状栅极绝缘层,以及栅电极 第一高度(t1)放置在衬底的阱区域中的栅极绝缘层上; 接触栅电极的栅极接触; 电连接到栅极触点的第二高度(t2)(其中,t1
    • 10. 发明授权
    • MOS varactor and fabricating method of the same
    • MOS变容二极管及其制造方法相同
    • US07989868B2
    • 2011-08-02
    • US12565197
    • 2009-09-23
    • Jae-Sung RiehYong Ho OhSue Yeon KimSeung Yong Lee
    • Jae-Sung RiehYong Ho OhSue Yeon KimSeung Yong Lee
    • H01L21/00
    • H01L29/93H01L29/66174
    • A MOS varactor for use in circuits and elements of a millimeter-wave frequency band, which is capable of reducing series resistance and enhancing a Q-factor by using a plurality of island-like gates seated in a well region of a substrate and gate contacts directly over the gates, includes: gate insulating layers arranged at equal intervals in the form of a (n×m) matrix, and a gate electrode placed on the gate insulating layers in a well region of a substrate; a gate contact which contacts the gate electrode; a first metal wire, which is electrically connected to the gate contact; source/drain contacts arranged at equal intervals in a matrix to form apexes of a square centered at the gate electrode and contact a doping region except for the bottom of the gate insulating layers; and a second metal wire, which is electrically connected to the source/drain contacts.
    • 一种用于毫米波频带的电路和元件的MOS变容二极管,其能够通过使用位于衬底的阱区域中的多个岛状栅极和栅极触点来降低串联电阻并增强Q因子 包括:以(n×m)矩阵形式等间隔布置的栅极绝缘层,以及设置在衬底的阱区中的栅极绝缘层上的栅电极; 接触栅电极的栅极接触; 电连接到栅极触点的第一金属线; 源极/漏极触点以等间隔布置在矩阵中以形成以栅电极为中心的正方形的顶点,并且接触除了栅极绝缘层的底部之外的掺杂区域; 以及电连接到源极/漏极触点的第二金属线。