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    • 2. 发明授权
    • Thin-film transistor structure, as well as thin-film transistor and display device each having said structure
    • 薄膜晶体管结构,以及各自具有所述结构的薄膜晶体管和显示装置
    • US09093542B2
    • 2015-07-28
    • US14113322
    • 2012-04-19
    • Takeaki MaedaToshihiro KugimiyaJun Ho SongJe Hun LeeByung Du AhnGun Hee Kim
    • Takeaki MaedaToshihiro KugimiyaJun Ho SongJe Hun LeeByung Du AhnGun Hee Kim
    • H01L29/10H01L29/786G02F1/1368H01L27/12
    • H01L29/7869G02F1/1368H01L27/1222H01L29/78693
    • There is provided an oxide semiconductor layer capable of making stable the electric characteristics of a thin-film transistor without requiring an oxidatively-treated layer when depositing a passivation layer or the like in display devices such as organic EL displays and liquid crystal displays. The thin-film transistor structure of the present invention at least having, on a substrate, an oxide semiconductor layer, a source-drain electrode, and a passivation layer in order from the substrate side, wherein the oxide semiconductor layer is a stacked product of a first oxide semiconductor layer and a second oxide semiconductor layer; the first oxide semiconductor layer has a Zn content of 50 atomic % or more as a percentage of all metal elements contained therein, and the first oxide semiconductor layer is formed on the source-drain electrode and passivation layer side; the second oxide semiconductor layer contains Sn and at least one element selected from the group consisting of In, Ga, and Zn, and the second oxide semiconductor layer is formed on the substrate side; and the first oxide semiconductor layer is in direct contact both with the source-drain electrode and with the passivation layer.
    • 提供了一种氧化物半导体层,当在有机EL显示器和液晶显示器等显示装置中沉积钝化层等时,能够使薄膜晶体管的电特性稳定,而不需要氧化处理层。 本发明的薄膜晶体管结构至少在衬底上具有氧化物半导体层,源 - 漏电极和钝化层,从衬底侧开始,其中氧化物半导体层是 第一氧化物半导体层和第二氧化物半导体层; 第一氧化物半导体层的Zn含量占所有金属元素的百分比为50原子%以上,第一氧化物半导体层形成在源 - 漏电极和钝化层侧; 所述第二氧化物半导体层含有Sn和选自In,Ga和Zn中的至少一种元素,并且所述第二氧化物半导体层形成在所述基板侧; 并且第一氧化物半导体层与源 - 漏电极和钝化层直接接触。
    • 6. 发明授权
    • Thin film transistor array panel and manufacturing method thereof
    • 薄膜晶体管阵列面板及其制造方法
    • US08455277B2
    • 2013-06-04
    • US13523767
    • 2012-06-14
    • Je-Hun LeeSung-Jin KimHee-Joon KimChang-Oh Jeong
    • Je-Hun LeeSung-Jin KimHee-Joon KimChang-Oh Jeong
    • H01L21/84
    • G02F1/13439G02F1/13458H01L27/12H01L27/124H01L29/458H01L29/4908
    • A thin film transistor array panel is provided, which includes a plurality of gate lines, a plurality of common electrodes, a gate insulating layer covering the gate lines and the common electrodes, a plurality of semiconductor layers formed on the gate insulating layer, a plurality of data lines including a plurality of source electrodes and formed on the semiconductor layer, a plurality of drain electrodes formed on the semiconductor layer, and a plurality of pixel electrodes overlapping the common electrodes and connected to the drain electrodes. Because the common electrodes are made of ITON, IZON, or a-ITON, or a double layer of ITO/ITON, IZO/IZON, or a-a-ITO/a-ITON, when H2 or SiH4 are injected to form a silicon nitride (SiNX) layer on the common electrodes, the opaque metal Sn or Zn is not produced on the surfaces of the common electrode.
    • 提供薄膜晶体管阵列面板,其包括多个栅极线,多个公共电极,覆盖栅极线和公共电极的栅极绝缘层,形成在栅极绝缘层上的多个半导体层,多个 包括多个源电极并形成在半导体层上的数据线,形成在半导体层上的多个漏电极以及与公共电极重叠并连接到漏电极的多个像素电极。 由于公共电极由ITON,IZON或者-IONON制成,或者是将双重层的ITO / ITON,IZO / IZON或者a-ITO / a-ITON,当注入H 2或SiH 4以形成氮化硅时 SiNX)层,在公共电极的表面上不产生不透明金属Sn或Zn。