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1. 发明授权

US08072891B2 Method and apparatus for programmable generation of traffic streams 有权
标题翻译：用于业务流可编程生成的方法和装置
公开(公告)号：US08072891B2
公开(公告)日：2011-12-06
申请号：US11532497
申请日：2006-09-15
申请人： I. Claude Denton , Richard B. Keller
发明人： I. Claude Denton , Richard B. Keller
IPC分类号： G01R31/08
CPC分类号： H04L43/50 , H04L43/0811 , H04L43/0847 , H04L49/254 , H04L49/30 , H04L49/555 , H04L69/22 , H04L2012/5628
摘要： Methods and apparatus provide single or multi-port, flexible, cost-effective, built-in self-test capabilities for network communications equipment, such as for example switches, and programmably generate, and subsequently analyze, one or more sequences of test packets, wherein the test packets simulate at least two flows of traffic. Such test packets can have programmable headers, payloads, and duty cycle. A line card embodying the present invention may generate its own traffic pattern, which may be similar or identical, to traffic patterns observed on Internet backbones. These traffic patterns may contain a bimodal distribution of control packets interspersed with data packets wherein the control packets and data packets are relatively short and long respectively. A plurality of test packet generators/receivers can be deployed in a network communications device having a plurality of ports. In such a configuration, test generator/receiver is associated with each of the plurality of ports. Under software control, test packets can be sent from at least any one of the plurality of ports to at least any other one of the plurality of ports. In this way, an in-circuit testing procedure may be implemented without having to disconnect line cards from the switch and connect the switch to expensive external test equipment.
摘要翻译：方法和装置为网络通信设备（例如交换机）提供单端口或多端口，灵活的，具有成本效益的内置自检功能，并且可编程地生成并随后分析一个或多个测试分组序列，其中所述测试分组模拟至少两个业务流。这样的测试分组可以具有可编程的报头，有效载荷和占空比。体现本发明的线卡可以产生它自己的与互联网骨干网上观察到的交通模式相似或相同的交通模式。这些流量模式可以包含散布有数据分组的控制分组的双模式分布，其中控制分组和数据分组分别相对较短和长。可以在具有多个端口的网络通信设备中部署多个测试分组生成器/接收器。在这种配置中，测试发生器/接收器与多个端口中的每一个相关联。在软件控制下，可以将测试分组从多个端口中的至少任一个端口发送到多个端口中的至少任一个端口。以这种方式，可以实现在线测试程序，而不必从开关断开线路卡并将开关连接到昂贵的外部测试设备。

2. 发明授权

US07746907B2 Multi-stage SONET overhead processing 有权
标题翻译：多级SONET开销处理
公开(公告)号：US07746907B2
公开(公告)日：2010-06-29
申请号：US11513751
申请日：2006-08-30
申请人： I. Claude Denton
发明人： I. Claude Denton
IPC分类号： H04J3/02
CPC分类号： H04J3/1611 , H04J2203/0046 , H04J2203/0089
摘要： An overhead processor processes overhead bytes in a stream of Synchronous Optical Network (SONET) frames in multiple levels. In one embodiment, the overhead processor includes three stages. A first stage provides access for external processing of a first set of overhead bytes in the stream of SONET frames. A second stage is programmable to process a second set of overhead bytes in the stream of SONET frames. A third stage processes a third set of overhead bytes in each frame in the stream of SONET frames.
摘要翻译：开销处理器处理多级同步光网络（SONET）帧流中的开销字节。在一个实施例中，架空处理器包括三个阶段。第一级提供对SONET帧流中的第一组开销字节的外部处理的访问。第二级是可编程的，以处理SONET帧流中的第二组开销字节。第三级处理SONET帧流中每帧中的第三组开销字节。

3. 发明授权

US07433303B2 Preemptive network traffic control for regional and wide area networks 有权
标题翻译：区域和广域网的抢占式网络流量控制
公开(公告)号：US07433303B2
公开(公告)日：2008-10-07
申请号：US10211174
申请日：2002-08-02
申请人： Alfred C. She , Samuel J. Peters, II , I. Claude Denton
发明人： Alfred C. She , Samuel J. Peters, II , I. Claude Denton
IPC分类号： H04L12/26 , H04L12/28
CPC分类号： H04L12/40013 , H04L12/40032 , H04L12/413 , H04L47/10 , H04L47/18 , H04L47/266 , H04L47/30
摘要： In a network apparatus, control logic is provided to preemptively issue pause controls to a sender of network traffic of a link to preemptively regulate a rate the sender may send network traffic of the link. In one embodiment, the pause controls are sent periodically, with each including a pause duration. In one embodiment, at least a selected one of the pause duration and the periodicity of preemptive issuance is determined based at least in part on at least a selected one of a working capacity of storage medium allocated to service the link, a network traffic drain rate of the link, and a fill rate of the input line over which the network traffic of the link is received. In one embodiment, the networking apparatus is an optical networking module with the control logic disposed in a multi-protocol networking processor of the module.
摘要翻译：在网络装置中，提供控制逻辑来抢先发布暂停控制给链路的网络业务的发送者，以抢先规定发送方可能发送链路的网络流量的速率。在一个实施例中，周期性地发送暂停控制，每个包括暂停持续时间。在一个实施例中，至少部分地基于分配给服务链路的存储介质的工作容量中的至少一个选择的一个，网络流量流失率以及链接的网络流量的输入线的填充率。在一个实施例中，网络设备是光学网络模块，其中控制逻辑设置在该模块的多协议网络处理器中。

4. 发明授权

US5923653A SONET/SDH receiver processor 失效
标题翻译： SONET / SDH接收机处理器
公开(公告)号：US5923653A
公开(公告)日：1999-07-13
申请号：US580786
申请日：1995-12-20
申请人： I. Claude Denton
发明人： I. Claude Denton
IPC分类号： H04J3/16 , H04Q11/04 , H04J3/02
CPC分类号： H04Q11/0478 , H04J3/1611 , H04J2203/0005 , H04J2203/0025
摘要： A receiver processor for use in a SONET OC-48 or SDH test or network environment. The processor includes a 16:32 demultiplexer, descrambler, and a cross-connect enabling individual STS-3s in the incoming signal to be routed to selected STS-3s in the outgoing signal. An overhead and data capture function enables overhead and data bytes to be captured from each frame.
摘要翻译：用于SONET OC-48或SDH测试或网络环境的接收机处理器。处理器包括16:32解复用器，解扰器和交叉连接，使输入信号中的各个STS-3能够被发送到输出信号中的选定的STS-3。开销和数据捕获功能可以从每个帧捕获开销和数据字节。

5. 发明授权

US08306037B2 Multi-protocol networking processor with data traffic support spanning local, regional and wide area networks 有权
标题翻译：具有跨越本地，区域和广域网的数据流量支持的多协议网络处理器
公开(公告)号：US08306037B2
公开(公告)日：2012-11-06
申请号：US11343387
申请日：2006-01-30
申请人： I. Claude Denton , James L. Gimlett
发明人： I. Claude Denton , James L. Gimlett
IPC分类号： H04L12/28 , H04L12/56
CPC分类号： H04L29/06 , H04L69/08 , H04L69/18 , Y10S370/907
摘要： A networking processor is formed with selected ones of one or more system interfaces, one or more network/intermediate interfaces, a plurality of data link sub-layer control/processing blocks, and a plurality of physical sub-layer coders/decoders and processing units. The elements are provisioned in a combinatorially selectable manner, enabling the single networking processor to be able to selectively facilitate data trafficking in accordance with a selected one of a plurality of protocols. The protocols include at least one each a datacom and a telecom protocol. Accordingly, the network processor supports data traffics spanning local, regional and wide area networks. In one embodiment, the traffic data may be framed or streaming data being transmitted/received in accordance with a selected one of a plurality frame based protocols and a plurality of variants of a synchronous protocol. The frame based protocols may also be frame based protocols encapsulated with the synchronous protocol.
摘要翻译：网络处理器由一个或多个系统接口，一个或多个网络/中间接口，多个数据链路子层控制/处理块和多个物理子层编码器/解码器和处理单元中的选定的一个组成。以组合可选择的方式提供元件，使得单个网络处理器能够根据多个协议中的所选择的一个协议选择性地促进数据传送。这些协议包括数据通信和电信协议中的至少一个。因此，网络处理器支持横跨本地，区域和广域网的数据流量。在一个实施例中，业务数据可以是根据多个基于帧的协议和同步协议的多个变体中的所选择的一个发送/接收的成帧或流数据。基于帧的协议也可以是以同步协议封装的基于帧的协议。

6. 发明授权

US08194691B2 Data link/physical layer packet buffering and flushing 有权
标题翻译：数据链路/物理层数据包缓冲和冲洗
公开(公告)号：US08194691B2
公开(公告)日：2012-06-05
申请号：US11512028
申请日：2006-08-28
申请人： Donald R. Primrose , I. Claude Denton
发明人： Donald R. Primrose , I. Claude Denton
IPC分类号： H04L12/56
CPC分类号： H04L49/9078 , H04L49/30 , H04L49/90 , H04L49/9047
摘要： A buffering structure including at least a first FIFO storage structure to stage at least a selected one of undiverted egress packets and undiverted ingress packets is provided. The buffering structure further includes at least first associated packet drop logic to selectively effectuate head or tail flushes of the first FIFO storage structure. In various embodiments, one or more additional FIFO storage structures are also provided to stage one or more diverted and/or insertion of egress/ingress packets. Those use for staging diverted egress/ingress packets are likewise provided with associated packet drop logic to perform tail flushes of these additional FIFO structures. In one application, the buffering structure is employed by a multi-protocol network processor, which in turn is employed by an optical networking module.
摘要翻译：提供了包括至少第一FIFO存储结构的缓冲结构，用于对未被引导的出口分组和未发送的入口分组中的至少一个进行分级。缓冲结构还包括至少第一相关联的分组丢弃逻辑以选择性地实现第一FIFO存储结构的头部或尾部刷新。在各种实施例中，还提供一个或多个附加FIFO存储结构以对一个或多个转发和/或插入出口/入口分组进行分级。用于分级转移出口/入口分组的那些同样具有相关联的分组丢弃逻辑以执行这些附加FIFO结构的尾部刷新。在一个应用中，缓冲结构由多协议网络处理器采用，这又由光网络模块采用。

7. 发明授权

US07415031B2 Data link/physical layer packet diversion and insertion 失效
标题翻译：数据链路/物理层分组转发和插入
公开(公告)号：US07415031B2
公开(公告)日：2008-08-19
申请号：US09918691
申请日：2001-07-30
申请人： Donald R. Primrose , I. Claude Denton
发明人： Donald R. Primrose , I. Claude Denton
IPC分类号： H04L12/28 , H04L12/56
CPC分类号： H04L49/9047 , H04L49/90 , H04L49/9094
摘要： A buffering structure including a number of storage structures and associated diversion and/or insertion logic, is provided to facilitate one or more selected ones of post-switching, pre-medium placement, diversion and/or insertion of egress packets, and post-medium extraction, pre-switching, diversion and/or insertion of ingress packets, during data link/physical layer processing of networking traffic. In selected applications, the buffering structure is provided as an integral part of a single ASIC multi-protocol networking processor having data link/physical layer processing components for a number of datacom and telecom protocols. In one of the selected applications, the single ASIC multi-protocol networking processor is employed in conjunction with other optical and electro components to form an integral optical networking module in support of optical-electro networking for the datacom/telecom protocols.
摘要翻译：提供了包括多个存储结构和相关联的转移和/或插入逻辑的缓冲结构，以便于一个或多个选择的后切换，预介质放置，出口和/或插入出口分组以及后介质在网络流量的数据链路/物理层处理期间，提取，预切换，引入和/或插入入口数据包。在所选择的应用中，缓冲结构被提供为具有用于多个数据通信和电信协议的数据链路/物理层处理组件的单个ASIC多协议网络处理器的组成部分。在所选择的应用之一中，单个ASIC多协议网络处理器与其他光学和电子部件结合使用，以形成一个整体光网络模块，以支持数据通信/电信协议的光电组网。

8. 发明授权

US07002967B2 Multi-protocol networking processor with data traffic support spanning local, regional and wide area networks 有权
公开(公告)号：US07002967B2
公开(公告)日：2006-02-21
申请号：US09860207
申请日：2001-05-18
申请人： I. Claude Denton , James L. Gimlett
发明人： I. Claude Denton , James L. Gimlett
IPC分类号： H04L12/28
CPC分类号： H04L29/06 , H04L69/08 , H04L69/18 , Y10S370/907
摘要： A networking processor is formed with selected ones of one or more system interfaces, one or more network/intermediate interfaces, a plurality of data link sub-layer control/processing blocks, and a plurality of physical sub-layer coders/decoders and processing units. The elements are provisioned in a combinatorially selectable manner, enabling the single networking processor to be able to selectively facilitate data trafficking in accordance with a selected one of a plurality of protocols. The protocols include at least one each a datacom and a telecom protocol. Accordingly, the network processor supports data traffics spanning local, regional and wide area networks. In one embodiment, the traffic data may be framed or streaming data being transmitted/received in accordance with a selected one of a plurality frame based protocols and a plurality of variants of a synchronous protocol. The frame based protocols may also be frame based protocols encapsulated with the synchronous protocol.

9. 发明授权

US07894457B2 Optical networking module including protocol processing and unified software control 失效
标题翻译：光网络模块，包括协议处理和统一软件控制
公开(公告)号：US07894457B2
公开(公告)日：2011-02-22
申请号：US11513676
申请日：2006-08-30
申请人： I. Claude Denton , Bruce Murdock , James L. Gimlett , Edward L. Hershberg , Scott W. Lowrey , Richard A. Booman , Alfred C. She
发明人： I. Claude Denton , Bruce Murdock , James L. Gimlett , Edward L. Hershberg , Scott W. Lowrey , Richard A. Booman , Alfred C. She
IPC分类号： H04L12/28 , H04J3/16
CPC分类号： H04J3/1617 , H04J2203/0085 , H04J2203/0089 , H04L69/12 , H04L69/18
摘要： An optical networking module is formed with an integrated module including optical, optical-electrical and protocol processing components, and complementary software. In one embodiment, the integral protocol processing component is a single ASIC and supports multiple protocols. The module is further equipped with support control electronics in support of control functions to manage the optical, optical-electrical as well as the multi-protocol processing component. The integrated module together with the complementary control software present to an optical networking equipment designer/developer a singular component that handles optical to electrical and electrical to optical conversion, as well as data link and physical sub-layer processing for a selected one of a plurality of datacom and telecom protocols, spanning local, regional as well as wide area networks. The integrated module and complementary control software further presents to the optical networking designer/developer a unified software interface for managing-the various components and functions.
摘要翻译：光网络模块形成有包括光学，光电和协议处理组件以及补充软件的集成模块。在一个实施例中，集成协议处理组件是单个ASIC并且支持多种协议。该模块还配备了支持控制电子设备，以支持控制功能，以管理光学，光电以及多协议处理组件。该集成模块与互补控制软件一起提交给光网络设备设计者/开发人员处理光电到电和电转换到光转换的单一组件，以及用于多个选定的一个的数据链路和物理子层处理数据通信和电信协议，跨越本地，区域和广域网。集成模块和互补控制软件还向光网络设计人员/开发人员提供了一个用于管理各种组件和功能的统一软件界面。

10. 发明授权

US07804782B2 Method and apparatus for programmable generation of traffic streams 有权
标题翻译：用于业务流可编程生成的方法和装置
公开(公告)号：US07804782B2
公开(公告)日：2010-09-28
申请号：US11509948
申请日：2006-08-25
申请人： I. Claude Denton , Richard B. Keller
发明人： I. Claude Denton , Richard B. Keller
IPC分类号： G01R31/08
CPC分类号： H04L43/50 , H04L43/0811 , H04L43/0847 , H04L49/254 , H04L49/30 , H04L49/555 , H04L69/22 , H04L2012/5628
摘要： Methods and apparatus provide single or multi-port, flexible, cost-effective, built-in self-test capabilities for network communications equipment, such as for example switches, and programmably generate, and subsequently analyze, one or more sequences of test packets, wherein the test packets simulate at least two flows of traffic. Such test packets can have programmable headers, payloads, and duty cycle. A line card embodying the present invention may generate its own traffic pattern, which may be similar or identical, to traffic patterns observed on Internet backbones. These traffic patterns may contain a bimodal distribution of control packets interspersed with data packets wherein the control packets and data packets are relatively short and long respectively. A plurality of test packet generators/receivers can be deployed in a network communications device having a plurality of ports. In such a configuration, test generator/receiver is associated with each of the plurality of ports. Under software control, test packets can be sent from at least any one of the plurality of ports to at least any other one of the plurality of ports. In this way, an in-circuit testing procedure may be implemented without having to disconnect line cards from the switch and connect the switch to expensive external test equipment.
摘要翻译：方法和装置为网络通信设备（例如交换机）提供单端口或多端口，灵活的，具有成本效益的内置自检功能，并且可编程地生成并随后分析一个或多个测试分组序列，其中所述测试分组模拟至少两个业务流。这样的测试分组可以具有可编程的报头，有效载荷和占空比。体现本发明的线卡可以产生它自己的与互联网骨干网上观察到的交通模式相似或相同的交通模式。这些流量模式可以包含散布有数据分组的控制分组的双模式分布，其中控制分组和数据分组分别相对较短和长。可以在具有多个端口的网络通信设备中部署多个测试分组生成器/接收器。在这种配置中，测试发生器/接收器与多个端口中的每一个相关联。在软件控制下，可以将测试分组从多个端口中的至少任一个端口发送到多个端口中的至少任一个端口。以这种方式，可以实现在线测试程序，而不必从开关断开线路卡并将开关连接到昂贵的外部测试设备。

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