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1. 发明授权

US5256587A Methods of patterning and manufacturing semiconductor devices 失效
标题翻译：图案化和制造半导体器件的方法
公开(公告)号：US5256587A
公开(公告)日：1993-10-26
申请号：US911594
申请日：1992-07-10
申请人： Young K. Jun , Sa K. Ra , Dong W. Kim , Hyun H. Seo , Sung C. Kim , Jun K. Kim
发明人： Young K. Jun , Sa K. Ra , Dong W. Kim , Hyun H. Seo , Sung C. Kim , Jun K. Kim
IPC分类号： G03F7/09 , H01L21/02 , H01L21/033 , H01L21/3213 , H01L21/70
CPC分类号： H01L28/92 , G03F7/094 , H01L21/0332 , H01L21/0337 , H01L21/32139 , Y10S148/138 , Y10S438/947 , Y10S438/97
摘要： Methods of hyperfine patterning and manufacturing semiconductor devices. Steps in accordance with the present invention include coating a hemisphere particle layer having hills and valleys on a layer to be etched, the hemisphere particle layer having an etch selectivity higher than that of the first layer, filling the valleys of the hemisphere particle layer with a second layer having an etch selectivity higher than that of the hemisphere particle layer, and etching back the hills of the hemisphere particle layer to expose the first layer by using the second layer as a mask, and etching the first layer. By virtue of the hemisphere particle layer having alternating hills and valleys, it is possible to accomplish a hyperfine patterning of about 0.1 .mu.m. Since the mean size and the density of hills and valleys of the hemisphere layer can be controlled, the pattern size also can be controlled. Where the present invention is applied to capacitors of semiconductor memory elements, the capacitor node surface area can be increased, depending on the etched back depth of a polysilicon layer.
摘要翻译：超精细图案化和制造半导体器件的方法。根据本发明的步骤包括在待蚀刻的层上涂覆具有山丘和谷的半球粒子层，该半球粒子层的蚀刻选择性高于第一层的蚀刻选择性，将半球粒子层的谷部填充到半球粒子层的谷部第二层具有比半球颗粒层的蚀刻选择性更高的蚀刻选择性，并且通过使用第二层作为掩模蚀刻半球粒子层的山丘以暴露第一层，并蚀刻第一层。由于半球颗粒层具有交替的山丘和山谷，可以实现约0.1μm的超精细图案化。由于可以控制半球层的平均尺寸和丘陵和山谷的密度，因此也可以控制图案尺寸。在将本发明应用于半导体存储器元件的电容器的情况下，可以根据多晶硅层的蚀刻回深度来增加电容器节点表面积。

2. 发明授权

US5393373A Methods of patterning and manufacturing semiconductor devices 失效
标题翻译：图案化和制造半导体器件的方法
公开(公告)号：US5393373A
公开(公告)日：1995-02-28
申请号：US135197
申请日：1993-10-12
申请人： Young K. Jun , Sa K. Ra , Dong W. Kim , Hyun H. Seo , Sung C. Kim , Jun K. Kim
发明人： Young K. Jun , Sa K. Ra , Dong W. Kim , Hyun H. Seo , Sung C. Kim , Jun K. Kim
IPC分类号： H01L21/02 , H01L21/033 , H01L21/8242 , H01L27/108 , H01L21/306 , B44C1/22
CPC分类号： H01L27/10817 , H01L21/0337 , H01L27/10852 , H01L28/92 , Y10S438/942
摘要： Methods of hyperfine patterning and manufacturing semiconductor devices. Steps in accordance with the present invention include coating a hemisphere particle layer having hills and valleys on a layer to be etched, the hemisphere particle layer having an etch selectivity higher than that of the first layer, filling the valleys of the hemisphere particle layer with a second layer having an etch selectivity higher than that of the hemisphere particle layer, and etching back the hills of the hemisphere particle layer to expose the first layer by using the second layer as a mask, and etching the first layer. By virtue of the hemisphere particle layer having alternating hills and valleys, it is possible to accomplish a hyperfine patterning of about 0.1 .mu.m. Since the mean size and the density of hills and valleys of the hemisphere layer can be controlled, the pattern size also can be controlled. Where the present invention is applied to capacitors of semiconductor memory elements, the capacitor node surface area can be increased, depending on the etched back depth of a polysilicon layer.
摘要翻译：超精细图案化和制造半导体器件的方法。根据本发明的步骤包括在待蚀刻的层上涂覆具有山丘和谷的半球粒子层，该半球粒子层的蚀刻选择性高于第一层的蚀刻选择性，将半球粒子层的谷部填充到半球粒子层的谷部第二层具有比半球颗粒层的蚀刻选择性更高的蚀刻选择性，并且通过使用第二层作为掩模蚀刻半球粒子层的山丘以暴露第一层，并蚀刻第一层。由于半球颗粒层具有交替的山丘和山谷，可以实现约0.1μm的超精细图案化。由于可以控制半球层的平均尺寸和丘陵和山谷的密度，因此也可以控制图案尺寸。在将本发明应用于半导体存储器元件的电容器的情况下，可以根据多晶硅层的蚀刻回深度来增加电容器节点表面积。

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