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    • 1. 发明申请
    • DISPLAY SUBSTRATE HAVING ARCHED SIGNAL TRANSMISSION LINE AND MANUFACTURE METHOD THEREOF
    • 具有编组信号传输线的显示基板及其制造方法
    • US20100302750A1
    • 2010-12-02
    • US12723321
    • 2010-03-12
    • Hung-Kun ChenChi-Chin Lin
    • Hung-Kun ChenChi-Chin Lin
    • H05K1/11H05K3/32
    • H01L27/1259G09G3/3208G09G2300/0426H05K1/0268H05K3/0052H05K2201/09245H05K2201/09263H05K2201/09272H05K2203/175
    • This invention discloses a display device mother substrate, a display device substrate and a manufacture method of display device substrate thereof. The display device mother substrate includes a first substrate, a second substrate, a first active area circuit and a first transmission line, wherein a first cutting line is defined between the first substrate and the second substrate. The first active area circuit is disposed on the first substrate and is electrically connected to the first transmission line. The first transmission line includes a display line portion, an end line portion and a middle line portion, wherein the display line portion is electrically connected to the first active area circuit. The middle line portion is disposed on the second substrate, wherein two ends of the middle line portion are electrically connected to the display line portion and the end line portion respectively at the first cutting line. The display device mother substrate is cut along the first cutting line to be separated into the first substrate and the second substrate, wherein the middle line portion is also separated from the display line portion and the end line portion.
    • 本发明公开了一种显示装置母板,显示装置用基板及其显示装置用基板的制造方法。 显示装置母板包括第一基板,第二基板,第一有源区电路和第一传输线,其中在第一基板和第二基板之间限定第一切割线。 第一有源区电路设置在第一基板上,并与第一传输线电连接。 第一传输线包括显示线部分,端部线部分和中间线部分,其中显示线部分电连接到第一有源区电路。 中间线部分设置在第二基板上,其中中间线部分的两端分别在第一切割线处电连接到显示线部分和端部线部分。 显示装置母基板沿着第一切割线切割以分离成第一基板和第二基板,其中中间线部分也与显示线部分和端部线部分分离。
    • 2. 发明授权
    • Timing offset compensation in orthogonal frequency division multiplexing systems
    • 正交频分复用系统中的定时偏移补偿
    • US07251283B2
    • 2007-07-31
    • US10689424
    • 2003-10-20
    • Hung-Kun Chen
    • Hung-Kun Chen
    • H04K1/10
    • H04L27/2662H04L25/0202H04L27/2695
    • A robust timing offset compensation scheme for multi-carrier systems. According to the invention, a timing offset compensator is provided to compensate a current symbol in the frequency domain for the effect of timing offset with a timing offset prediction value. Then a timing error estimator calculates a timing error value for the current symbol based on a function of a phase tracking value, a channel response of each pilot subcarrier, transmitted data on each pilot subcarrier, and a timing compensated version of the current symbol on the pilot subcarrier locations. Furthermore, a timing tracking unit receives the timing error value of the current symbol to generate a shift amount of the DFT window and the timing offset prediction value for a next symbol.
    • 一种用于多载波系统的鲁棒定时偏移补偿方案。 根据本发明,提供了一种定时偏移补偿器,用于利用定时偏移预测值来补偿频域中的当前符号以用于定时偏移的影响。 然后,定时误差估计器基于相位跟踪值的函数,每个导频子载波的信道响应,每个导频副载波上的发送数据以及当前符号的定时补偿版本,计算当前符号的定时误差值 导频副载波位置。 此外,定时跟踪单元接收当前符号的定时误差值,以产生用于下一个符号的DFT窗口的移位量和定时偏移预测值。
    • 5. 发明授权
    • Sound signal processing system and related apparatus and method
    • 声音信号处理系统及相关设备及方法
    • US07860913B2
    • 2010-12-28
    • US11671430
    • 2007-02-05
    • Hung-Kun ChenSterling Smith
    • Hung-Kun ChenSterling Smith
    • G06F17/10
    • H03H17/0664H03H17/0286H04N5/602
    • The invention discloses a finite impulse response (FIR) filter for processing a digital input signal to generate a digital output signal. The FIR filter has a tap amount N and a decimation ratio D. The FIR filter includes a first memory, a multiplier, and an accumulation module. For each input sample of the digital input signal, the first memory provides N/D corresponding tap coefficients from a plurality of tap coefficients in turn. The multiplier multiplies the input sample with the N/D corresponding tap coefficients in turn to generate N/D product values. The accumulation module adds the N/D product values to N/D previous accumulation values to generate N/D renewed accumulation values respectively. If one of the accumulation values has already accumulated N product values, the accumulation module outputs the accumulation value as an output sample of the digital output signal.
    • 本发明公开了一种用于处理数字输入信号以产生数字输出信号的有限脉冲响应(FIR)滤波器。 FIR滤波器具有抽头量N和抽取比例D. FIR滤波器包括第一存储器,乘法器和累加模块。 对于数字输入信号的每个输入采样,第一存储器依次从多个抽头系数提供N / D对应的抽头系数。 乘数依次将输入采样与N / D对应的抽头系数相乘以产生N / D乘积值。 累加模块将N / D乘积值添加到N / D先前累积值,以分别产生N / D更新累积值。 如果积累值中的一个已经累积了N个乘积值,则累积模块输出累加值作为数字输出信号的输出样本。
    • 7. 发明申请
    • SOUND SIGNAL PROCESSING SYSTEM AND RELATED APPARATUS AND METHOD
    • 声信号处理系统及相关装置及方法
    • US20080123772A1
    • 2008-05-29
    • US11671430
    • 2007-02-05
    • Hung-Kun ChenSterling Smith
    • Hung-Kun ChenSterling Smith
    • H04L25/49
    • H03H17/0664H03H17/0286H04N5/602
    • The invention discloses a finite impulse response (FIR) filter for processing a digital input signal to generate a digital output signal. The FIR filter has a tap amount N and a decimation ratio D. The FIR filter includes a first memory, a multiplier, and an accumulation module. For each input sample of the digital input signal, the first memory provides N/D corresponding tap coefficients from a plurality of tap coefficients in turn. The multiplier multiplies the input sample with the N/D corresponding tap coefficients in turn to generate N/D product values. The accumulation module adds the N/D product values to N/D previous accumulation values to generate N/D renewed accumulation values respectively. If one of the accumulation values has already accumulated N product values, the accumulation module outputs the accumulation value as an output sample of the digital output signal.
    • 本发明公开了一种用于处理数字输入信号以产生数字输出信号的有限脉冲响应(FIR)滤波器。 FIR滤波器具有抽头量N和抽取比例D. FIR滤波器包括第一存储器,乘法器和累加模块。 对于数字输入信号的每个输入采样,第一存储器依次从多个抽头系数提供N / D对应的抽头系数。 乘数依次将输入采样与N / D对应的抽头系数相乘以产生N / D乘积值。 累加模块将N / D乘积值添加到N / D先前累积值,以分别产生N / D更新累积值。 如果积累值中的一个已经累积了N个乘积值,则累积模块输出累加值作为数字输出信号的输出样本。