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1. 发明授权

US08437166B1 Word line driver cell layout for SRAM and other semiconductor devices 有权
标题翻译：用于SRAM和其他半导体器件的字线驱动器单元布局
公开(公告)号：US08437166B1
公开(公告)日：2013-05-07
申请号：US13297296
申请日：2011-11-16
申请人： Shu Cheng Huang , Hsin-Hsin Ko , Jung-Hsuan Chen , Chiting Cheng
发明人： Shu Cheng Huang , Hsin-Hsin Ko , Jung-Hsuan Chen , Chiting Cheng
IPC分类号： G11C5/06
CPC分类号： G11C11/413
摘要： A word line driver cell suitable for RAM devices such as SRAM, static random access memory devices, is provided. The word line driver cell is compatible with double pattern processing techniques and enables the formation of all word lines from a single metal layer which, in turn, enables overlying and underlying metal levels to be used for other features such as signal lines for word line decoders. A power mesh is formed using multiple metal layers and the formation of all the word lines from a single metal layer enables VDD and VSS power lines that are formed from an overlying layer to extend orthogonal to the cell direction and include wider widths reducing metal line resistance and increasing the deliverable power.
摘要翻译：提供了适用于诸如SRAM，静态随机存取存储器件等RAM装置的字线驱动单元。字线驱动器单元与双模式处理技术兼容，并且能够从单个金属层形成所有字线，这又可以使覆盖和下层金属电平用于其他特征，例如用于字线解码器的信号线。使用多个金属层形成功率网，并且从单个金属层形成所有字线使得由上层形成的VDD和VSS电源线能够垂直于电池方向延伸并且包括较宽的宽度，从而减小金属线路电阻并增加可交付的能力。

2. 发明授权

US07760009B2 Power-down circuit with self-biased compensation circuit 有权
标题翻译：具有自偏置补偿电路的掉电电路
公开(公告)号：US07760009B2
公开(公告)日：2010-07-20
申请号：US12328305
申请日：2008-12-04
申请人： Ping-Lin Yang , Hsin-Hsin Ko , Chung-Cheng Chou
发明人： Ping-Lin Yang , Hsin-Hsin Ko , Chung-Cheng Chou
IPC分类号： H03K3/01
CPC分类号： H03K19/0013
摘要： A circuit includes a first power supply node at a first power supply voltage; a gated-node; and a first control device coupled between the first power supply node and the gated-node. The first control device is configured to pass the first power supply voltage to the gated-node or to disconnect the gated-node from the first power supply voltage. A second control device is coupled between the first power supply node and the gated-node. The second control device is configured to pass a gated-voltage to the gated-node or disconnect the gated-node from the gated-voltage. A voltage-drop device is coupled between the first power supply node and the gated-node, wherein the voltage-drop device is serially connected with the second control device. A negative-feedback current source is connected in parallel with the voltage-drop device. The negative-feedback current source is configured to provide a current tracking a variation of the gated-voltage at the gated-node.
摘要翻译：电路包括第一电源电压的第一电源节点; 门控节点; 以及耦合在第一电源节点和门控节点之间的第一控制装置。第一控制装置被配置为将第一电源电压传递到门控节点，或者将门控节点与第一电源电压断开。第二控制装置耦合在第一电源节点和门控节点之间。第二控制装置被配置为将门控电压传递到门控节点或将门控节点与门控电压断开。电压降装置耦合在第一电源节点和门控节点之间，其中降压装置与第二控制装置串联连接。负反馈电流源与降压装置并联连接。负反馈电流源被配置为提供电流跟踪门控节点处的门控电压的变化。

3. 发明申请

US20100141330A1 POWER-DOWN CIRCUIT WITH SELF-BIASED COMPENSATION CIRCUIT 有权
标题翻译：具有自偏置补偿电路的掉电电路
公开(公告)号：US20100141330A1
公开(公告)日：2010-06-10
申请号：US12328305
申请日：2008-12-04
申请人： Ping-Lin Yang , Hsin-Hsin Ko , Chung-Cheng Chou
发明人： Ping-Lin Yang , Hsin-Hsin Ko , Chung-Cheng Chou
IPC分类号： H03K3/01
CPC分类号： H03K19/0013
摘要： A circuit includes a first power supply node at a first power supply voltage; a gated-node; and a first control device coupled between the first power supply node and the gated-node. The first control device is configured to pass the first power supply voltage to the gated-node or to disconnect the gated-node from the first power supply voltage. A second control device is coupled between the first power supply node and the gated-node. The second control device is configured to pass a gated-voltage to the gated-node or disconnect the gated-node from the gated-voltage. A voltage-drop device is coupled between the first power supply node and the gated-node, wherein the voltage-drop device is serially connected with the second control device. A negative-feedback current source is connected in parallel with the voltage-drop device. The negative-feedback current source is configured to provide a current tracking a variation of the gated-voltage at the gated-node.
摘要翻译：电路包括第一电源电压的第一电源节点; 门控节点; 以及耦合在第一电源节点和门控节点之间的第一控制装置。第一控制装置被配置为将第一电源电压传递到门控节点，或者将门控节点与第一电源电压断开。第二控制装置耦合在第一电源节点和门控节点之间。第二控制装置被配置为将门控电压传递到门控节点或将门控节点与门控电压断开。电压降装置耦合在第一电源节点和门控节点之间，其中降压装置与第二控制装置串联连接。负反馈电流源与降压装置并联连接。负反馈电流源被配置为提供电流跟踪门控节点处的门控电压的变化。

4. 发明申请

US20130121055A1 WORD LINE DRIVER CELL LAYOUT FOR SRAM AND OTHER SEMICONDUCTOR DEVICES 有权
标题翻译：用于SRAM和其他半导体器件的字线驱动器单元布局
公开(公告)号：US20130121055A1
公开(公告)日：2013-05-16
申请号：US13297296
申请日：2011-11-16
申请人： Shu Cheng HUANG , Hsin-Hsin KO , Jung-Hsuan CHEN , Chiting CHENG
发明人： Shu Cheng HUANG , Hsin-Hsin KO , Jung-Hsuan CHEN , Chiting CHENG
IPC分类号： G11C8/08 , H01L21/768 , G11C5/06
CPC分类号： G11C11/413
摘要： A word line driver cell suitable for RAM devices such as SRAM, static random access memory devices, is provided. The word line driver cell is compatible with double pattern processing techniques and enables the formation of all word lines from a single metal layer which, in turn, enables overlying and underlying metal levels to be used for other features such as signal lines for word line decoders. A power mesh is formed using multiple metal layers and the formation of all the word lines from a single metal layer enables VDD and VSS power lines that are formed from an overlying layer to extend orthogonal to the cell direction and include wider widths reducing metal line resistance and increasing the deliverable power.
摘要翻译：提供了适用于诸如SRAM，静态随机存取存储器件等RAM装置的字线驱动单元。字线驱动器单元与双模式处理技术兼容，并且能够从单个金属层形成所有字线，这又可以使覆盖和下层金属电平用于其他特征，例如用于字线解码器的信号线。使用多个金属层形成功率网，并且从单个金属层形成所有字线使得由上层形成的VDD和VSS电源线能够垂直于电池方向延伸并且包括较宽的宽度，从而减小金属线路电阻并增加可交付的能力。

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