专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US09985008B2 Method of fabricating a semiconductor package 有权
公开(公告)号：US09985008B2
公开(公告)日：2018-05-29
申请号：US15423611
申请日：2017-02-03
申请人： Hongbin Shi , Junho Lee
发明人： Hongbin Shi , Junho Lee
IPC分类号： H01L21/00 , H01L25/10 , H01L23/00 , H01L25/00
CPC分类号： H01L25/105 , H01L24/81 , H01L25/50 , H01L2224/81143 , H01L2224/81815 , H01L2225/1023 , H01L2225/1058 , H01L2225/1082
摘要： A method of fabricating a semiconductor package includes providing a lower semiconductor package including a lower package substrate, and a lower dummy ball and a lower solder ball on a top surface of the lower package substrate, providing an upper semiconductor package including an upper package substrate, and an upper dummy ball and an upper solder ball on a bottom surface of the upper package substrate, joining the upper dummy ball to the lower dummy ball at a first temperature to form a solder joint, and joining the upper solder ball to the lower solder ball at a second temperature to form a connection terminal.

2. 发明申请

US20160372433A1 METHODS OF FABRICATING A SEMICONDUCTOR PACKAGE 有权
标题翻译：制造半导体封装的方法
公开(公告)号：US20160372433A1
公开(公告)日：2016-12-22
申请号：US15168240
申请日：2016-05-30
申请人： Hongbin SHI , Hojeong MOON , Kang Joon LEE
发明人： Hongbin SHI , Hojeong MOON , Kang Joon LEE
IPC分类号： H01L23/00 , H01L21/56 , H01L25/00 , H01L25/065 , H01L25/10
CPC分类号： H01L25/50 , H01L23/3128 , H01L23/49811 , H01L23/49816 , H01L25/105 , H01L2224/11849 , H01L2224/13109 , H01L2224/13111 , H01L2224/13113 , H01L2224/13116 , H01L2224/1312 , H01L2224/13139 , H01L2224/1357 , H01L2224/16227 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2225/1023 , H01L2225/1058 , H01L2225/1082 , H01L2924/1431 , H01L2924/1434 , H01L2924/1436 , H01L2924/1438 , H01L2924/15311 , H01L2924/15331 , H01L2924/18161 , H01L2924/3511 , H01L2924/00012 , H01L2924/00014 , H01L2924/00
摘要： Provided is a method of fabricating a semiconductor package. The method include providing a lower package with an inner solder ball, providing a conductive material on the inner solder ball to form an outer solder ball enclosing the inner solder ball, providing an upper package with an upper solder ball, on the lower package, performing a first process at a first temperature to join the upper solder ball to the outer solder ball, and performing a second process at a second temperature to unite the upper, inner, and outer solder balls into a connection terminal.
摘要翻译：提供一种制造半导体封装件的方法。该方法包括提供具有内部焊球的下部封装，在内部焊球上提供导电材料以形成封装内部焊球的外部焊球，在下部封装上提供具有上部焊球的上部封装，执行在第一温度下将第一温度连接到外部焊球的第一工艺，以及在第二温度下进行第二工序以将上，内和外焊球团聚到连接端子中。

3. 发明授权

US09953964B2 Method for manufacturing semiconductor package 有权
公开(公告)号：US09953964B2
公开(公告)日：2018-04-24
申请号：US15240183
申请日：2016-08-18
申请人： Hongbin Shi , Soonbum Kim , Junho Lee
发明人： Hongbin Shi , Soonbum Kim , Junho Lee
IPC分类号： H01L21/00 , H01L25/10 , H01L25/00
CPC分类号： H01L25/105 , H01L25/50 , H01L2224/16225 , H01L2224/48227 , H01L2225/1058 , H01L2225/1082 , H01L2924/15311 , H01L2924/181 , H01L2924/1815 , H01L2924/18161 , H01L2924/3511 , H01L2924/00012
摘要： A method for manufacturing a semiconductor package including providing a first semiconductor package including a first package substrate and a first solder ball, the first package substrate having a first surface and a second surface opposite to the first surface, the first solder ball on the first surface, providing a second semiconductor package including a second package substrate and a second solder ball, the second package substrate having a third surface and a fourth surface opposite to the third surface, the second solder ball on the third surface, forming a depression in the first solder ball, applying flux to the first solder ball to fill the depression, aligning the first semiconductor package and the second semiconductor package with each other such that the second solder ball is inserted into the depression, and performing a reflow process to combine the first solder ball with the second solder ball may be provided.

4. 发明申请

US20170317062A1 METHOD OF FABRICATING A SEMICONDUCTOR PACKAGE 有权
公开(公告)号：US20170317062A1
公开(公告)日：2017-11-02
申请号：US15423611
申请日：2017-02-03
申请人： HONGBIN SHI , JUNHO LEE
发明人： HONGBIN SHI , JUNHO LEE
IPC分类号： H01L25/10 , H01L23/00 , H01L25/00
CPC分类号： H01L25/105 , H01L24/81 , H01L25/50 , H01L2224/81143 , H01L2224/81815 , H01L2225/1023 , H01L2225/1058 , H01L2225/1082
摘要： A method of fabricating a semiconductor package includes providing a lower semiconductor package including a lower package substrate, and a lower dummy ball and a lower solder ball on a top surface of the lower package substrate, providing an upper semiconductor package including an upper package substrate, and an upper dummy ball and an upper solder ball on a bottom surface of the upper package substrate, joining the upper dummy ball to the lower dummy ball at a first temperature to form a solder joint, and joining the upper solder ball to the lower solder ball at a second temperature to form a connection terminal.

5. 发明授权

US09786644B2 Methods of fabricating a semiconductor package 有权
公开(公告)号：US09786644B2
公开(公告)日：2017-10-10
申请号：US15168240
申请日：2016-05-30
申请人： Hongbin Shi , Hojeong Moon , Kang Joon Lee
发明人： Hongbin Shi , Hojeong Moon , Kang Joon Lee
IPC分类号： H01L23/00 , H01L25/00 , H01L25/10 , H01L23/31 , H01L23/498
CPC分类号： H01L25/50 , H01L23/3128 , H01L23/49811 , H01L23/49816 , H01L25/105 , H01L2224/11849 , H01L2224/13109 , H01L2224/13111 , H01L2224/13113 , H01L2224/13116 , H01L2224/1312 , H01L2224/13139 , H01L2224/1357 , H01L2224/16227 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2225/1023 , H01L2225/1058 , H01L2225/1082 , H01L2924/1431 , H01L2924/1434 , H01L2924/1436 , H01L2924/1438 , H01L2924/15311 , H01L2924/15331 , H01L2924/18161 , H01L2924/3511 , H01L2924/00012 , H01L2924/00014 , H01L2924/00
摘要： Provided is a method of fabricating a semiconductor package. The method include providing a lower package with an inner solder ball, providing a conductive material on the inner solder ball to form an outer solder ball enclosing the inner solder ball, providing an upper package with an upper solder ball, on the lower package, performing a first process at a first temperature to join the upper solder ball to the outer solder ball, and performing a second process at a second temperature to unite the upper, inner, and outer solder balls into a connection terminal.

6. 发明申请

US20170294413A1 STACK-TYPE SEMICONDUCTOR PACKAGE 审中-公开
公开(公告)号：US20170294413A1
公开(公告)日：2017-10-12
申请号：US15418077
申请日：2017-01-27
申请人： HONGBIN SHI , JUNHO LEE
发明人： HONGBIN SHI , JUNHO LEE
IPC分类号： H01L25/065 , H01L23/31
CPC分类号： H01L25/0657 , H01L23/3128 , H01L23/3178 , H01L25/105 , H01L2224/16225 , H01L2224/48091 , H01L2224/73265 , H01L2225/06513 , H01L2225/06517 , H01L2225/06586 , H01L2225/1023 , H01L2225/1058 , H01L2225/1076 , H01L2924/181 , H01L2924/18161 , H01L2924/00014 , H01L2924/00012
摘要： A semiconductor package includes a lower package including a lower package substrate, a lower semiconductor chip disposed on the lower package substrate, and a lower mold layer disposed on the lower package substrate, and an upper package disposed on the lower package. The upper package includes an upper package substrate and an upper semiconductor chip disposed on the upper package substrate. The semiconductor package additionally includes connection terminals disposed between the lower and upper package substrates. The connection terminals comprise outermost connection terminals and inner connection terminals. The inner connection terminals are disposed between the lower semiconductor chip and outermost connection terminals. The semiconductor package further includes a first under-fill layer disposed between the lower package substrate and the upper package substrate. At least one of the outermost connection terminals is disposed outside of the lower mold layer.

7. 发明申请

US20170077074A1 METHOD FOR MANUFACTURING SEMICONDUCTOR PACKAGE 有权
标题翻译：制造半导体封装的方法
公开(公告)号：US20170077074A1
公开(公告)日：2017-03-16
申请号：US15240183
申请日：2016-08-18
申请人： Hongbin SHI , Soonbum KIM , Junho LEE
发明人： Hongbin SHI , Soonbum KIM , Junho LEE
IPC分类号： H01L25/10 , H01L25/00
CPC分类号： H01L25/105 , H01L25/50 , H01L2224/16225 , H01L2224/48227 , H01L2225/1058 , H01L2225/1082 , H01L2924/15311 , H01L2924/181 , H01L2924/1815 , H01L2924/18161 , H01L2924/3511 , H01L2924/00012
摘要： A method for manufacturing a semiconductor package including providing a first semiconductor package including a first package substrate and a first solder ball, the first package substrate having a first surface and a second surface opposite to the first surface, the first solder ball on the first surface, providing a second semiconductor package including a second package substrate and a second solder ball, the second package substrate having a third surface and a fourth surface opposite to the third surface, the second solder ball on the third surface, forming a depression in the first solder ball, applying flux to the first solder ball to fill the depression, aligning the first semiconductor package and the second semiconductor package with each other such that the second solder ball is inserted into the depression, and performing a reflow process to combine the first solder ball with the second solder ball may be provided.
摘要翻译：一种制造半导体封装的方法，包括提供包括第一封装衬底和第一焊球的第一半导体封装，所述第一封装衬底具有第一表面和与所述第一表面相对的第二表面，所述第一焊球在所述第一表面上提供包括第二封装衬底和第二焊球的第二半导体封装，所述第二封装衬底具有与所述第三表面相对的第三表面和第四表面，所述第三焊盘在所述第三表面上形成第一焊盘焊球，将焊剂施加到第一焊球以填充凹陷，使第一半导体封装和第二半导体封装彼此对准，使得第二焊球插入凹陷中，并且执行回流工艺以组合第一焊料可以提供具有第二焊球的球。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式