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1. 发明申请

US20070258292A1 DATA/STROBE ENCODING SCHEME CIRCUIT AND DATA/STROBE ENCODING METHOD 有权
标题翻译：数据/ STROBE编码方案电路和数据/ STROBE编码方法
公开(公告)号：US20070258292A1
公开(公告)日：2007-11-08
申请号：US11696012
申请日：2007-04-03
申请人： Hideki Irisawa , Hiroki Hihara , Shuichi Moriyama
发明人： Hideki Irisawa , Hiroki Hihara , Shuichi Moriyama
IPC分类号： G11C7/10
CPC分类号： H04L7/02 , G11C7/1006 , G11C7/22 , G11C7/222
摘要： In a data/strobe encoding scheme circuit in which data and a strobe signal are transmitted through different lines, changes respectively in the data and the strobe signal are employed as clock signals for a latching operation, and the data is transmitted to a succeeding-stage circuit operating on a second clock signal. The circuit latches predetermined data by an FF circuit and passes a data pair including a signal indicating that the data has been latched and held therein as well as the latched data to the succeeding-stage circuit, activates, if assertion of a signal indicating reception of the data is received from the succeeding-stage circuit, again the FF circuit which has latched the data and has entered a stop state, and receives new data. There is provided a data/strobe encoding scheme circuit and a data/strobe encoding method, it is possible to implement a data/strobe encoding scheme circuit and a data/strobe encoding method capable of realizing a low-cost data/strobe encoding scheme which is independent of LSI device characteristics and which can be easily designed.
摘要翻译：在其中数据和选通信号通过不同的线路发送的数据/选通编码方案电路中，数据和选通信号中的分别改变被用作用于锁存操作的时钟信号，并且数据被发送到后级电路工作在第二个时钟信号上。电路通过FF电路锁存预定数据，并将包括表示数据被锁存和保持在其中的信号以及锁存数据的数据对传送到后级电路，如果断言指示接收到从后级电路再次接收已经锁存数据并已进入停止状态并接收新数据的FF电路。提供数据/选通编码方案电路和数据/选通编码方法，可以实现能够实现低成本数据/选通编码方案的数据/选通编码方案电路和数据/选通编码方法，其中独立于LSI器件特性，可以轻松设计。

2. 发明授权

US06334194B1 Fault tolerant computer employing double-redundant structure 有权
标题翻译：容错计算机采用双冗余结构
公开(公告)号：US06334194B1
公开(公告)日：2001-12-25
申请号：US09187483
申请日：1998-11-06
申请人： Hiroki Hihara
发明人： Hiroki Hihara
IPC分类号： G06F1100
CPC分类号： G06F11/1633 , G06F11/0724 , G06F11/079 , G06F11/1497 , G06F11/165
摘要： A fault tolerant computer comprising plural operation controllers is provided, which can judge and separate a damaged element by using a double-redundant structure without using a triple or greater-redundant structure. The computer comprises two judgment sections corresponding to each operation controller in the double-redundant structure, and each judgment section compares an output from the operation controller connected to the present judgment section with an output from the operation controller connected to the other judgment section, wherein one judgment section receives a signal indicating a comparison result from the other judgment section, and collates this signal and a comparison result obtained in the present judgment section with reference to additional diagnosis information so as to judge whether the output from the operation controller connected to the present judgment section is correct.
摘要翻译：提供了包括多个操作控制器的容错计算机，其可以通过使用双重冗余结构来判断和分离损坏的元件而不使用三重或更大冗余的结构。计算机包括与双冗余结构中的每个操作控制器对应的两个判断部分，并且每个判断部分将连接到当前判断部分的操作控制器的输出与连接到另一个判断部分的操作控制器的输出进行比较，其中一个判断部分从另一个判断部分接收表示比较结果的信号，并参照附加诊断信息对该信号和本判断部分获得的比较结果进行核对，以判断连接到现在的判断部分是正确的。

3. 发明授权

US5485604A Fault tolerant computer system comprising a fault detector in each processor module 失效
标题翻译：容错计算机系统包括每个处理器模块中的故障检测器
公开(公告)号：US5485604A
公开(公告)日：1996-01-16
申请号：US145647
申请日：1993-11-04
申请人： Hiroaki Miyoshi , Yasuhiko Mizushima , Makoto Ohtsuka , Hiroki Hihara
发明人： Hiroaki Miyoshi , Yasuhiko Mizushima , Makoto Ohtsuka , Hiroki Hihara
IPC分类号： G06F11/18 , G06F11/00 , G06F11/16 , G06F11/20 , G06F15/16 , G06F15/177 , G06F11/34
CPC分类号： G06F11/1654 , G06F11/1645 , G06F11/181 , G06F11/18 , G06F11/183 , G06F11/20
摘要： In each module (11) of three or more central processor modules of a fault tolerant computer system, a detector (45) receives a comparator output signal and like comparator output signals from two adjacent modules and produces a detector output signal which confirms absence and presence of a fault in one of the above-mentioned each module. When the fault is confirmed, a controller or processor (49) isolates the module under consideration from the system by inhibiting delivery of a controlled output signal to a bus (31) and by connecting, with the module in question bypassed, switching units (53(1), 53(2)) of the adjacent modules. Preferably, one of the modules of the system is used as a master module of ordinarily delivering the controlled output signal to the bus with others used as checker modules of ordinarily inhibiting the delivery. When a fault appears in the master module, its controller delivers a module operation switching signal to the controllers of the checker modules to thereby substitute one of the checker modules for the master module subjected to the fault.
摘要翻译：在容错计算机系统的三个或更多中央处理器模块的每个模块（11）中，检测器（45）接收来自两个相邻模块的比较器输出信号和比较器输出信号，并且产生检测器输出信号，其确认不存在和存在在上述每个模块之一的故障。当确定故障时，控制器或处理器（49）通过禁止向总线（31）传送受控输出信号并通过与所讨论的模块相连接切换单元（53）来隔离系统所考虑的模块（1），53（2））。优选地，系统的模块之一用作通常将受控输出信号传送到总线的主模块，其他模块用作通常禁止传送的检验模块。当主模块出现故障时，其控制器将模块操作切换信号提供给检验模块的控制器，从而将其中一个检验模块替换为故障主模块。

4. 发明授权

US08036283B2 Data/strobe encoding scheme circuit and data/strobe encoding method 有权
标题翻译：数据/选通编码方案电路和数据/选通编码方法
公开(公告)号：US08036283B2
公开(公告)日：2011-10-11
申请号：US11696012
申请日：2007-04-03
申请人： Hideki Irisawa , Hiroki Hihara , Shuichi Moriyama
发明人： Hideki Irisawa , Hiroki Hihara , Shuichi Moriyama
IPC分类号： H04B3/00
CPC分类号： H04L7/02 , G11C7/1006 , G11C7/22 , G11C7/222
摘要： In a data/strobe encoding scheme circuit in which data and a strobe signal are transmitted through different lines, changes respectively in the data and the strobe signal are employed as clock signals for a latching operation, and the data is transmitted to a succeeding-stage circuit operating on a second clock signal. The circuit latches predetermined data by an FF circuit and passes a data pair including a signal indicating that the data has been latched and held therein as well as the latched data to the succeeding-stage circuit, activates, if assertion of a signal indicating reception of the data is received from the succeeding-stage circuit, again the FF circuit which has latched the data and has entered a stop state, and receives new data. There is provided a data/strobe encoding scheme circuit and a data/strobe encoding method, it is possible to implement a data/strobe encoding scheme circuit and a data/strobe encoding method capable of realizing a low-cost data/strobe encoding scheme which is independent of LSI device characteristics and which can be easily designed.
摘要翻译：在其中数据和选通信号通过不同的线路发送的数据/选通编码方案电路中，数据和选通信号中的分别改变被用作用于锁存操作的时钟信号，并且数据被发送到后级电路工作在第二个时钟信号上。电路通过FF电路锁存预定数据，并将包括表示数据被锁存和保持在其中的信号以及锁存数据的数据对传送到后级电路，如果断言指示接收到从后级电路再次接收已经锁存数据并已进入停止状态并接收新数据的FF电路。提供数据/选通编码方案电路和数据/选通编码方法，可以实现能够实现低成本数据/选通编码方案的数据/选通编码方案电路和数据/选通编码方法，其中独立于LSI器件特性，可以轻松设计。

5. 发明授权

US07556502B2 Connector and contacts for use in the connector 有权
标题翻译：用于连接器的连接器和触点
公开(公告)号：US07556502B2
公开(公告)日：2009-07-07
申请号：US11896673
申请日：2007-09-05
申请人： Eiichi Nakata , Takashi Kobayashi , Ryo Kameoka , Hiroki Hihara
发明人： Eiichi Nakata , Takashi Kobayashi , Ryo Kameoka , Hiroki Hihara
IPC分类号： H01R12/00
CPC分类号： H01R12/714 , H01R12/52
摘要： A connector includes a plurality of contacts. The connector includes an insulator having a plurality of through-holes for receiving the contacts. A pair of contacts are disposed in each of the through-holes. Since two contacts are disposed in the through-hole in the insulator, even if a fault occurs in one of the contacts, signal transmission in the same line can continuously be used. Moreover, since large areas of contact portions of the contacts are secured even in normal use, the capacity of electric current is increased.
摘要翻译：连接器包括多个触点。连接器包括具有用于接收触点的多个通孔的绝缘体。一对触点设置在每个通孔中。由于在绝缘子的通孔中设置两个触点，所以即使在一个触点中发生故障，也可以连续使用同一线路中的信号传输。此外，由于即使在正常使用情况下也确保了触点的大面积的接触部分，所以电流的容量增加。

6. 发明申请

US20080057748A1 Connector and contacts for use in the connector 有权
标题翻译：用于连接器的连接器和触点
公开(公告)号：US20080057748A1
公开(公告)日：2008-03-06
申请号：US11896673
申请日：2007-09-05
申请人： Eiichi Nakata , Takashi Kobayashi , Ryo Kameoka , Hiroki Hihara
发明人： Eiichi Nakata , Takashi Kobayashi , Ryo Kameoka , Hiroki Hihara
IPC分类号： H01R12/16
CPC分类号： H01R12/714 , H01R12/52
摘要： A connector includes a plurality of contacts. The connector includes an insulator having a plurality of through-holes for receiving the contacts. A pair of contacts are disposed in each of the through-holes. Since two contacts are disposed in the through-hole in the insulator, even if a fault occurs in one of the contacts, signal transmission in the same line can continuously be used. Moreover, since large areas of contact portions of the contacts are secured even in normal use, the capacity of electric current is increased.
摘要翻译：连接器包括多个触点。连接器包括具有用于接收触点的多个通孔的绝缘体。一对触点设置在每个通孔中。由于在绝缘子的通孔中设置两个触点，所以即使在一个触点中发生故障，也可以连续使用同一线路中的信号传输。此外，由于即使在正常使用情况下也确保了触点的大面积的接触部分，所以电流的容量增加。

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