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1. 发明授权

US07911281B2 PLL circuit and radio communication apparatus 有权
标题翻译： PLL电路和无线电通信装置
公开(公告)号：US07911281B2
公开(公告)日：2011-03-22
申请号：US12558771
申请日：2009-09-14
申请人： Hiroaki Hoshino , Osamu Watanabe , Shoji Otaka , Tetsuro Itakura
发明人： Hiroaki Hoshino , Osamu Watanabe , Shoji Otaka , Tetsuro Itakura
IPC分类号： H03B5/12 , H03B27/00 , H03L7/18
CPC分类号： H03L7/099 , H03L7/0891 , H03L7/18
摘要： A PLL circuit includes: a voltage-controlled oscillator including: a first oscillating portion configured to generate first differential signals; and a second oscillating portion configured to generate second differential signals with a phase difference of 90 degrees from the first differential signals; a phase detector configured to compare phases of third differential signals based on the first and second differential signals with a phase of a reference signal; and a loop filter configured to generate a control voltage for controlling the voltage-controlled oscillator based on a result of the comparison in the phase detector.
摘要翻译： PLL电路包括：压控振荡器，包括：第一振荡部分，被配置为产生第一差分信号; 以及第二振荡部分，被配置为产生与所述第一差分信号相差90度的第二差分信号; 相位检测器，被配置为将基于第一和第二差分信号的第三差分信号的相位与参考信号的相位进行比较; 以及环路滤波器，其被配置为基于相位检测器中的比较结果产生用于控制压控振荡器的控制电压。

2. 发明申请

US20100073222A1 FMWC SIGNAL GENERATOR AND RADAR APPARATUS USING FMCW SIGNAL GENERATOR 审中-公开
标题翻译： FMWC信号发生器和使用FMCW信号发生器的雷达设备
公开(公告)号：US20100073222A1
公开(公告)日：2010-03-25
申请号：US12407817
申请日：2009-03-20
申请人： Toshiya Mitomo , Hiroaki Hoshino , Osamu Watanabe , Shoji Otaka
发明人： Toshiya Mitomo , Hiroaki Hoshino , Osamu Watanabe , Shoji Otaka
IPC分类号： G01S13/00
CPC分类号： G01S13/345 , G01S7/35
摘要： An FMCW signal generator includes a frequency divider to divide the FMCW signal at a preset dividing ratio, a reference signal generator to periodically generate a reference signal at a second time interval not less than a loop time constant set for a PLL, a frequency of the reference signal being discretely swept within a range of fc±Δf (fc is a center frequency, and Δf is a frequency sweep width) at a first time interval not more than the loop time constant, a comparison unit to compare the frequency divided signal with the reference signal to generate a comparison result signal corresponding to a phase difference between the frequency divided signal and the reference signal, a loop filter to filter the comparison result signal to generate a control voltage signal, and a VCO to have an oscillation frequency thereof controlled by the control voltage signal.
摘要翻译： FMCW信号发生器包括分频器，用于以预设的分频比对FMCW信号进行分频，参考信号发生器以不小于为PLL设置的环路时间常数的第二时间间隔周期性地产生参考信号，频率为参考信号在fc±＆Dgr的范围内离散地扫描; f（fc是中心频率，并且＆Dgr; f是频率扫描宽度）在不大于循环时间常数的第一时间间隔，比较单元具有参考信号的频率分频信号，以产生对应于分频信号和参考信号之间的相位差的比较结果信号;环路滤波器，用于对比较结果信号进行滤波以产生控制电压信号;以及VCO，振荡频率由控制电压信号控制。

3. 发明授权

US4828855A Method for producing sugar-added margarine 失效
标题翻译：生产加糖人造黄油的方法
公开(公告)号：US4828855A
公开(公告)日：1989-05-09
申请号：US51770
申请日：1987-05-20
申请人： Hirohisa Sasaki , Takeo Saotome , Moriya Sano , Kouichiro Marusugi , Hiroaki Hoshino , Yoshibumi Minowa , Tetsuo Moriguchi
发明人： Hirohisa Sasaki , Takeo Saotome , Moriya Sano , Kouichiro Marusugi , Hiroaki Hoshino , Yoshibumi Minowa , Tetsuo Moriguchi
IPC分类号： A23D7/04 , A23D7/00 , A23D7/02 , A23D9/02
CPC分类号： A23D7/02
摘要： A method of manufacturing sugar-added margarine containing 5 to 50% by weight of sugar calculated in terms of its anhydride, characterized in that, an emulsion of oil and fat, and sugar is uniformly heated by means of a micro-wave heating device at a pre-established optimum tempering temperature which is higher than a temperature lower by 10.degree. C. than the increased melting point of the oil and fat with a precision of .+-.2.0.degree. C., and then the heated emulsion is cooled at a rate of not higher than 5.degree. C./hr.

4. 发明申请

US20080238495A1 FREQUENCY SYNTHESIZER AND WIRELESS COMMUNICATION DEVICE UTILIZING THE SAME 审中-公开
标题翻译：使用它的频率合成器和无线通信装置
公开(公告)号：US20080238495A1
公开(公告)日：2008-10-02
申请号：US12051088
申请日：2008-03-19
申请人： RYOICHI TACHIBANA , Shoji Otaka , Osamu Watanabe , Hiroaki Hoshino
发明人： RYOICHI TACHIBANA , Shoji Otaka , Osamu Watanabe , Hiroaki Hoshino
IPC分类号： H03B21/00
CPC分类号： H03L7/113 , H03B5/1215 , H03B5/1228 , H03B5/1253 , H03L7/0891 , H03L7/099 , H03L7/18
摘要： A frequency synthesizer includes a voltage-controlled oscillator to output an oscillation signal of a oscillating frequency in correspondence with a oscillation controlling voltage that is input to the oscillator, a first frequency-divider to subject the oscillation signal to frequency-division and output a first frequency signal, a second frequency-divider to subject the first frequency signal to frequency-division and output a second frequency signal, a controlling voltage generator to generate the oscillation controlling voltage corresponding to a phase difference between a reference clock signal and the second frequency signal, a frequency detector to detect a frequency difference between the second frequency signal and the reference clock signal, and a controller which controls a free-running frequency of the first frequency divider to minimize the frequency difference.
摘要翻译：频率合成器包括：压控振荡器，用于根据输入到振荡器的振荡控制电压输出振荡频率的振荡信号;第一分频器，对振荡信号进行分频并输出第一频率信号，第二分频器，用于对第一频率信号进行分频并输出第二频率信号;控制电压发生器，用于产生对应于参考时钟信号和第二频率信号之间的相位差的振荡控制电压用于检测第二频率信号和参考时钟信号之间的频率差的频率检测器，以及控制第一分频器的自由运行频率以最小化频率差的控制器。

5. 发明授权

US08594593B2 Frequency converter and transmitter 失效
标题翻译：变频器和变送器
公开(公告)号：US08594593B2
公开(公告)日：2013-11-26
申请号：US12880811
申请日：2010-09-13
申请人： Hiroaki Hoshino , Toshiya Mitomo
发明人： Hiroaki Hoshino , Toshiya Mitomo
IPC分类号： H01Q11/12 , H04B1/04
CPC分类号： H03D7/1441 , H03D7/1458
摘要： A frequency converter includes a first pair of transistors including first and second transistors, a second pair of transistors including third and fourth transistors, and a variable impedance circuit. The first transistor includes source terminal being connected to positive-phase input terminal, drain terminal being connected to positive-phase output terminal, and gate terminal being supplied with positive-phase local signal. The second transistor includes source terminal being connected to positive-phase input terminal, drain terminal being connected to negative-phase output terminal, and gate terminal being supplied with negative-phase local signal. The third transistor includes source terminal being connected to negative-phase input terminal, drain terminal being connected to positive-phase output terminal, and gate terminal being supplied with negative-phase local signal. The fourth transistor includes source terminal being connected to negative-phase input terminal, drain terminal being connected to negative-phase output terminal, and gate terminal being supplied with positive-phase local signal.
摘要翻译：一种变频器包括：第一和第二晶体管的第一对晶体管，包括第三和第四晶体管的第二对晶体管和可变阻抗电路。第一晶体管包括源极端子连接到正相输入端子，漏极端子连接到正相输出端子，栅极端子被提供有正相本地信号。第二晶体管包括源极端子连接到正相输入端子，漏极端子连接到负相输出端子，栅极端子被提供负相位本地信号。第三晶体管包括源极端子连接到负相输入端子，漏极端子连接到正相输出端子，栅极端子被提供负相位本地信号。第四晶体管包括源极端子连接到负相输入端子，漏极端子连接到负相输出端子，栅极端子被提供有正相本地信号。

6. 发明申请

US20100164633A1 PLL CIRCUIT AND RADIO COMMUNICATION APPARATUS 有权
标题翻译： PLL电路和无线电通信设备
公开(公告)号：US20100164633A1
公开(公告)日：2010-07-01
申请号：US12558771
申请日：2009-09-14
申请人： Hiroaki Hoshino , Osamu Watanabe , Shoji Otaka , Tetsuro Itakura
发明人： Hiroaki Hoshino , Osamu Watanabe , Shoji Otaka , Tetsuro Itakura
IPC分类号： H03L7/097
CPC分类号： H03L7/099 , H03L7/0891 , H03L7/18
摘要： A PLL circuit includes: a voltage-controlled oscillator including: a first oscillating portion configured to generate first differential signals; and a second oscillating portion configured to generate second differential signals with a phase difference of 90 degrees from the first differential signals; a phase detector configured to compare phases of third differential signals based on the first and second differential signals with a phase of a reference signal; and a loop filter configured to generate a control voltage for controlling the voltage-controlled oscillator based on a result of the comparison in the phase detector.
摘要翻译： PLL电路包括：压控振荡器，包括：第一振荡部分，被配置为产生第一差分信号; 以及第二振荡部分，被配置为产生与所述第一差分信号相差90度的第二差分信号; 相位检测器，被配置为将基于第一和第二差分信号的第三差分信号的相位与参考信号的相位进行比较; 以及环路滤波器，其被配置为基于相位检测器中的比较结果产生用于控制压控振荡器的控制电压。

7. 发明授权

US08219054B2 Oscillating circuit and radio communication apparatus 有权
标题翻译：振荡电路和无线电通信装置
公开(公告)号：US08219054B2
公开(公告)日：2012-07-10
申请号：US12558769
申请日：2009-09-14
申请人： Hiroaki Hoshino , Toshiya Mitomo
发明人： Hiroaki Hoshino , Toshiya Mitomo
IPC分类号： H04B1/16
CPC分类号： H03B5/1228 , H03B5/1215 , H03B5/1243
摘要： According to an aspect of the invention, an oscillating circuit includes: a first MOS transistor having a first drain terminal and a first source terminal; a load element connected to the first drain terminal; and an oscillator connected to the first source terminal and outputs a fundamental signal and a harmonic signal, wherein the harmonic signal is amplified so that the amplified harmonic signal is output from the first drain terminal.
摘要翻译：根据本发明的一个方面，一种振荡电路包括：具有第一漏极端子和第一源极端子的第一MOS晶体管; 连接到所述第一漏极端子的负载元件; 以及振荡器，连接到所述第一源极端子并输出基本信号和谐波信号，其中所述谐波信号被放大，使得所述放大的谐波信号从所述第一漏极端子输出。

8. 发明申请

US20120076180A1 PHASE-LOCKED LOOP AND RADIO COMMUNICATION DEVICE 审中-公开
标题翻译：相位锁定环路和无线电通信设备
公开(公告)号：US20120076180A1
公开(公告)日：2012-03-29
申请号：US13178922
申请日：2011-07-08
申请人： Hiroaki HOSHINO
发明人： Hiroaki HOSHINO
IPC分类号： H03L7/06 , H04B1/38
CPC分类号： H03L7/089
摘要： According to one embodiment, a phase-locked loop includes: a voltage controlled oscillator that generates an oscillation signal including an oscillation frequency corresponding to a control signal; a divider that divides the oscillation signal to generate a frequency-divided signal; a phase frequency detector that compares the phases of the frequency-divided signal and a reference signal to generate a comparison signal; a charge pump that outputs current corresponding to the comparison signal; a filter that filters the current to generate the control signal; a detection circuit that generates a detection signal when the difference between a value of a constant multiple of the frequency of the frequency-divided signal and a value of a constant multiple of the frequency of the reference signal becomes local minimum; and a phase adjustment circuit that synchronizes the phases of the frequency-divided signal and the reference signal when the detection signal is generated.
摘要翻译：根据一个实施例，锁相环包括：压控振荡器，其产生包括对应于控制信号的振荡频率的振荡信号; 分频器，其分频振荡信号以产生分频信号; 相位频率检测器，其对分频信号的相位和基准信号进行比较，生成比较信号; 输出与比较信号对应的电流的电荷泵; 滤波器，用于过滤电流以产生控制信号; 检测电路，当分频信号的频率的恒定倍数与参考信号的频率的恒定倍数的值之间的差成为局部最小时，生成检测信号; 以及相位调整电路，当产生检测信号时，使分频信号和参考信号的相位同步。

9. 发明申请

US20110235739A1 FREQUENCY CONVERTER AND TRANSMITTER 失效
标题翻译：频率转换器和发射机
公开(公告)号：US20110235739A1
公开(公告)日：2011-09-29
申请号：US12880811
申请日：2010-09-13
申请人： Hiroaki Hoshino , Toshiya Mitomo
发明人： Hiroaki Hoshino , Toshiya Mitomo
IPC分类号： H04L27/00 , H02M5/293
CPC分类号： H03D7/1441 , H03D7/1458
摘要： A frequency converter includes a first pair of transistors including first and second transistors, a second pair of transistors including third and fourth transistors, and a variable impedance circuit. The first transistor includes source terminal being connected to positive-phase input terminal, drain terminal being connected to positive-phase output terminal, and gate terminal being supplied with positive-phase local signal. The second transistor includes source terminal being connected to positive-phase input terminal, drain terminal being connected to negative-phase output terminal, and gate terminal being supplied with negative-phase local signal. The third transistor includes source terminal being connected to negative-phase input terminal, drain terminal being connected to positive-phase output terminal, and gate terminal being supplied with negative-phase local signal. The fourth transistor includes source terminal being connected to negative-phase input terminal, drain terminal being connected to negative-phase output terminal, and gate terminal being supplied with positive-phase local signal.
摘要翻译：一种变频器包括：第一和第二晶体管的第一对晶体管，包括第三和第四晶体管的第二对晶体管和可变阻抗电路。第一晶体管包括源极端子连接到正相输入端子，漏极端子连接到正相输出端子，栅极端子被提供有正相本地信号。第二晶体管包括源极端子连接到正相输入端子，漏极端子连接到负相输出端子，栅极端子被提供负相位本地信号。第三晶体管包括源极端子连接到负相输入端子，漏极端子连接到正相输出端子，栅极端子被提供负相位本地信号。第四晶体管包括源极端子连接到负相输入端子，漏极端子连接到负相输出端子，栅极端子被提供有正相本地信号。

10. 发明申请

US20100233976A1 OSCILLATING CIRCUIT AND RADIO COMMUNICATION APPARATUS 有权
标题翻译：振荡电路和无线电通信设备
公开(公告)号：US20100233976A1
公开(公告)日：2010-09-16
申请号：US12558769
申请日：2009-09-14
申请人： Hiroaki Hoshino , Toshiya Mitomo
发明人： Hiroaki Hoshino , Toshiya Mitomo
IPC分类号： H04B1/04 , H03B1/00
CPC分类号： H03B5/1228 , H03B5/1215 , H03B5/1243
摘要： According to an aspect of the invention, an oscillating circuit includes: a first MOS transistor having a first drain terminal and a first source terminal; a load element connected to the first drain terminal; and an oscillator connected to the first source terminal and outputs a fundamental signal and a harmonic signal, wherein the harmonic signal is amplified so that the amplified harmonic signal is output from the first drain terminal.
摘要翻译：根据本发明的一个方面，一种振荡电路包括：具有第一漏极端子和第一源极端子的第一MOS晶体管; 连接到所述第一漏极端子的负载元件; 以及振荡器，连接到所述第一源极端子并输出基本信号和谐波信号，其中所述谐波信号被放大，使得所述放大的谐波信号从所述第一漏极端子输出。

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