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1. 发明授权

US5719976A Optimized waveguide structure 失效
标题翻译：优化波导结构
公开(公告)号：US5719976A
公开(公告)日：1998-02-17
申请号：US547767
申请日：1995-10-24
申请人： Charles Howard Henry , Edward John Laskowski , Yuan P. Li , Henry Howard Yaffe
发明人： Charles Howard Henry , Edward John Laskowski , Yuan P. Li , Henry Howard Yaffe
IPC分类号： G02B6/30 , G02B6/12 , G02B6/122 , G02B6/126 , G02B6/34 , G02B6/26
CPC分类号： G02B6/12009 , G02B6/12004 , G02B6/122 , G02B6/1228 , G02B2006/12119 , G02B2006/12169
摘要： An optimized waveguide structure enables the functional integration of various passive optic components on a single substrate. The optimized waveguide structure is characterized by a thicker core layer than used for square core waveguides and a core width that changes according to different functional regions of the optic circuit within which it is incorporated. The height (H) of the waveguide core is determined by the thickness of the core layer defined during the fabrication process and is ideally uniform across the circuit. The width (W) of the core, however, is changed between functional regions by the photo-lithographic mask and the chemical etching during the fabrication process. By way of example, an optimized waveguide structure for a P-doped silica planar waveguide with a .DELTA. approximately 0.6% for wavelength .lambda.=1.2-1.7 .mu.m, has a single uniform height of H=6.7 .mu.m and a width that changes between W=4 .mu.m in a coupler region, W=5.5 .mu.m in a bend region, W=9 .mu.m in a fiber coupling region, and W=10 .mu.m in a phase grating region of a Dragone router. Adiabatic tapers are used as transition regions between regions of different core widths.
摘要翻译：优化的波导结构使得能够在单个基板上的各种无源光学元件的功能集成。优化的波导结构的特征在于比用于方芯波导的核心层更厚，并且根据其所结合的光电路的不同功能区域而变化的芯宽度。波导芯的高度（H）由在制造过程中限定的芯层的厚度确定，并且在整个电路上理想地是均匀的。然而，通过光刻掩模和制造过程中的化学蚀刻在功能区域之间改变芯的宽度（W）。作为示例，用于波长λ=1.2-1.7μm的DELTA约0.6％的P掺杂二氧化硅平面波导的优化波导结构具有H =6.7μm的单一均匀高度，并且宽度在在耦合器区域中W =4μm，在弯曲区域中W =5.5μm，在光纤耦合区域中W =9μm，在Dragone路由器的相位光栅区域中W =10μm。绝热锥度用作不同芯宽的区域之间的过渡区域。

2. 发明授权

US5914889A Method and system for generating a mask layout of an optical integrated circuit 失效
标题翻译：用于产生光学集成电路的掩模布局的方法和系统
公开(公告)号：US5914889A
公开(公告)日：1999-06-22
申请号：US713582
申请日：1996-09-13
申请人： Leonard George Cohen , Charles Howard Henry , Yuan P. Li , Morton I. Schwartz , Yan Wang , Henry Howard Yaffe
发明人： Leonard George Cohen , Charles Howard Henry , Yuan P. Li , Morton I. Schwartz , Yan Wang , Henry Howard Yaffe
IPC分类号： G02B6/12 , G06F17/50 , G06F17/00
CPC分类号： G06F17/5068 , G02B6/12 , G02B2006/12173
摘要： A computer system and method provide a CAD tool by which a mask for an application specific optical integrated circuit, chip, or wafer may be generated both easily and quickly. The method involves the step of receiving the design for an optical circuit with the circuit design including at least one optical component. Each optical component in the optical circuit is defined by one or more geometric shapes, such as a trapezoid, rectangle, or an arcuate polygon. The method further includes the step of retrieving parameters which define the manufacturing standard by which the optical circuit will be fabricated as well as parameters which define the optical components in the optical circuit. Based on the parameters and the geometric shapes, a plot is generated which forms a mask layout for the optical circuit. The mask layout can then be viewed by a graphical editor whereby a designer can receive visual confirmation that the mask layout accurately portrays the desired optical circuit, chip, or wafer.
摘要翻译：计算机系统和方法提供了一种CAD工具，通过该工具可以容易且快速地生成用于特定于应用的光学集成电路，芯片或晶片的掩模。该方法包括接收具有包括至少一个光学部件的电路设计的光学电路的设计的步骤。光学电路中的每个光学部件由一个或多个几何形状限定，例如梯形，矩形或弓形多边形。该方法还包括检索定义要制造光电路的制造标准的参数以及限定光学电路中的光学部件的参数的步骤。基于参数和几何形状，生成形成光路的掩模布局的图。然后可以通过图形编辑器来观看掩模布局，由此设计者可以接收视觉确认掩模布局准确地描绘所需的光学电路，芯片或晶片。

3. 发明授权

US5930150A Method and system for designing and analyzing optical application specific integrated circuits 失效
标题翻译：光电专用集成电路设计与分析方法与系统
公开(公告)号：US5930150A
公开(公告)日：1999-07-27
申请号：US716660
申请日：1996-09-06
申请人： Leonard George Cohen , Morton I. Schwartz , Yan Wang , Henry Howard Yaffe
发明人： Leonard George Cohen , Morton I. Schwartz , Yan Wang , Henry Howard Yaffe
IPC分类号： G02B6/12 , G06F17/50 , G06F15/60
CPC分类号： G02B6/12 , G02B6/12004 , G06F17/5036 , G06F17/5045
摘要： A computer system and method provide a CAD tool by which application specific optical integrated circuits may be easily and quickly designed. The computer system has a graphical user interface which provides the designer with an empty canvas upon which the user may place selected icons of any one of a plurality of optical devices. The designer can select from any one of a number of interconnects to place an icon of the selected interconnect between two of the optical devices. The characteristics of each optical device or interconnect may be varied from default settings to a desired group of settings. To verify the operation of a designed circuit, the user simply clicks each icon along an optical path and the computer system provides a spectral analysis of optical power versus wavelength for the defied optical path. The user can also design optical chips by selecting and placing end ports into an optical circuit and can then clump or group the entire optical circuit into a single icon representing the chip. The computer system also provides the designer with the ability to group optical chips together to form wafers. The optical circuits, as well as the chips and wafers, may be designed in any one of several manufacturing standards.
摘要翻译：计算机系统和方法提供可以容易且快速地设计专用光学集成电路的CAD工具。计算机系统具有图形用户界面，其向设计者提供空画布，用户可以在其上放置多个光学设备中的任何一个的所选图标。设计者可以从多个互连中的任何一个中选择，以在两个光学设备之间放置所选互连的图标。每个光学设备或互连的特性可以从默认设置变化到期望的一组设置。为了验证设计的电路的操作，用户简单地沿着光学路径点击每个图标，并且计算机系统提供对于反射光路的光功率对波长的光谱分析。用户还可以通过选择并将端口放置在光学电路中来设计光学芯片，然后可以将整个光学电路聚集或分组成表示芯片的单个图标。计算机系统还为设计者提供将光学芯片组合在一起以形成晶片的能力。光学电路以及芯片和晶片可以以几种制造标准中的任何一种来设计。

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